EDAC, MCE: Add F15h IC MCE decoder
Add support for decoding F15h IC MCEs. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
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25a4f8b059
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@ -75,6 +75,26 @@ static const char *f10h_nb_mce_desc[] = {
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"ECC Error in the Probe Filter directory"
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"ECC Error in the Probe Filter directory"
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};
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};
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static const char * const f15h_ic_mce_desc[] = {
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"UC during a demand linefill from L2",
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"Parity error during data load from IC",
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"Parity error for IC valid bit",
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"Main tag parity error",
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"Parity error in prediction queue",
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"PFB data/address parity error",
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"Parity error in the branch status reg",
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"PFB promotion address error",
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"Tag error during probe/victimization",
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"Parity error for IC probe tag valid bit",
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"PFB non-cacheable bit parity error",
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"PFB valid bit parity error", /* xec = 0xd */
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"patch RAM", /* xec = 010 */
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"uop queue",
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"insn buffer",
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"predecode buffer",
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"fetch address FIFO"
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};
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static bool f12h_dc_mce(u16 ec, u8 xec)
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static bool f12h_dc_mce(u16 ec, u8 xec)
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{
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{
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bool ret = false;
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bool ret = false;
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@ -241,7 +261,7 @@ static void amd_decode_dc_mce(struct mce *m)
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pr_emerg(HW_ERR "Corrupted DC MCE info?\n");
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pr_emerg(HW_ERR "Corrupted DC MCE info?\n");
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}
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}
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static bool k8_ic_mce(u16 ec)
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static bool k8_ic_mce(u16 ec, u8 xec)
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{
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{
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u8 ll = ec & 0x3;
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u8 ll = ec & 0x3;
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u8 r4 = (ec >> 4) & 0xf;
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u8 r4 = (ec >> 4) & 0xf;
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@ -276,7 +296,7 @@ static bool k8_ic_mce(u16 ec)
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return ret;
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return ret;
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}
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}
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static bool f14h_ic_mce(u16 ec)
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static bool f14h_ic_mce(u16 ec, u8 xec)
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{
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{
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u8 ll = ec & 0x3;
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u8 ll = ec & 0x3;
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u8 tt = (ec >> 2) & 0x3;
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u8 tt = (ec >> 2) & 0x3;
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@ -297,6 +317,32 @@ static bool f14h_ic_mce(u16 ec)
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return ret;
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return ret;
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}
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}
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static bool f15h_ic_mce(u16 ec, u8 xec)
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{
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bool ret = true;
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if (!MEM_ERROR(ec))
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return false;
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switch (xec) {
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case 0x0 ... 0xa:
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pr_cont("%s.\n", f15h_ic_mce_desc[xec]);
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break;
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case 0xd:
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pr_cont("%s.\n", f15h_ic_mce_desc[xec-2]);
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break;
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case 0x10 ... 0x14:
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pr_cont("Decoder %s parity error.\n", f15h_ic_mce_desc[xec-4]);
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break;
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default:
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ret = false;
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}
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return ret;
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}
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static void amd_decode_ic_mce(struct mce *m)
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static void amd_decode_ic_mce(struct mce *m)
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{
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{
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u16 ec = m->status & 0xffff;
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u16 ec = m->status & 0xffff;
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@ -311,7 +357,7 @@ static void amd_decode_ic_mce(struct mce *m)
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bool k8 = (boot_cpu_data.x86 == 0xf && (m->status & BIT_64(58)));
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bool k8 = (boot_cpu_data.x86 == 0xf && (m->status & BIT_64(58)));
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pr_cont("during %s.\n", (k8 ? "system linefill" : "NB data read"));
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pr_cont("during %s.\n", (k8 ? "system linefill" : "NB data read"));
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} else if (fam_ops->ic_mce(ec))
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} else if (fam_ops->ic_mce(ec, xec))
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;
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;
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else
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else
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pr_emerg(HW_ERR "Corrupted IC MCE info?\n");
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pr_emerg(HW_ERR "Corrupted IC MCE info?\n");
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@ -697,6 +743,7 @@ static int __init mce_amd_init(void)
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case 0x15:
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case 0x15:
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xec_mask = 0x1f;
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xec_mask = 0x1f;
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fam_ops->dc_mce = f15h_dc_mce;
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fam_ops->dc_mce = f15h_dc_mce;
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fam_ops->ic_mce = f15h_ic_mce;
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break;
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break;
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default:
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default:
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@ -101,7 +101,7 @@ struct err_regs {
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*/
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*/
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struct amd_decoder_ops {
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struct amd_decoder_ops {
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bool (*dc_mce)(u16, u8);
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bool (*dc_mce)(u16, u8);
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bool (*ic_mce)(u16);
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bool (*ic_mce)(u16, u8);
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bool (*nb_mce)(u16, u8);
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bool (*nb_mce)(u16, u8);
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};
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};
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