From a9f91b40e2f018f262a80371fdce23413613a444 Mon Sep 17 00:00:00 2001 From: Georgi Djakov Date: Thu, 4 Feb 2016 14:53:22 +0200 Subject: [PATCH 01/22] arm64: dts: apq8016-sbc: Add DT node for the uSD SDHC interface Add the necessary properties to enable the SD-card on db410c boards. Signed-off-by: Georgi Djakov Tested-by: Kevin Hilman Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi index 205ef89b8ca0..0550b0bc04cf 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi @@ -140,6 +140,18 @@ status = "okay"; }; + sdhci@07864000 { + vmmc-supply = <&pm8916_l11>; + vqmmc-supply = <&pm8916_l12>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>; + pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>; + + cd-gpios = <&msmgpio 38 0x1>; + status = "okay"; + }; + usb@78d9000 { extcon = <&usb_id>, <&usb_id>; status = "okay"; From 3f452fe71ff6bc5d360f7104c8fae37e942d0e39 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Tue, 23 Feb 2016 16:50:45 +0000 Subject: [PATCH 02/22] arm64: dts: qcom: apq8016-sbc: enable bam dma node. This patch enables bam dma node, dma is used for both tx and rx on spi and on high speed serial. Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi index 0550b0bc04cf..18639bc0a506 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi @@ -33,6 +33,10 @@ }; soc { + dma@7884000 { + status = "okay"; + }; + serial@78af000 { label = "LS-UART0"; status = "okay"; From a0df399feec49fb7d5cfef325d082ceefc6e613a Mon Sep 17 00:00:00 2001 From: Lina Iyer Date: Tue, 1 Mar 2016 14:15:30 -0700 Subject: [PATCH 03/22] ARM64: dts: Add PSCI cpuidle support for MSM8916 Add device bindings for CPUs to suspend using PSCI as the enable-method. Cc: Signed-off-by: Lina Iyer Tested-by: Andy Gross Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 96812007850e..30297730545f 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -62,6 +62,8 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0>; next-level-cache = <&L2_0>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SPC>; }; CPU1: cpu@1 { @@ -69,6 +71,8 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x1>; next-level-cache = <&L2_0>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SPC>; }; CPU2: cpu@2 { @@ -76,6 +80,8 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x2>; next-level-cache = <&L2_0>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SPC>; }; CPU3: cpu@3 { @@ -83,12 +89,30 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x3>; next-level-cache = <&L2_0>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SPC>; }; L2_0: l2-cache { compatible = "cache"; cache-level = <2>; }; + + idle-states { + CPU_SPC: spc { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x40000002>; + entry-latency-us = <130>; + exit-latency-us = <150>; + min-residency-us = <2000>; + local-timer-stop; + }; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; }; timer { From 5daa7a6031bd04b7ff94e92ccc1fcb161df12686 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Tue, 10 May 2016 15:01:49 -0700 Subject: [PATCH 04/22] arm64: dts: qcom: Add msm8916 PMU node Add the PMU so we can get proper perf event support on this SoC. Signed-off-by: Stephen Boyd Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 30297730545f..e3ff3ba5b3d3 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -115,6 +115,11 @@ method = "smc"; }; + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = ; + }; + timer { compatible = "arm,armv8-timer"; interrupts = , From ea49e164b5956ed39150be8ae7e85dd8662d0723 Mon Sep 17 00:00:00 2001 From: Andy Gross Date: Fri, 3 Jun 2016 18:25:28 -0500 Subject: [PATCH 05/22] arm64: dts: msm8916: Add SCM firmware node This adds the devicetree node for the SCM firmware. Acked-by: Bjorn Andersson Signed-off-by: Andy Gross Reviewed-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index e3ff3ba5b3d3..4c9c300ba8b0 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -151,6 +151,14 @@ hwlocks = <&tcsr_mutex 3>; }; + firmware { + scm { + compatible = "qcom,scm"; + clocks = <&gcc GCC_CRYPTO_CLK>, <&gcc GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_AHB_CLK>; + clock-names = "core", "bus", "iface"; + }; + }; + soc: soc { #address-cells = <1>; #size-cells = <1>; From 7258e10e6a0b37fee2f8c310de70d07941a440fe Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Mon, 6 Jun 2016 17:57:24 -0700 Subject: [PATCH 06/22] ARM: dts: msm8916: Update reserved-memory Update reserved-memory in accordance with memory the detailed memory map for 8916, so that we will be able to reference the firmware memory regions. Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 41 +++++++++++++++++++++++++-- 1 file changed, 38 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 4c9c300ba8b0..11bdc24cfc74 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -42,13 +42,48 @@ #size-cells = <2>; ranges; - reserve_aligned@86000000 { - reg = <0x0 0x86000000 0x0 0x0300000>; + tz-apps@86000000 { + reg = <0x0 0x86000000 0x0 0x300000>; no-map; }; smem_mem: smem_region@86300000 { - reg = <0x0 0x86300000 0x0 0x0100000>; + reg = <0x0 0x86300000 0x0 0x100000>; + no-map; + }; + + hypervisor@86400000 { + reg = <0x0 0x86400000 0x0 0x100000>; + no-map; + }; + + tz@86500000 { + reg = <0x0 0x86500000 0x0 0x180000>; + no-map; + }; + + reserved@8668000 { + reg = <0x0 0x86680000 0x0 0x80000>; + no-map; + }; + + rmtfs@86700000 { + reg = <0x0 0x86700000 0x0 0xe0000>; + no-map; + }; + + rfsa@867e00000 { + reg = <0x0 0x867e0000 0x0 0x20000>; + no-map; + }; + + mpss@86800000 { + reg = <0x0 0x86800000 0x0 0x2b00000>; + no-map; + }; + + wcnss@89300000 { + reg = <0x0 0x89300000 0x0 0x600000>; no-map; }; }; From 84361086dfecff8f3221dfb0d0fd0ea9810e31a1 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Fri, 17 Jun 2016 16:13:58 +0100 Subject: [PATCH 07/22] arm64: dts: msm8996: add msmgpio label This patch adds msmgpio label for pin and gpio controller so that it can referenced in dedicated pins file and other board level gpios. Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 0506fb808c56..8bf382f93b4e 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -161,7 +161,7 @@ status = "disabled"; }; - pinctrl@1010000 { + msmgpio: pinctrl@1010000 { compatible = "qcom,msm8996-pinctrl"; reg = <0x01010000 0x300000>; interrupts = ; From 22e6789f9493d99a062a3bdc3c064b46b8b30e0d Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Fri, 17 Jun 2016 16:13:59 +0100 Subject: [PATCH 08/22] arm64: dts: msm8996: add blsp2_uart1 pinctrl This patch adds 2pin and 4 pin uart pinctrl support for blsp2_uart1 Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 65 ++++++++++++++++++++++ arch/arm64/boot/dts/qcom/msm8996.dtsi | 1 + 2 files changed, 66 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/msm8996-pins.dtsi diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi new file mode 100644 index 000000000000..4d1dba75755d --- /dev/null +++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&msmgpio { + + blsp2_uart1_2pins_default: blsp2_uart1_2pins { + pinmux { + function = "blsp_uart8"; + pins = "gpio4", "gpio5"; + }; + pinconf { + pins = "gpio4", "gpio5"; + drive-strength = <16>; + bias-disable; + }; + }; + + blsp2_uart1_2pins_sleep: blsp2_uart1_2pins_sleep { + pinmux { + function = "gpio"; + pins = "gpio4", "gpio5"; + }; + pinconf { + pins = "gpio4", "gpio5"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp2_uart1_4pins_default: blsp2_uart1_4pins { + pinmux { + function = "blsp_uart8"; + pins = "gpio4", "gpio5", "gpio6", "gpio7"; + }; + + pinconf { + pins = "gpio4", "gpio5", "gpio6", "gpio7"; + drive-strength = <16>; + bias-disable; + }; + }; + + blsp2_uart1_4pins_sleep: blsp2_uart1_4pins_sleep { + pinmux { + function = "gpio"; + pins = "gpio4", "gpio5", "gpio6", "gpio7"; + }; + + pinconf { + pins = "gpio4", "gpiio5", "gpio6", "gpio7"; + drive-strength = <2>; + bias-disable; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 8bf382f93b4e..22b770fa8196 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -267,3 +267,4 @@ }; }; }; +#include "msm8996-pins.dtsi" From 96f86b7d68ebaab448e1de7c9e0965adba983cc7 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Fri, 17 Jun 2016 16:14:00 +0100 Subject: [PATCH 09/22] arm64: dts: msm8996: add blsp2_uart2 pinctrl nodes. This patch adds blsp2_uart2 pinctrl nodes. Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi index 4d1dba75755d..03c1e0db100f 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi @@ -62,4 +62,54 @@ bias-disable; }; }; + + blsp2_uart2_2pins_default: blsp2_uart2_2pins { + pinmux { + function = "blsp_uart9"; + pins = "gpio49", "gpio50"; + }; + pinconf { + pins = "gpio49", "gpio50"; + drive-strength = <16>; + bias-disable; + }; + }; + + blsp2_uart2_2pins_sleep: blsp2_uart2_2pins_sleep { + pinmux { + function = "gpio"; + pins = "gpio49", "gpio50"; + }; + pinconf { + pins = "gpio49", "gpio50"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp2_uart2_4pins_default: blsp2_uart2_4pins { + pinmux { + function = "blsp_uart9"; + pins = "gpio49", "gpio50", "gpio51", "gpio52"; + }; + + pinconf { + pins = "gpio49", "gpio50", "gpio51", "gpio52"; + drive-strength = <16>; + bias-disable; + }; + }; + + blsp2_uart2_4pins_sleep: blsp2_uart2_4pins_sleep { + pinmux { + function = "gpio"; + pins = "gpio49", "gpio50", "gpio51", "gpio52"; + }; + + pinconf { + pins = "gpio49", "gpio50", "gpio51", "gpio52"; + drive-strength = <2>; + bias-disable; + }; + }; }; From fda48e610990d834918de2825cd97c37fb63dc51 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Fri, 17 Jun 2016 16:14:01 +0100 Subject: [PATCH 10/22] arm64: dts: msm8996: add support blsp2_uart2 This patch adds bslp2_uart2 node in soc so that boards that use this uart can enable it. Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 22b770fa8196..a1605f7a7196 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -161,6 +161,16 @@ status = "disabled"; }; + blsp2_uart2: serial@75b1000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x075b1000 0x1000>; + interrupts = ; + clocks = <&gcc GCC_BLSP2_UART3_APPS_CLK>, + <&gcc GCC_BLSP2_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + msmgpio: pinctrl@1010000 { compatible = "qcom,msm8996-pinctrl"; reg = <0x01010000 0x300000>; From 5f9d54ffc15fa987f626b8974447b3679abcb778 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Fri, 17 Jun 2016 16:14:02 +0100 Subject: [PATCH 11/22] arm64: dts: msm8996: add blsp1_i2c2 pinctrl nodes. This patch adds pinctrl nodes required for blsp1_i2c2. Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi index 03c1e0db100f..1f6a0a4138a7 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi @@ -13,6 +13,30 @@ &msmgpio { + blsp1_i2c2_default: blsp1_i2c2_default { + pinmux { + function = "blsp_i2c3"; + pins = "gpio47", "gpio48"; + }; + pinconf { + pins = "gpio47", "gpio48"; + drive-strength = <16>; + bias-disable = <0>; + }; + }; + + blsp1_i2c2_sleep: blsp1_i2c2_sleep { + pinmux { + function = "gpio"; + pins = "gpio47", "gpio48"; + }; + pinconf { + pins = "gpio47", "gpio48"; + drive-strength = <2>; + bias-disable = <0>; + }; + }; + blsp2_uart1_2pins_default: blsp2_uart1_2pins { pinmux { function = "blsp_uart8"; From 21a40384613cbe0f5c52623eda7ae357e2d0652a Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Fri, 17 Jun 2016 16:14:03 +0100 Subject: [PATCH 12/22] arm64: dts: msm8996: add support to blsp1_i2c2 device This patch adds blsp1_i2c2 support, as this bus is used on some of the apq8096 boards. Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index a1605f7a7196..5536bfc71a75 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -171,6 +171,21 @@ status = "disabled"; }; + blsp1_i2c2: i2c@07577000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0x07577000 0x1000>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_AHB_CLK>, + <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>; + clock-names = "iface", "core"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&blsp1_i2c2_default>; + pinctrl-1 = <&blsp1_i2c2_sleep>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + msmgpio: pinctrl@1010000 { compatible = "qcom,msm8996-pinctrl"; reg = <0x01010000 0x300000>; From 0e7f1960834f8fe782263b45d71fbf2f9ea25cef Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Fri, 17 Jun 2016 16:14:04 +0100 Subject: [PATCH 13/22] arm64: dts: msm8996: add blsp2_i2c1 pinctrl This patch adds support to blsp2_i2c1 pinctrl nodes. Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi index 1f6a0a4138a7..7017bb6e4cfb 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi @@ -87,6 +87,30 @@ }; }; + blsp2_i2c1_default: blsp2_i2c1 { + pinmux { + function = "blsp_i2c8"; + pins = "gpio6", "gpio7"; + }; + pinconf { + pins = "gpio6", "gpio7"; + drive-strength = <16>; + bias-disable; + }; + }; + + blsp2_i2c1_sleep: blsp2_i2c1_sleep { + pinmux { + function = "gpio"; + pins = "gpio6", "gpio7"; + }; + pinconf { + pins = "gpio6", "gpio7"; + drive-strength = <2>; + bias-disable; + }; + }; + blsp2_uart2_2pins_default: blsp2_uart2_2pins { pinmux { function = "blsp_uart9"; From d41d0cee9a860b64c678e75355a0e0320dbb794a Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Fri, 17 Jun 2016 16:14:05 +0100 Subject: [PATCH 14/22] arm64: dts: msm8996: add support to blsp2_i2c1 This patch adds support to blsp2_i2c1, which is used in one of the apq8096 based boards. Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 5536bfc71a75..ef3c3704014b 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -161,6 +161,21 @@ status = "disabled"; }; + blsp2_i2c1: i2c@075b6000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0x075b6000 0x1000>; + interrupts = ; + clocks = <&gcc GCC_BLSP2_AHB_CLK>, + <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>; + clock-names = "iface", "core"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&blsp2_i2c1_default>; + pinctrl-1 = <&blsp2_i2c1_sleep>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + blsp2_uart2: serial@75b1000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x075b1000 0x1000>; From e25d57c106e2963f07a22140b7c40d0dc7e52a09 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Fri, 17 Jun 2016 16:14:06 +0100 Subject: [PATCH 15/22] arm64: dts: msm8996: add support to blsp2_i2c0 pinctrl This patch adds support to blsp2_i2c0 pinctrl. Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi index 7017bb6e4cfb..79ed98c21c88 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi @@ -37,6 +37,30 @@ }; }; + blsp2_i2c0_default: blsp2_i2c0 { + pinmux { + function = "blsp_i2c7"; + pins = "gpio55", "gpio56"; + }; + pinconf { + pins = "gpio55", "gpio56"; + drive-strength = <16>; + bias-disable; + }; + }; + + blsp2_i2c0_sleep: blsp2_i2c0_sleep { + pinmux { + function = "gpio"; + pins = "gpio55", "gpio56"; + }; + pinconf { + pins = "gpio55", "gpio56"; + drive-strength = <2>; + bias-disable; + }; + }; + blsp2_uart1_2pins_default: blsp2_uart1_2pins { pinmux { function = "blsp_uart8"; From bf5443bcaa45eab238d678c7f70a934a71c15b66 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Fri, 17 Jun 2016 16:14:07 +0100 Subject: [PATCH 16/22] arm64: dts: msm8996: add support to blsp2_i2c0 This patch adds support to blsp2_i2c0, which is used on some of the APQ8096 based boards. Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index ef3c3704014b..675888fcda67 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -151,6 +151,21 @@ reg = <0x300000 0x90000>; }; + blsp2_i2c0: i2c@075b5000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0x075b5000 0x1000>; + interrupts = ; + clocks = <&gcc GCC_BLSP2_AHB_CLK>, + <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>; + clock-names = "iface", "core"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&blsp2_i2c0_default>; + pinctrl-1 = <&blsp2_i2c0_sleep>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + blsp2_uart1: serial@75b0000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x75b0000 0x1000>; From 9f05d8ff8a15cef16f43992ea636c98b85585417 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Fri, 17 Jun 2016 16:14:08 +0100 Subject: [PATCH 17/22] arm64: dts: msm8996: add support to blsp1_spi0 pinctrl This patch adds pinctrl nodes required for blsp1_spi0. Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi index 79ed98c21c88..9fd37a0295bc 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi @@ -13,6 +13,40 @@ &msmgpio { + blsp1_spi0_default: blsp1_spi0_default { + pinmux { + function = "blsp_spi1"; + pins = "gpio0", "gpio1", "gpio3"; + }; + pinmux_cs { + function = "gpio"; + pins = "gpio2"; + }; + pinconf { + pins = "gpio0", "gpio1", "gpio3"; + drive-strength = <12>; + bias-disable; + }; + pinconf_cs { + pins = "gpio2"; + drive-strength = <16>; + bias-disable; + output-high; + }; + }; + + blsp1_spi0_sleep: blsp1_spi0_sleep { + pinmux { + function = "gpio"; + pins = "gpio0", "gpio1", "gpio2", "gpio3"; + }; + pinconf { + pins = "gpio0", "gpio1", "gpio2", "gpio3"; + drive-strength = <2>; + bias-pull-down; + }; + }; + blsp1_i2c2_default: blsp1_i2c2_default { pinmux { function = "blsp_i2c3"; From 604677b415031918a7c780da91c105c41347ba3e Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Fri, 17 Jun 2016 16:14:09 +0100 Subject: [PATCH 18/22] arm64: dts: msm8996: add support to blsp1_spi0 This patch adds support to blsp1_spi0 which is used on some of APQ8096 based boards. Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 675888fcda67..e0090636491d 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -151,6 +151,21 @@ reg = <0x300000 0x90000>; }; + blsp1_spi0: spi@07575000 { + compatible = "qcom,spi-qup-v2.2.1"; + reg = <0x07575000 0x600>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&blsp1_spi0_default>; + pinctrl-1 = <&blsp1_spi0_sleep>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + blsp2_i2c0: i2c@075b5000 { compatible = "qcom,i2c-qup-v2.2.1"; reg = <0x075b5000 0x1000>; From 7dba64a23e29b8afa7525bdda4e6929d4a7ff629 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Fri, 17 Jun 2016 16:14:10 +0100 Subject: [PATCH 19/22] arm64: dts: msm8996: add support to blsp2_spi5 pinctrl This patch adds pinctrl required for blsp2_spi5 device. Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi index 9fd37a0295bc..551707a85436 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi @@ -218,4 +218,38 @@ bias-disable; }; }; + + blsp2_spi5_default: blsp2_spi5_default { + pinmux { + function = "blsp_spi12"; + pins = "gpio85", "gpio86", "gpio88"; + }; + pinmux_cs { + function = "gpio"; + pins = "gpio87"; + }; + pinconf { + pins = "gpio85", "gpio86", "gpio88"; + drive-strength = <12>; + bias-disable; + }; + pinconf_cs { + pins = "gpio87"; + drive-strength = <16>; + bias-disable; + output-high; + }; + }; + + blsp2_spi5_sleep: blsp2_spi5_sleep { + pinmux { + function = "gpio"; + pins = "gpio85", "gpio86", "gpio87", "gpio88"; + }; + pinconf { + pins = "gpio85", "gpio86", "gpio87", "gpio88"; + drive-strength = <2>; + bias-pull-down; + }; + }; }; From db6c8c83252659e42bb3881521d8bc8607dd7a09 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Fri, 17 Jun 2016 16:14:11 +0100 Subject: [PATCH 20/22] arm64: dts: msm8996: add support to blsp2_spi5 This patch adds support to blsp2_spi5 device, which is used in some of the APQ8096 based boards. Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index e0090636491d..f68b078b1cb9 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -231,6 +231,21 @@ status = "disabled"; }; + blsp2_spi5: spi@075ba000{ + compatible = "qcom,spi-qup-v2.2.1"; + reg = <0x075ba000 0x600>; + interrupts = ; + clocks = <&gcc GCC_BLSP2_QUP5_SPI_APPS_CLK>, + <&gcc GCC_BLSP2_AHB_CLK>; + clock-names = "core", "iface"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&blsp2_spi5_default>; + pinctrl-1 = <&blsp2_spi5_sleep>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + msmgpio: pinctrl@1010000 { compatible = "qcom,msm8996-pinctrl"; reg = <0x01010000 0x300000>; From 84ddf1ee1e28f790309b6132a572fad16dba4e3a Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Fri, 17 Jun 2016 16:14:12 +0100 Subject: [PATCH 21/22] arm64: dts: msm8996: add sdc2 pinctrl This patch adds pinctrl required for sdhci for external sd card controller. Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 48 ++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi index 551707a85436..659940434842 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi @@ -252,4 +252,52 @@ bias-pull-down; }; }; + + sdc2_clk_on: sdc2_clk_on { + config { + pins = "sdc2_clk"; + bias-disable; /* NO pull */ + drive-strength = <16>; /* 16 MA */ + }; + }; + + sdc2_clk_off: sdc2_clk_off { + config { + pins = "sdc2_clk"; + bias-disable; /* NO pull */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + sdc2_cmd_on: sdc2_cmd_on { + config { + pins = "sdc2_cmd"; + bias-pull-up; /* pull up */ + drive-strength = <10>; /* 10 MA */ + }; + }; + + sdc2_cmd_off: sdc2_cmd_off { + config { + pins = "sdc2_cmd"; + bias-pull-up; /* pull up */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + sdc2_data_on: sdc2_data_on { + config { + pins = "sdc2_data"; + bias-pull-up; /* pull up */ + drive-strength = <10>; /* 10 MA */ + }; + }; + + sdc2_data_off: sdc2_data_off { + config { + pins = "sdc2_data"; + bias-pull-up; /* pull up */ + drive-strength = <2>; /* 2 MA */ + }; + }; }; From a6702798980812c666a5c32e6b12c24f72ef7245 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Tue, 21 Jun 2016 18:39:53 +0100 Subject: [PATCH 22/22] arm64: dts: msm8996: add sdc2 support This patch adds support to sdc2 sdhci controller, which is used on some of the boards. Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index f68b078b1cb9..55ec3e8326b7 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -246,6 +246,21 @@ status = "disabled"; }; + sdhc2: sdhci@74a4900 { + status = "disabled"; + compatible = "qcom,sdhci-msm-v4"; + reg = <0x74a4900 0x314>, <0x74a4000 0x800>; + reg-names = "hc_mem", "core_mem"; + + interrupts = <0 125 0>, <0 221 0>; + interrupt-names = "hc_irq", "pwr_irq"; + + clock-names = "iface", "core"; + clocks = <&gcc GCC_SDCC2_AHB_CLK>, + <&gcc GCC_SDCC2_APPS_CLK>; + bus-width = <4>; + }; + msmgpio: pinctrl@1010000 { compatible = "qcom,msm8996-pinctrl"; reg = <0x01010000 0x300000>;