Blackfin SPI: cleanup according to David Brownell's review
a) platorm_driver_probe(...) instead of platform_driver_register(&driver); b) set bfin_spi_enable and bfin_spi_disable static c) Why is the width flag a u32? d) maybe use dev_dbg() instead of pr_debug() Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Bryan Wu
Linus Torvalds
parent
2ac5ee4738
commit
88b4036934
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@ -126,7 +126,7 @@ struct chip_data {
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u8 chip_select_num;
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u8 n_bytes;
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u32 width; /* 0 or 1 */
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u8 width; /* 0 or 1 */
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u8 enable_dma;
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u8 bits_per_word; /* 8 or 16 */
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u8 cs_change_per_word;
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@ -136,7 +136,7 @@ struct chip_data {
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void (*duplex) (struct driver_data *);
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};
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void bfin_spi_enable(struct driver_data *drv_data)
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static void bfin_spi_enable(struct driver_data *drv_data)
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{
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u16 cr;
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@ -145,7 +145,7 @@ void bfin_spi_enable(struct driver_data *drv_data)
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SSYNC();
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}
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void bfin_spi_disable(struct driver_data *drv_data)
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static void bfin_spi_disable(struct driver_data *drv_data)
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{
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u16 cr;
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@ -163,9 +163,6 @@ static u16 hz_to_spi_baud(u32 speed_hz)
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if ((sclk % (2 * speed_hz)) > 0)
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spi_baud++;
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pr_debug("sclk = %ld, speed_hz = %d, spi_baud = %d\n", sclk, speed_hz,
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spi_baud);
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return spi_baud;
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}
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@ -190,11 +187,12 @@ static void restore_state(struct driver_data *drv_data)
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/* Clear status and disable clock */
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write_STAT(BIT_STAT_CLR);
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bfin_spi_disable(drv_data);
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pr_debug("restoring spi ctl state\n");
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dev_dbg(&drv_data->pdev->dev, "restoring spi ctl state\n");
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#if defined(CONFIG_BF534) || defined(CONFIG_BF536) || defined(CONFIG_BF537)
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pr_debug("chip select number is %d\n", chip->chip_select_num);
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dev_dbg(&drv_data->pdev->dev,
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"chip select number is %d\n", chip->chip_select_num);
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switch (chip->chip_select_num) {
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case 1:
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bfin_write_PORTF_FER(bfin_read_PORTF_FER() | 0x3c00);
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@ -280,7 +278,8 @@ static void null_reader(struct driver_data *drv_data)
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static void u8_writer(struct driver_data *drv_data)
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{
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pr_debug("cr8-s is 0x%x\n", read_STAT());
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dev_dbg(&drv_data->pdev->dev,
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"cr8-s is 0x%x\n", read_STAT());
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while (drv_data->tx < drv_data->tx_end) {
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write_TDBR(*(u8 *) (drv_data->tx));
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while (read_STAT() & BIT_STAT_TXS)
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@ -318,7 +317,8 @@ static void u8_cs_chg_writer(struct driver_data *drv_data)
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static void u8_reader(struct driver_data *drv_data)
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{
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pr_debug("cr-8 is 0x%x\n", read_STAT());
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dev_dbg(&drv_data->pdev->dev,
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"cr-8 is 0x%x\n", read_STAT());
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/* clear TDBR buffer before read(else it will be shifted out) */
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write_TDBR(0xFFFF);
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@ -404,7 +404,9 @@ static void u8_cs_chg_duplex(struct driver_data *drv_data)
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static void u16_writer(struct driver_data *drv_data)
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{
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pr_debug("cr16 is 0x%x\n", read_STAT());
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dev_dbg(&drv_data->pdev->dev,
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"cr16 is 0x%x\n", read_STAT());
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while (drv_data->tx < drv_data->tx_end) {
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write_TDBR(*(u16 *) (drv_data->tx));
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while ((read_STAT() & BIT_STAT_TXS))
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@ -442,7 +444,8 @@ static void u16_cs_chg_writer(struct driver_data *drv_data)
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static void u16_reader(struct driver_data *drv_data)
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{
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pr_debug("cr-16 is 0x%x\n", read_STAT());
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dev_dbg(&drv_data->pdev->dev,
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"cr-16 is 0x%x\n", read_STAT());
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dummy_read();
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while (drv_data->rx < (drv_data->rx_end - 2)) {
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@ -571,12 +574,12 @@ static void giveback(struct driver_data *drv_data)
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msg->complete(msg->context);
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}
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static irqreturn_t dma_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
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static irqreturn_t dma_irq_handler(int irq, void *dev_id)
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{
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struct driver_data *drv_data = (struct driver_data *)dev_id;
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struct spi_message *msg = drv_data->cur_msg;
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pr_debug("in dma_irq_handler\n");
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dev_dbg(&drv_data->pdev->dev, "in dma_irq_handler\n");
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clear_dma_irqstat(CH_SPI);
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/*
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@ -604,7 +607,9 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
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tasklet_schedule(&drv_data->pump_transfers);
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/* free the irq handler before next transfer */
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pr_debug("disable dma channel irq%d\n", CH_SPI);
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dev_dbg(&drv_data->pdev->dev,
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"disable dma channel irq%d\n",
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CH_SPI);
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dma_disable_irq(CH_SPI);
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return IRQ_HANDLED;
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@ -617,7 +622,8 @@ static void pump_transfers(unsigned long data)
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struct spi_transfer *transfer = NULL;
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struct spi_transfer *previous = NULL;
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struct chip_data *chip = NULL;
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u16 cr, width, dma_width, dma_config;
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u8 width;
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u16 cr, dma_width, dma_config;
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u32 tranf_success = 1;
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/* Get current state information */
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@ -662,8 +668,8 @@ static void pump_transfers(unsigned long data)
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if (transfer->tx_buf != NULL) {
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drv_data->tx = (void *)transfer->tx_buf;
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drv_data->tx_end = drv_data->tx + transfer->len;
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pr_debug("tx_buf is %p, tx_end is %p\n", transfer->tx_buf,
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drv_data->tx_end);
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dev_dbg(&drv_data->pdev->dev, "tx_buf is %p, tx_end is %p\n",
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transfer->tx_buf, drv_data->tx_end);
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} else {
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drv_data->tx = NULL;
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}
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@ -671,8 +677,8 @@ static void pump_transfers(unsigned long data)
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if (transfer->rx_buf != NULL) {
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drv_data->rx = transfer->rx_buf;
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drv_data->rx_end = drv_data->rx + transfer->len;
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pr_debug("rx_buf is %p, rx_end is %p\n", transfer->rx_buf,
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drv_data->rx_end);
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dev_dbg(&drv_data->pdev->dev, "rx_buf is %p, rx_end is %p\n",
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transfer->rx_buf, drv_data->rx_end);
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} else {
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drv_data->rx = NULL;
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}
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@ -690,9 +696,9 @@ static void pump_transfers(unsigned long data)
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drv_data->write = drv_data->tx ? chip->write : null_writer;
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drv_data->read = drv_data->rx ? chip->read : null_reader;
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drv_data->duplex = chip->duplex ? chip->duplex : null_writer;
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pr_debug
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("transfer: drv_data->write is %p, chip->write is %p, null_wr is %p\n",
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drv_data->write, chip->write, null_writer);
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dev_dbg(&drv_data->pdev->dev,
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"transfer: drv_data->write is %p, chip->write is %p, null_wr is %p\n",
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drv_data->write, chip->write, null_writer);
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/* speed and width has been set on per message */
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message->state = RUNNING_STATE;
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@ -706,8 +712,9 @@ static void pump_transfers(unsigned long data)
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}
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write_FLAG(chip->flag);
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pr_debug("now pumping a transfer: width is %d, len is %d\n", width,
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transfer->len);
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dev_dbg(&drv_data->pdev->dev,
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"now pumping a transfer: width is %d, len is %d\n",
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width, transfer->len);
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/*
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* Try to map dma buffer and do a dma transfer if
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@ -722,7 +729,7 @@ static void pump_transfers(unsigned long data)
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bfin_spi_disable(drv_data);
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/* config dma channel */
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pr_debug("doing dma transfer\n");
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dev_dbg(&drv_data->pdev->dev, "doing dma transfer\n");
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if (width == CFG_SPI_WORDSIZE16) {
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set_dma_x_count(CH_SPI, drv_data->len);
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set_dma_x_modify(CH_SPI, 2);
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@ -738,7 +745,8 @@ static void pump_transfers(unsigned long data)
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/* dirty hack for autobuffer DMA mode */
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if (drv_data->tx_dma == 0xFFFF) {
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pr_debug("doing autobuffer DMA out.\n");
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dev_dbg(&drv_data->pdev->dev,
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"doing autobuffer DMA out.\n");
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/* no irq in autobuffer mode */
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dma_config =
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@ -758,7 +766,7 @@ static void pump_transfers(unsigned long data)
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/* In dma mode, rx or tx must be NULL in one transfer */
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if (drv_data->rx != NULL) {
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/* set transfer mode, and enable SPI */
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pr_debug("doing DMA in.\n");
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dev_dbg(&drv_data->pdev->dev, "doing DMA in.\n");
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/* disable SPI before write to TDBR */
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write_CTRL(cr & ~BIT_CTL_ENABLE);
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@ -781,7 +789,7 @@ static void pump_transfers(unsigned long data)
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/* set transfer mode, and enable SPI */
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write_CTRL(cr);
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} else if (drv_data->tx != NULL) {
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pr_debug("doing DMA out.\n");
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dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n");
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/* start dma */
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dma_enable_irq(CH_SPI);
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@ -796,7 +804,7 @@ static void pump_transfers(unsigned long data)
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}
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} else {
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/* IO mode write then read */
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pr_debug("doing IO transfer\n");
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dev_dbg(&drv_data->pdev->dev, "doing IO transfer\n");
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write_STAT(BIT_STAT_CLR);
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@ -804,11 +812,11 @@ static void pump_transfers(unsigned long data)
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/* full duplex mode */
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BUG_ON((drv_data->tx_end - drv_data->tx) !=
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(drv_data->rx_end - drv_data->rx));
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cr = (read_CTRL() & (~BIT_CTL_TIMOD)); /* clear the TIMOD bits */
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cr |=
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CFG_SPI_WRITE | (width << 8) | (CFG_SPI_ENABLE <<
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14);
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pr_debug("IO duplex: cr is 0x%x\n", cr);
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cr = (read_CTRL() & (~BIT_CTL_TIMOD));
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cr |= CFG_SPI_WRITE | (width << 8) |
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(CFG_SPI_ENABLE << 14);
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dev_dbg(&drv_data->pdev->dev,
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"IO duplex: cr is 0x%x\n", cr);
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write_CTRL(cr);
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SSYNC();
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@ -819,11 +827,11 @@ static void pump_transfers(unsigned long data)
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tranf_success = 0;
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} else if (drv_data->tx != NULL) {
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/* write only half duplex */
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cr = (read_CTRL() & (~BIT_CTL_TIMOD)); /* clear the TIMOD bits */
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cr |=
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CFG_SPI_WRITE | (width << 8) | (CFG_SPI_ENABLE <<
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14);
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pr_debug("IO write: cr is 0x%x\n", cr);
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cr = (read_CTRL() & (~BIT_CTL_TIMOD));
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cr |= CFG_SPI_WRITE | (width << 8) |
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(CFG_SPI_ENABLE << 14);
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dev_dbg(&drv_data->pdev->dev,
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"IO write: cr is 0x%x\n", cr);
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write_CTRL(cr);
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SSYNC();
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@ -834,11 +842,11 @@ static void pump_transfers(unsigned long data)
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tranf_success = 0;
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} else if (drv_data->rx != NULL) {
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/* read only half duplex */
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cr = (read_CTRL() & (~BIT_CTL_TIMOD)); /* cleare the TIMOD bits */
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cr |=
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CFG_SPI_READ | (width << 8) | (CFG_SPI_ENABLE <<
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14);
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pr_debug("IO read: cr is 0x%x\n", cr);
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cr = (read_CTRL() & (~BIT_CTL_TIMOD));
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cr |= CFG_SPI_READ | (width << 8) |
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(CFG_SPI_ENABLE << 14);
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dev_dbg(&drv_data->pdev->dev,
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"IO read: cr is 0x%x\n", cr);
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write_CTRL(cr);
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SSYNC();
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@ -849,7 +857,8 @@ static void pump_transfers(unsigned long data)
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}
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if (!tranf_success) {
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pr_debug("IO write error!\n");
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dev_dbg(&drv_data->pdev->dev,
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"IO write error!\n");
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message->state = ERROR_STATE;
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} else {
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/* Update total byte transfered */
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@ -899,11 +908,14 @@ static void pump_messages(struct work_struct *work)
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/* Setup the SSP using the per chip configuration */
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drv_data->cur_chip = spi_get_ctldata(drv_data->cur_msg->spi);
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restore_state(drv_data);
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pr_debug
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("got a message to pump, state is set to: baud %d, flag 0x%x, ctl 0x%x\n",
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drv_data->cur_chip->baud, drv_data->cur_chip->flag,
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drv_data->cur_chip->ctl_reg);
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pr_debug("the first transfer len is %d\n", drv_data->cur_transfer->len);
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dev_dbg(&drv_data->pdev->dev,
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"got a message to pump, state is set to: baud %d, flag 0x%x, ctl 0x%x\n",
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drv_data->cur_chip->baud, drv_data->cur_chip->flag,
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drv_data->cur_chip->ctl_reg);
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dev_dbg(&drv_data->pdev->dev,
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"the first transfer len is %d\n",
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drv_data->cur_transfer->len);
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/* Mark as busy and launch transfers */
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tasklet_schedule(&drv_data->pump_transfers);
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@ -932,7 +944,7 @@ static int transfer(struct spi_device *spi, struct spi_message *msg)
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msg->status = -EINPROGRESS;
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msg->state = START_STATE;
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pr_debug("adding an msg in transfer() \n");
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dev_dbg(&spi->dev, "adding an msg in transfer() \n");
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list_add_tail(&msg->queue, &drv_data->queue);
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if (drv_data->run == QUEUE_RUNNING && !drv_data->busy)
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@ -1002,13 +1014,13 @@ static int setup(struct spi_device *spi)
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if (chip->enable_dma && !dma_requested) {
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/* register dma irq handler */
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if (request_dma(CH_SPI, "BF53x_SPI_DMA") < 0) {
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pr_debug
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("Unable to request BlackFin SPI DMA channel\n");
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dev_dbg(&spi->dev,
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"Unable to request BlackFin SPI DMA channel\n");
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return -ENODEV;
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}
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if (set_dma_callback(CH_SPI, (void *)dma_irq_handler, drv_data)
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< 0) {
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pr_debug("Unable to set dma callback\n");
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dev_dbg(&spi->dev, "Unable to set dma callback\n");
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return -EPERM;
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}
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dma_disable_irq(CH_SPI);
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@ -1054,9 +1066,9 @@ static int setup(struct spi_device *spi)
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return -ENODEV;
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}
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pr_debug("setup spi chip %s, width is %d, dma is %d,",
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dev_dbg(&spi->dev, "setup spi chip %s, width is %d, dma is %d,",
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spi->modalias, chip->width, chip->enable_dma);
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pr_debug("ctl_reg is 0x%x, flag_reg is 0x%x\n",
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dev_dbg(&spi->dev, "ctl_reg is 0x%x, flag_reg is 0x%x\n",
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chip->ctl_reg, chip->flag);
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spi_set_ctldata(spi, chip);
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@ -1068,7 +1080,7 @@ static int setup(struct spi_device *spi)
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* callback for spi framework.
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* clean driver specific data
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*/
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static void cleanup(const struct spi_device *spi)
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static void cleanup(struct spi_device *spi)
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{
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struct chip_data *chip = spi_get_ctldata((struct spi_device *)spi);
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@ -1207,7 +1219,7 @@ static int __init bfin5xx_spi_probe(struct platform_device *pdev)
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dev_err(&pdev->dev, "problem registering spi master\n");
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goto out_error_queue_alloc;
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}
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pr_debug("controller probe successfully\n");
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dev_dbg(&pdev->dev, "controller probe successfully\n");
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return status;
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out_error_queue_alloc:
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@ -1287,27 +1299,23 @@ static int bfin5xx_spi_resume(struct platform_device *pdev)
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#endif /* CONFIG_PM */
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static struct platform_driver bfin5xx_spi_driver = {
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.driver = {
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.name = "bfin-spi-master",
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.bus = &platform_bus_type,
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.owner = THIS_MODULE,
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},
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.probe = bfin5xx_spi_probe,
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.remove = __devexit_p(bfin5xx_spi_remove),
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.suspend = bfin5xx_spi_suspend,
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.resume = bfin5xx_spi_resume,
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.driver = {
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.name = "bfin-spi-master",
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.owner = THIS_MODULE,
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},
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.suspend = bfin5xx_spi_suspend,
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.resume = bfin5xx_spi_resume,
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.remove = __devexit_p(bfin5xx_spi_remove),
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};
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static int __init bfin5xx_spi_init(void)
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{
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return platform_driver_register(&bfin5xx_spi_driver);
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return platform_driver_probe(&bfin5xx_spi_driver, bfin5xx_spi_probe);
|
||||
}
|
||||
|
||||
module_init(bfin5xx_spi_init);
|
||||
|
||||
static void __exit bfin5xx_spi_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&bfin5xx_spi_driver);
|
||||
}
|
||||
|
||||
module_exit(bfin5xx_spi_exit);
|
||||
|
|
|
|||
Loading…
Reference in New Issue