pinctrl: rockchip: avoid hardirq-unsafe functions in irq_chip
With real-time preemption, regmap functions cannot be used in the implementation of irq_chip since they use spinlocks which may sleep. Move the setting of the mux for IRQs to an irq_bus_sync_unlock handler where we are allowed to sleep. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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05709c3e88
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@ -143,6 +143,9 @@ struct rockchip_drv {
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* @gpio_chip: gpiolib chip
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* @gpio_chip: gpiolib chip
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* @grange: gpio range
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* @grange: gpio range
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* @slock: spinlock for the gpio bank
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* @slock: spinlock for the gpio bank
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* @irq_lock: bus lock for irq chip
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* @new_irqs: newly configured irqs which must be muxed as GPIOs in
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* irq_bus_sync_unlock()
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*/
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*/
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struct rockchip_pin_bank {
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struct rockchip_pin_bank {
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void __iomem *reg_base;
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void __iomem *reg_base;
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@ -165,6 +168,8 @@ struct rockchip_pin_bank {
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struct pinctrl_gpio_range grange;
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struct pinctrl_gpio_range grange;
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raw_spinlock_t slock;
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raw_spinlock_t slock;
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u32 toggle_edge_mode;
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u32 toggle_edge_mode;
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struct mutex irq_lock;
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u32 new_irqs;
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};
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};
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#define PIN_BANK(id, pins, label) \
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#define PIN_BANK(id, pins, label) \
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@ -2129,11 +2134,12 @@ static int rockchip_irq_set_type(struct irq_data *d, unsigned int type)
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int ret;
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int ret;
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/* make sure the pin is configured as gpio input */
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/* make sure the pin is configured as gpio input */
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ret = rockchip_set_mux(bank, d->hwirq, RK_FUNC_GPIO);
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ret = rockchip_verify_mux(bank, d->hwirq, RK_FUNC_GPIO);
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if (ret < 0)
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if (ret < 0)
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return ret;
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return ret;
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clk_enable(bank->clk);
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bank->new_irqs |= mask;
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raw_spin_lock_irqsave(&bank->slock, flags);
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raw_spin_lock_irqsave(&bank->slock, flags);
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data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR);
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data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR);
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@ -2191,7 +2197,6 @@ static int rockchip_irq_set_type(struct irq_data *d, unsigned int type)
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default:
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default:
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irq_gc_unlock(gc);
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irq_gc_unlock(gc);
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raw_spin_unlock_irqrestore(&bank->slock, flags);
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raw_spin_unlock_irqrestore(&bank->slock, flags);
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clk_disable(bank->clk);
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -2200,7 +2205,6 @@ static int rockchip_irq_set_type(struct irq_data *d, unsigned int type)
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irq_gc_unlock(gc);
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irq_gc_unlock(gc);
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raw_spin_unlock_irqrestore(&bank->slock, flags);
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raw_spin_unlock_irqrestore(&bank->slock, flags);
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clk_disable(bank->clk);
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return 0;
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return 0;
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}
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}
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@ -2244,6 +2248,34 @@ static void rockchip_irq_disable(struct irq_data *d)
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clk_disable(bank->clk);
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clk_disable(bank->clk);
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}
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}
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static void rockchip_irq_bus_lock(struct irq_data *d)
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{
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
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struct rockchip_pin_bank *bank = gc->private;
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clk_enable(bank->clk);
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mutex_lock(&bank->irq_lock);
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}
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static void rockchip_irq_bus_sync_unlock(struct irq_data *d)
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{
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
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struct rockchip_pin_bank *bank = gc->private;
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while (bank->new_irqs) {
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unsigned int irq = __ffs(bank->new_irqs);
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int ret;
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ret = rockchip_set_mux(bank, irq, RK_FUNC_GPIO);
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WARN_ON(ret < 0);
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bank->new_irqs &= ~BIT(irq);
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}
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mutex_unlock(&bank->irq_lock);
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clk_disable(bank->clk);
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}
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static int rockchip_interrupts_register(struct platform_device *pdev,
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static int rockchip_interrupts_register(struct platform_device *pdev,
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struct rockchip_pinctrl *info)
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struct rockchip_pinctrl *info)
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{
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{
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@ -2310,6 +2342,9 @@ static int rockchip_interrupts_register(struct platform_device *pdev,
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gc->chip_types[0].chip.irq_suspend = rockchip_irq_suspend;
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gc->chip_types[0].chip.irq_suspend = rockchip_irq_suspend;
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gc->chip_types[0].chip.irq_resume = rockchip_irq_resume;
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gc->chip_types[0].chip.irq_resume = rockchip_irq_resume;
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gc->chip_types[0].chip.irq_set_type = rockchip_irq_set_type;
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gc->chip_types[0].chip.irq_set_type = rockchip_irq_set_type;
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gc->chip_types[0].chip.irq_bus_lock = rockchip_irq_bus_lock;
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gc->chip_types[0].chip.irq_bus_sync_unlock =
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rockchip_irq_bus_sync_unlock;
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gc->wake_enabled = IRQ_MSK(bank->nr_pins);
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gc->wake_enabled = IRQ_MSK(bank->nr_pins);
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irq_set_chained_handler_and_data(bank->irq,
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irq_set_chained_handler_and_data(bank->irq,
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@ -2483,6 +2518,7 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(
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int bank_pins = 0;
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int bank_pins = 0;
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raw_spin_lock_init(&bank->slock);
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raw_spin_lock_init(&bank->slock);
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mutex_init(&bank->irq_lock);
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bank->drvdata = d;
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bank->drvdata = d;
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bank->pin_base = ctrl->nr_pins;
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bank->pin_base = ctrl->nr_pins;
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ctrl->nr_pins += bank->nr_pins;
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ctrl->nr_pins += bank->nr_pins;
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