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Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into devel

This commit is contained in:
Russell King 2009-03-25 18:31:35 +00:00 committed by Russell King
parent 997302259f ffe7f95bb1
commit 8937b7349c
461 changed files with 27858 additions and 22159 deletions
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2
CREDITS
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@ -3738,7 +3738,7 @@ S: 93149 Nittenau
S: Germany
N: Gertjan van Wingerde
E: gwingerde@home.nl
E: gwingerde@gmail.com
D: Ralink rt2x00 WLAN driver
D: Minix V2 file-system
D: Misc fixes

9
Documentation/filesystems/ext2.txt
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@ -373,10 +373,11 @@ Filesystem Resizing http://ext2resize.sourceforge.net/
Compression (*) http://e2compr.sourceforge.net/
Implementations for:
Windows 95/98/NT/2000 http://uranus.it.swin.edu.au/~jn/linux/Explore2fs.htm
Windows 95 (*) http://www.yipton.demon.co.uk/content.html#FSDEXT2
Windows 95/98/NT/2000 http://www.chrysocome.net/explore2fs
Windows 95 (*) http://www.yipton.net/content.html#FSDEXT2
DOS client (*) ftp://metalab.unc.edu/pub/Linux/system/filesystems/ext2/
OS/2 http://perso.wanadoo.fr/matthieu.willm/ext2-os2/
RISC OS client ftp://ftp.barnet.ac.uk/pub/acorn/armlinux/iscafs/
OS/2 (+) ftp://metalab.unc.edu/pub/Linux/system/filesystems/ext2/
RISC OS client http://www.esw-heim.tu-clausthal.de/~marco/smorbrod/IscaFS/
(*) no longer actively developed/supported (as of Apr 2001)
(+) no longer actively developed/supported (as of Mar 2009)

4
Documentation/filesystems/ext3.txt
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@ -198,5 +198,5 @@ kernel source: <file:fs/ext3/>
programs: http://e2fsprogs.sourceforge.net/
http://ext2resize.sourceforge.net
useful links: http://www-106.ibm.com/developerworks/linux/library/l-fs7/
http://www-106.ibm.com/developerworks/linux/library/l-fs8/
useful links: http://www.ibm.com/developerworks/library/l-fs7.html
http://www.ibm.com/developerworks/library/l-fs8.html

7
Documentation/filesystems/proc.txt
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@ -1478,6 +1478,13 @@ of problems on the network like duplicate address or bad checksums. Normally,
this should be enabled, but if the problem persists the messages can be
disabled.
netdev_budget
-------------
Maximum number of packets taken from all interfaces in one polling cycle (NAPI
poll). In one polling cycle interfaces which are registered to polling are
probed in a round-robin manner. The limit of packets in one such probe can be
set per-device via sysfs class/net/<device>/weight .
netdev_max_backlog
------------------

10
Documentation/hwmon/lm90
View File

@ -42,6 +42,11 @@ Supported chips:
Addresses scanned: I2C 0x4e
Datasheet: Publicly available at the Maxim website
http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3497
* Maxim MAX6648
Prefix: 'max6646'
Addresses scanned: I2C 0x4c
Datasheet: Publicly available at the Maxim website
http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3500
* Maxim MAX6649
Prefix: 'max6646'
Addresses scanned: I2C 0x4c
@ -74,6 +79,11 @@ Supported chips:
0x4c, 0x4d and 0x4e
Datasheet: Publicly available at the Maxim website
http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370
* Maxim MAX6692
Prefix: 'max6646'
Addresses scanned: I2C 0x4c
Datasheet: Publicly available at the Maxim website
http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3500
Author: Jean Delvare <khali@linux-fr.org>

6
Documentation/kernel-parameters.txt
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@ -830,6 +830,12 @@ and is between 256 and 4096 characters. It is defined in the file
hvc_iucv= [S390] Number of z/VM IUCV hypervisor console (HVC)
terminal devices. Valid values: 0..8
i2c_bus= [HW] Override the default board specific I2C bus speed
or register an additional I2C bus that is not
registered from board initialization code.
Format:
<bus_id>,<clkrate>
i8042.debug [HW] Toggle i8042 debug mode
i8042.direct [HW] Put keyboard port into non-translated mode
i8042.dumbkbd [HW] Pretend that controller can only read data from

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15
Documentation/logo.txt
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@ -1,13 +1,4 @@
This is the full-colour version of the currently unofficial Linux logo
("currently unofficial" just means that there has been no paperwork and
that I have not really announced it yet). It was created by Larry Ewing,
and is freely usable as long as you acknowledge Larry as the original
artist.
Note that there are black-and-white versions of this available that
scale down to smaller sizes and are better for letterheads or whatever
you want to use it for: for the full range of logos take a look at
Larry's web-page:
http://www.isc.tamu.edu/~lewing/linux/
Tux is taking a three month sabbatical to work as a barber, so Tuz is
standing in. He's taken pains to ensure you'll hardly notice.
Image by Andrew McGown and Josh Bush. Image is licensed CC BY-SA.

19
MAINTAINERS
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@ -1469,8 +1469,6 @@ L: linux-acpi@vger.kernel.org
S: Supported
DOCUMENTATION (/Documentation directory)
P: Michael Kerrisk
M: mtk.manpages@gmail.com
P: Randy Dunlap
M: rdunlap@xenotime.net
L: linux-doc@vger.kernel.org
@ -2879,7 +2877,7 @@ P: Michael Kerrisk
M: mtk.manpages@gmail.com
W: http://www.kernel.org/doc/man-pages
L: linux-man@vger.kernel.org
S: Supported
S: Maintained
MARVELL LIBERTAS WIRELESS DRIVER
P: Dan Williams
@ -3352,10 +3350,8 @@ S: Maintained
PARISC ARCHITECTURE
P: Kyle McMartin
M: kyle@mcmartin.ca
P: Matthew Wilcox
M: matthew@wil.cx
P: Grant Grundler
M: grundler@parisc-linux.org
P: Helge Deller
M: deller@gmx.de
L: linux-parisc@vger.kernel.org
W: http://www.parisc-linux.org/
T: git kernel.org:/pub/scm/linux/kernel/git/kyle/parisc-2.6.git
@ -3896,6 +3892,15 @@ L: linux-ide@vger.kernel.org
T: git kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev.git
S: Supported
SERVER ENGINES 10Gbps NIC - BladeEngine 2 DRIVER
P: Sathya Perla
M: sathyap@serverengines.com
P: Subbu Seetharaman
M: subbus@serverengines.com
L: netdev@vger.kernel.org
W: http://www.serverengines.com
S: Supported
SFC NETWORK DRIVER
P: Steve Hodgson
P: Ben Hutchings

28
Makefile
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@ -1,8 +1,8 @@
VERSION = 2
PATCHLEVEL = 6
SUBLEVEL = 29
EXTRAVERSION = -rc7
NAME = Erotic Pickled Herring
EXTRAVERSION =
NAME = Temporary Tasmanian Devil
# *DOCUMENTATION*
# To see a list of typical targets execute "make help"
@ -566,6 +566,12 @@ KBUILD_CFLAGS += $(call cc-option,-Wdeclaration-after-statement,)
# disable pointer signed / unsigned warnings in gcc 4.0
KBUILD_CFLAGS += $(call cc-option,-Wno-pointer-sign,)
# disable invalid "can't wrap" optimzations for signed / pointers
KBUILD_CFLAGS += $(call cc-option,-fwrapv)
# revert to pre-gcc-4.4 behaviour of .eh_frame
KBUILD_CFLAGS += $(call cc-option,-fno-dwarf2-cfi-asm)
# Add user supplied CPPFLAGS, AFLAGS and CFLAGS as the last assignments
# But warn user when we do so
warn-assign = \
@ -904,12 +910,18 @@ localver = $(subst $(space),, $(string) \
# and if the SCM is know a tag from the SCM is appended.
# The appended tag is determined by the SCM used.
#
# Currently, only git is supported.
# Other SCMs can edit scripts/setlocalversion and add the appropriate
# checks as needed.
# .scmversion is used when generating rpm packages so we do not loose
# the version information from the SCM when we do the build of the kernel
# from the copied source
ifdef CONFIG_LOCALVERSION_AUTO
_localver-auto = $(shell $(CONFIG_SHELL) \
$(srctree)/scripts/setlocalversion $(srctree))
ifeq ($(wildcard .scmversion),)
_localver-auto = $(shell $(CONFIG_SHELL) \
$(srctree)/scripts/setlocalversion $(srctree))
else
_localver-auto = $(shell cat .scmversion 2> /dev/null)
endif
localver-auto = $(LOCALVERSION)$(_localver-auto)
endif
@ -1537,7 +1549,7 @@ quiet_cmd_depmod = DEPMOD $(KERNELRELEASE)
cmd_depmod = \
if [ -r System.map -a -x $(DEPMOD) ]; then \
$(DEPMOD) -ae -F System.map \
$(if $(strip $(INSTALL_MOD_PATH)), -b $(INSTALL_MOD_PATH) -r) \
$(if $(strip $(INSTALL_MOD_PATH)), -b $(INSTALL_MOD_PATH) ) \
$(KERNELRELEASE); \
fi

2061
arch/arm/configs/omap_3430sdp_defconfig Normal file
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1821
arch/arm/configs/rx51_defconfig Normal file
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23
arch/arm/mach-omap1/Kconfig
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@ -7,6 +7,11 @@ config ARCH_OMAP730
select CPU_ARM926T
select ARCH_OMAP_OTG
config ARCH_OMAP850
depends on ARCH_OMAP1
bool "OMAP850 Based System"
select CPU_ARM926T
config ARCH_OMAP15XX
depends on ARCH_OMAP1
default y
@ -46,6 +51,12 @@ config MACH_OMAP_H3
TI OMAP 1710 H3 board support. Say Y here if you have such
a board.
config MACH_OMAP_HTCWIZARD
bool "HTC Wizard"
depends on ARCH_OMAP850
help
HTC Wizard smartphone support (AKA QTEK 9100, ...)
config MACH_OMAP_OSK
bool "TI OSK Support"
depends on ARCH_OMAP1 && ARCH_OMAP16XX
@ -163,7 +174,7 @@ config OMAP_ARM_216MHZ
config OMAP_ARM_195MHZ
bool "OMAP ARM 195 MHz CPU"
depends on ARCH_OMAP1 && ARCH_OMAP730
depends on ARCH_OMAP1 && (ARCH_OMAP730 || ARCH_OMAP850)
help
Enable 195MHz clock for OMAP CPU. If unsure, say N.
@ -175,13 +186,13 @@ config OMAP_ARM_192MHZ
config OMAP_ARM_182MHZ
bool "OMAP ARM 182 MHz CPU"
depends on ARCH_OMAP1 && ARCH_OMAP730
depends on ARCH_OMAP1 && (ARCH_OMAP730 || ARCH_OMAP850)
help
Enable 182MHz clock for OMAP CPU. If unsure, say N.
config OMAP_ARM_168MHZ
bool "OMAP ARM 168 MHz CPU"
depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730)
depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850)
help
Enable 168MHz clock for OMAP CPU. If unsure, say N.
@ -193,20 +204,20 @@ config OMAP_ARM_150MHZ
config OMAP_ARM_120MHZ
bool "OMAP ARM 120 MHz CPU"
depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730)
depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850)
help
Enable 120MHz clock for OMAP CPU. If unsure, say N.
config OMAP_ARM_60MHZ
bool "OMAP ARM 60 MHz CPU"
depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730)
depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850)
default y
help
Enable 60MHz clock for OMAP CPU. If unsure, say Y.
config OMAP_ARM_30MHZ
bool "OMAP ARM 30 MHz CPU"
depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730)
depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850)
help
Enable 30MHz clock for OMAP CPU. If unsure, say N.

2
arch/arm/mach-omap1/board-ams-delta.c
View File

@ -175,7 +175,6 @@ static struct omap_usb_config ams_delta_usb_config __initdata = {
static struct omap_board_config_kernel ams_delta_config[] = {
{ OMAP_TAG_LCD, &ams_delta_lcd_config },
{ OMAP_TAG_UART, &ams_delta_uart_config },
{ OMAP_TAG_USB, &ams_delta_usb_config },
};
static struct resource ams_delta_kp_resources[] = {
@ -232,6 +231,7 @@ static void __init ams_delta_init(void)
/* Clear latch2 (NAND, LCD, modem enable) */
ams_delta_latch2_write(~0, 0);
omap_usb_init(&ams_delta_usb_config);
platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices));
}

34
arch/arm/mach-omap1/board-fsample.c
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@ -34,7 +34,39 @@
#include <mach/keypad.h>
#include <mach/common.h>
#include <mach/board.h>
#include <mach/board-fsample.h>
/* fsample is pretty close to p2-sample */
#define fsample_cpld_read(reg) __raw_readb(reg)
#define fsample_cpld_write(val, reg) __raw_writeb(val, reg)
#define FSAMPLE_CPLD_BASE 0xE8100000
#define FSAMPLE_CPLD_SIZE SZ_4K
#define FSAMPLE_CPLD_START 0x05080000
#define FSAMPLE_CPLD_REG_A (FSAMPLE_CPLD_BASE + 0x00)
#define FSAMPLE_CPLD_SWITCH (FSAMPLE_CPLD_BASE + 0x02)
#define FSAMPLE_CPLD_UART (FSAMPLE_CPLD_BASE + 0x02)
#define FSAMPLE_CPLD_REG_B (FSAMPLE_CPLD_BASE + 0x04)
#define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06)
#define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06)
#define FSAMPLE_CPLD_BIT_BT_RESET 0
#define FSAMPLE_CPLD_BIT_LCD_RESET 1
#define FSAMPLE_CPLD_BIT_CAM_PWDN 2
#define FSAMPLE_CPLD_BIT_CHARGER_ENABLE 3
#define FSAMPLE_CPLD_BIT_SD_MMC_EN 4
#define FSAMPLE_CPLD_BIT_aGPS_PWREN 5
#define FSAMPLE_CPLD_BIT_BACKLIGHT 6
#define FSAMPLE_CPLD_BIT_aGPS_EN_RESET 7
#define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N 8
#define FSAMPLE_CPLD_BIT_OTG_RESET 9
#define fsample_cpld_set(bit) \
fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR)
#define fsample_cpld_clear(bit) \
fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR)
static int fsample_keymap[] = {
KEY(0,0,KEY_UP),

5
arch/arm/mach-omap1/board-generic.c
View File

@ -62,7 +62,6 @@ static struct omap_uart_config generic_uart_config __initdata = {
};
static struct omap_board_config_kernel generic_config[] __initdata = {
{ OMAP_TAG_USB, NULL },
{ OMAP_TAG_UART, &generic_uart_config },
};
@ -70,12 +69,12 @@ static void __init omap_generic_init(void)
{
#ifdef CONFIG_ARCH_OMAP15XX
if (cpu_is_omap15xx()) {
generic_config[0].data = &generic1510_usb_config;
omap_usb_init(&generic1510_usb_config);
}
#endif
#if defined(CONFIG_ARCH_OMAP16XX)
if (!cpu_is_omap1510()) {
generic_config[0].data = &generic1610_usb_config;
omap_usb_init(&generic1610_usb_config);
}
#endif

2
arch/arm/mach-omap1/board-h2-mmc.c
View File

@ -19,6 +19,8 @@
#include <mach/mmc.h>
#include <mach/gpio.h>
#include "board-h2.h"
#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
static int mmc_set_power(struct device *dev, int slot, int power_on,

7
arch/arm/mach-omap1/board-h2.c
View File

@ -46,6 +46,11 @@
#include <mach/keypad.h>
#include <mach/common.h>
#include "board-h2.h"
/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
#define OMAP1610_ETHR_START 0x04000300
static int h2_keymap[] = {
KEY(0, 0, KEY_LEFT),
KEY(0, 1, KEY_RIGHT),
@ -364,7 +369,6 @@ static struct omap_lcd_config h2_lcd_config __initdata = {
};
static struct omap_board_config_kernel h2_config[] __initdata = {
{ OMAP_TAG_USB, &h2_usb_config },
{ OMAP_TAG_UART, &h2_uart_config },
{ OMAP_TAG_LCD, &h2_lcd_config },
};
@ -413,6 +417,7 @@ static void __init h2_init(void)
omap_serial_init();
omap_register_i2c_bus(1, 100, h2_i2c_board_info,
ARRAY_SIZE(h2_i2c_board_info));
omap_usb_init(&h2_usb_config);
h2_mmc_init();
}

5
arch/arm/plat-omap/include/mach/board-h2.h → arch/arm/mach-omap1/board-h2.h
View File

@ -1,5 +1,5 @@
/*
* arch/arm/plat-omap/include/mach/board-h2.h
* arch/arm/mach-omap1/board-h2.h
*
* Hardware definitions for TI OMAP1610 H2 board.
*
@ -29,9 +29,6 @@
#ifndef __ASM_ARCH_OMAP_H2_H
#define __ASM_ARCH_OMAP_H2_H
/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
#define OMAP1610_ETHR_START 0x04000300
#define H2_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)
# define H2_TPS_GPIO_MMC_PWR_EN (H2_TPS_GPIO_BASE + 3)

2
arch/arm/mach-omap1/board-h3-mmc.c
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@ -19,6 +19,8 @@
#include <mach/mmc.h>
#include <mach/gpio.h>
#include "board-h3.h"
#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
static int mmc_set_power(struct device *dev, int slot, int power_on,

7
arch/arm/mach-omap1/board-h3.c
View File

@ -50,6 +50,11 @@
#include <mach/dma.h>
#include <mach/common.h>
#include "board-h3.h"
/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
#define OMAP1710_ETHR_START 0x04000300
#define H3_TS_GPIO 48
static int h3_keymap[] = {
@ -418,7 +423,6 @@ static struct omap_lcd_config h3_lcd_config __initdata = {
};
static struct omap_board_config_kernel h3_config[] __initdata = {
{ OMAP_TAG_USB, &h3_usb_config },
{ OMAP_TAG_UART, &h3_uart_config },
{ OMAP_TAG_LCD, &h3_lcd_config },
};
@ -472,6 +476,7 @@ static void __init h3_init(void)
omap_serial_init();
omap_register_i2c_bus(1, 100, h3_i2c_board_info,
ARRAY_SIZE(h3_i2c_board_info));
omap_usb_init(&h3_usb_config);
h3_mmc_init();
}

5
arch/arm/plat-omap/include/mach/board-h3.h → arch/arm/mach-omap1/board-h3.h
View File

@ -1,5 +1,5 @@
/*
* arch/arm/plat-omap/include/mach/board-h3.h
* arch/arm/mach-omap1/board-h3.h
*
* Copyright (C) 2001 RidgeRun, Inc.
* Copyright (C) 2004 Texas Instruments, Inc.
@ -27,9 +27,6 @@
#ifndef __ASM_ARCH_OMAP_H3_H
#define __ASM_ARCH_OMAP_H3_H
/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
#define OMAP1710_ETHR_START 0x04000300
#define H3_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)
# define H3_TPS_GPIO_MMC_PWR_EN (H3_TPS_GPIO_BASE + 4)

8
arch/arm/mach-omap1/board-innovator.c
View File

@ -39,6 +39,9 @@
#include <mach/common.h>
#include <mach/mmc.h>
/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
#define INNOVATOR1610_ETHR_START 0x04000300
static int innovator_keymap[] = {
KEY(0, 0, KEY_F1),
KEY(0, 3, KEY_DOWN),
@ -370,7 +373,6 @@ static struct omap_uart_config innovator_uart_config __initdata = {
};
static struct omap_board_config_kernel innovator_config[] = {
{ OMAP_TAG_USB, NULL },
{ OMAP_TAG_LCD, NULL },
{ OMAP_TAG_UART, &innovator_uart_config },
};
@ -392,13 +394,13 @@ static void __init innovator_init(void)
#ifdef CONFIG_ARCH_OMAP15XX
if (cpu_is_omap1510()) {
innovator_config[0].data = &innovator1510_usb_config;
omap_usb_init(&innovator1510_usb_config);
innovator_config[1].data = &innovator1510_lcd_config;
}
#endif
#ifdef CONFIG_ARCH_OMAP16XX
if (cpu_is_omap1610()) {
innovator_config[0].data = &h2_usb_config;
omap_usb_init(&h2_usb_config);
innovator_config[1].data = &innovator1610_lcd_config;
}
#endif

9
arch/arm/mach-omap1/board-nokia770.c
View File

@ -233,10 +233,6 @@ static inline void nokia770_mmc_init(void)
}
#endif
static struct omap_board_config_kernel nokia770_config[] __initdata = {
{ OMAP_TAG_USB, NULL },
};
#if defined(CONFIG_OMAP_DSP)
/*
* audio power control
@ -371,19 +367,16 @@ static __init int omap_dsp_init(void)
static void __init omap_nokia770_init(void)
{
nokia770_config[0].data = &nokia770_usb_config;
platform_add_devices(nokia770_devices, ARRAY_SIZE(nokia770_devices));
spi_register_board_info(nokia770_spi_board_info,
ARRAY_SIZE(nokia770_spi_board_info));
omap_board_config = nokia770_config;
omap_board_config_size = ARRAY_SIZE(nokia770_config);
omap_gpio_init();
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
omap_dsp_init();
ads7846_dev_init();
mipid_dev_init();
omap_usb_init(&nokia770_usb_config);
nokia770_mmc_init();
}

17
arch/arm/mach-omap1/board-osk.c
View File

@ -52,6 +52,20 @@
#include <mach/tc.h>
#include <mach/common.h>
/* At OMAP5912 OSK the Ethernet is directly connected to CS1 */
#define OMAP_OSK_ETHR_START 0x04800300
/* TPS65010 has four GPIOs. nPG and LED2 can be treated like GPIOs with
* alternate pin configurations for hardware-controlled blinking.
*/
#define OSK_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)
# define OSK_TPS_GPIO_USB_PWR_EN (OSK_TPS_GPIO_BASE + 0)
# define OSK_TPS_GPIO_LED_D3 (OSK_TPS_GPIO_BASE + 1)
# define OSK_TPS_GPIO_LAN_RESET (OSK_TPS_GPIO_BASE + 2)
# define OSK_TPS_GPIO_DSP_PWR_EN (OSK_TPS_GPIO_BASE + 3)
# define OSK_TPS_GPIO_LED_D9 (OSK_TPS_GPIO_BASE + 4)
# define OSK_TPS_GPIO_LED_D2 (OSK_TPS_GPIO_BASE + 5)
static struct mtd_partition osk_partitions[] = {
/* bootloader (U-Boot, etc) in first sector */
{
@ -290,7 +304,6 @@ static struct omap_lcd_config osk_lcd_config __initdata = {
#endif
static struct omap_board_config_kernel osk_config[] __initdata = {
{ OMAP_TAG_USB, &osk_usb_config },
{ OMAP_TAG_UART, &osk_uart_config },
#ifdef CONFIG_OMAP_OSK_MISTRAL
{ OMAP_TAG_LCD, &osk_lcd_config },
@ -541,6 +554,8 @@ static void __init osk_init(void)
l |= (3 << 1);
omap_writel(l, USB_TRANSCEIVER_CTRL);
omap_usb_init(&osk_usb_config);
/* irq for tps65010 chip */
/* bootloader effectively does: omap_cfg_reg(U19_1610_MPUIO1); */
if (gpio_request(OMAP_MPUIO(1), "tps65010") == 0)

17
arch/arm/mach-omap1/board-palmte.c
View File

@ -43,6 +43,21 @@
#include <mach/keypad.h>
#include <mach/common.h>
#define PALMTE_USBDETECT_GPIO 0
#define PALMTE_USB_OR_DC_GPIO 1
#define PALMTE_TSC_GPIO 4
#define PALMTE_PINTDAV_GPIO 6
#define PALMTE_MMC_WP_GPIO 8
#define PALMTE_MMC_POWER_GPIO 9
#define PALMTE_HDQ_GPIO 11
#define PALMTE_HEADPHONES_GPIO 14
#define PALMTE_SPEAKER_GPIO 15
#define PALMTE_DC_GPIO OMAP_MPUIO(2)
#define PALMTE_MMC_SWITCH_GPIO OMAP_MPUIO(4)
#define PALMTE_MMC1_GPIO OMAP_MPUIO(6)
#define PALMTE_MMC2_GPIO OMAP_MPUIO(7)
#define PALMTE_MMC3_GPIO OMAP_MPUIO(11)
static void __init omap_palmte_init_irq(void)
{
omap1_init_common_hw();
@ -286,7 +301,6 @@ static void palmte_get_power_status(struct apm_power_info *info, int *battery)
#endif
static struct omap_board_config_kernel palmte_config[] __initdata = {
{ OMAP_TAG_USB, &palmte_usb_config },
{ OMAP_TAG_LCD, &palmte_lcd_config },
{ OMAP_TAG_UART, &palmte_uart_config },
};
@ -341,6 +355,7 @@ static void __init omap_palmte_init(void)
spi_register_board_info(palmte_spi_info, ARRAY_SIZE(palmte_spi_info));
palmte_misc_gpio_setup();
omap_serial_init();
omap_usb_init(&palmte_usb_config);
omap_register_i2c_bus(1, 100, NULL, 0);
}

9
arch/arm/mach-omap1/board-palmtt.c
View File

@ -43,6 +43,13 @@
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#define PALMTT_USBDETECT_GPIO 0
#define PALMTT_CABLE_GPIO 1
#define PALMTT_LED_GPIO 3
#define PALMTT_PENIRQ_GPIO 6
#define PALMTT_MMC_WP_GPIO 8
#define PALMTT_HDQ_GPIO 11
static int palmtt_keymap[] = {
KEY(0, 0, KEY_ESC),
KEY(0, 1, KEY_SPACE),
@ -272,7 +279,6 @@ static struct omap_uart_config palmtt_uart_config __initdata = {
};
static struct omap_board_config_kernel palmtt_config[] __initdata = {
{ OMAP_TAG_USB, &palmtt_usb_config },
{ OMAP_TAG_LCD, &palmtt_lcd_config },
{ OMAP_TAG_UART, &palmtt_uart_config },
};
@ -297,6 +303,7 @@ static void __init omap_palmtt_init(void)
spi_register_board_info(palmtt_boardinfo,ARRAY_SIZE(palmtt_boardinfo));
omap_serial_init();
omap_usb_init(&palmtt_usb_config);
omap_register_i2c_bus(1, 100, NULL, 0);
}

12
arch/arm/mach-omap1/board-palmz71.c
View File

@ -46,6 +46,16 @@
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#define PALMZ71_USBDETECT_GPIO 0
#define PALMZ71_PENIRQ_GPIO 6
#define PALMZ71_MMC_WP_GPIO 8
#define PALMZ71_HDQ_GPIO 11
#define PALMZ71_HOTSYNC_GPIO OMAP_MPUIO(1)
#define PALMZ71_CABLE_GPIO OMAP_MPUIO(2)
#define PALMZ71_SLIDER_GPIO OMAP_MPUIO(3)
#define PALMZ71_MMC_IN_GPIO OMAP_MPUIO(4)
static void __init
omap_palmz71_init_irq(void)
{
@ -239,7 +249,6 @@ static struct omap_uart_config palmz71_uart_config __initdata = {
};
static struct omap_board_config_kernel palmz71_config[] __initdata = {
{OMAP_TAG_USB, &palmz71_usb_config},
{OMAP_TAG_LCD, &palmz71_lcd_config},
{OMAP_TAG_UART, &palmz71_uart_config},
};
@ -313,6 +322,7 @@ omap_palmz71_init(void)
spi_register_board_info(palmz71_boardinfo,
ARRAY_SIZE(palmz71_boardinfo));
omap_usb_init(&palmz71_usb_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
palmz71_gpio_setup(0);

1
arch/arm/mach-omap1/board-sx1-mmc.c
View File

@ -17,6 +17,7 @@
#include <mach/hardware.h>
#include <mach/mmc.h>
#include <mach/gpio.h>
#include <mach/board-sx1.h>
#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)

3
arch/arm/mach-omap1/board-sx1.c
View File

@ -41,6 +41,7 @@
#include <mach/board.h>
#include <mach/common.h>
#include <mach/keypad.h>
#include <mach/board-sx1.h>
/* Write to I2C device */
int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value)
@ -373,7 +374,6 @@ static struct omap_uart_config sx1_uart_config __initdata = {
};
static struct omap_board_config_kernel sx1_config[] __initdata = {
{ OMAP_TAG_USB, &sx1_usb_config },
{ OMAP_TAG_LCD, &sx1_lcd_config },
{ OMAP_TAG_UART, &sx1_uart_config },
};
@ -388,6 +388,7 @@ static void __init omap_sx1_init(void)
omap_board_config_size = ARRAY_SIZE(sx1_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, NULL, 0);
omap_usb_init(&sx1_usb_config);
sx1_mmc_init();
/* turn on USB power */

2
arch/arm/mach-omap1/board-voiceblue.c
View File

@ -145,7 +145,6 @@ static struct omap_uart_config voiceblue_uart_config __initdata = {
};
static struct omap_board_config_kernel voiceblue_config[] = {
{ OMAP_TAG_USB, &voiceblue_usb_config },
{ OMAP_TAG_UART, &voiceblue_uart_config },
};
@ -185,6 +184,7 @@ static void __init voiceblue_init(void)
omap_board_config = voiceblue_config;
omap_board_config_size = ARRAY_SIZE(voiceblue_config);
omap_serial_init();
omap_usb_init(&voiceblue_usb_config);
omap_register_i2c_bus(1, 100, NULL, 0);
/* There is a good chance board is going up, so enable power LED

2
arch/arm/mach-omap1/devices.c
View File

@ -86,7 +86,7 @@ static struct resource mbox_resources[] = {
};
static struct platform_device mbox_device = {
.name = "mailbox",
.name = "omap1-mailbox",
.id = -1,
.num_resources = ARRAY_SIZE(mbox_resources),
.resource = mbox_resources,

4
arch/arm/mach-omap1/id.c
View File

@ -38,6 +38,7 @@ static struct omap_id omap_ids[] __initdata = {
{ .jtag_id = 0xb574, .die_rev = 0x2, .omap_id = 0x03310315, .type = 0x03100000},
{ .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100},
{ .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300},
{ .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320500, .type = 0x08500000},
{ .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000},
{ .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000},
{ .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000},
@ -77,7 +78,7 @@ static u16 __init omap_get_jtag_id(void)
prod_id = omap_readl(OMAP_PRODUCTION_ID_1);
omap_id = omap_readl(OMAP32_ID_1);
/* Check for unusable OMAP_PRODUCTION_ID_1 on 1611B/5912 and 730 */
/* Check for unusable OMAP_PRODUCTION_ID_1 on 1611B/5912 and 730/850 */
if (((prod_id >> 20) == 0) || (prod_id == omap_id))
prod_id = 0;
else
@ -178,6 +179,7 @@ void __init omap_check_revision(void)
switch (cpu_type) {
case 0x07:
case 0x08:
omap_revision |= 0x07;
break;
case 0x03:

23
arch/arm/mach-omap1/io.c
View File

@ -52,6 +52,22 @@ static struct map_desc omap730_io_desc[] __initdata = {
};
#endif
#ifdef CONFIG_ARCH_OMAP850
static struct map_desc omap850_io_desc[] __initdata = {
{
.virtual = OMAP850_DSP_BASE,
.pfn = __phys_to_pfn(OMAP850_DSP_START),
.length = OMAP850_DSP_SIZE,
.type = MT_DEVICE
}, {
.virtual = OMAP850_DSPREG_BASE,
.pfn = __phys_to_pfn(OMAP850_DSPREG_START),
.length = OMAP850_DSPREG_SIZE,
.type = MT_DEVICE
}
};
#endif
#ifdef CONFIG_ARCH_OMAP15XX
static struct map_desc omap1510_io_desc[] __initdata = {
{
@ -109,6 +125,13 @@ void __init omap1_map_common_io(void)
iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc));
}
#endif
#ifdef CONFIG_ARCH_OMAP850
if (cpu_is_omap850()) {
iotable_init(omap850_io_desc, ARRAY_SIZE(omap850_io_desc));
}
#endif
#ifdef CONFIG_ARCH_OMAP15XX
if (cpu_is_omap15xx()) {
iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));

19
arch/arm/mach-omap1/irq.c
View File

@ -145,6 +145,14 @@ static struct omap_irq_bank omap730_irq_banks[] = {
};
#endif
#ifdef CONFIG_ARCH_OMAP850
static struct omap_irq_bank omap850_irq_banks[] = {
{ .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f },
{ .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 },
{ .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 },
};
#endif
#ifdef CONFIG_ARCH_OMAP15XX
static struct omap_irq_bank omap1510_irq_banks[] = {
{ .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3febfff },
@ -184,6 +192,12 @@ void __init omap_init_irq(void)
irq_bank_count = ARRAY_SIZE(omap730_irq_banks);
}
#endif
#ifdef CONFIG_ARCH_OMAP850
if (cpu_is_omap850()) {
irq_banks = omap850_irq_banks;
irq_bank_count = ARRAY_SIZE(omap850_irq_banks);
}
#endif
#ifdef CONFIG_ARCH_OMAP15XX
if (cpu_is_omap1510()) {
irq_banks = omap1510_irq_banks;
@ -214,9 +228,8 @@ void __init omap_init_irq(void)
irq_bank_writel(0x03, 1, IRQ_CONTROL_REG_OFFSET);
/* Enable interrupts in global mask */
if (cpu_is_omap730()) {
if (cpu_is_omap7xx())
irq_bank_writel(0x0, 0, IRQ_GMR_REG_OFFSET);
}
/* Install the interrupt handlers for each bank */
for (i = 0; i < irq_bank_count; i++) {
@ -236,6 +249,8 @@ void __init omap_init_irq(void)
if (cpu_is_omap730())
omap_unmask_irq(INT_730_IH2_IRQ);
else if (cpu_is_omap850())
omap_unmask_irq(INT_850_IH2_IRQ);
else if (cpu_is_omap15xx())
omap_unmask_irq(INT_1510_IH2_IRQ);
else if (cpu_is_omap16xx())

29
arch/arm/mach-omap1/mailbox.c
View File

@ -1,7 +1,7 @@
/*
* Mailbox reservation modules for DSP
*
* Copyright (C) 2006 Nokia Corporation
* Copyright (C) 2006-2009 Nokia Corporation
* Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
*
* This file is subject to the terms and conditions of the GNU General Public
@ -27,7 +27,7 @@
#define MAILBOX_DSP2ARM1_Flag 0x1c
#define MAILBOX_DSP2ARM2_Flag 0x20
unsigned long mbox_base;
static void __iomem *mbox_base;
struct omap_mbox1_fifo {
unsigned long cmd;
@ -40,14 +40,14 @@ struct omap_mbox1_priv {
struct omap_mbox1_fifo rx_fifo;
};
static inline int mbox_read_reg(unsigned int reg)
static inline int mbox_read_reg(size_t ofs)
{
return __raw_readw(mbox_base + reg);
return __raw_readw(mbox_base + ofs);
}
static inline void mbox_write_reg(unsigned int val, unsigned int reg)
static inline void mbox_write_reg(u32 val, size_t ofs)
{
__raw_writew(val, mbox_base + reg);
__raw_writew(val, mbox_base + ofs);
}
/* msg */
@ -143,7 +143,7 @@ struct omap_mbox mbox_dsp_info = {
};
EXPORT_SYMBOL(mbox_dsp_info);
static int __init omap1_mbox_probe(struct platform_device *pdev)
static int __devinit omap1_mbox_probe(struct platform_device *pdev)
{
struct resource *res;
int ret = 0;
@ -170,12 +170,10 @@ static int __init omap1_mbox_probe(struct platform_device *pdev)
}
mbox_dsp_info.irq = res->start;
ret = omap_mbox_register(&mbox_dsp_info);
return ret;
return omap_mbox_register(&pdev->dev, &mbox_dsp_info);
}
static int omap1_mbox_remove(struct platform_device *pdev)
static int __devexit omap1_mbox_remove(struct platform_device *pdev)
{
omap_mbox_unregister(&mbox_dsp_info);
@ -184,9 +182,9 @@ static int omap1_mbox_remove(struct platform_device *pdev)
static struct platform_driver omap1_mbox_driver = {
.probe = omap1_mbox_probe,
.remove = omap1_mbox_remove,
.remove = __devexit_p(omap1_mbox_remove),
.driver = {
.name = "mailbox",
.name = "omap1-mailbox",
},
};
@ -203,4 +201,7 @@ static void __exit omap1_mbox_exit(void)
module_init(omap1_mbox_init);
module_exit(omap1_mbox_exit);
MODULE_LICENSE("GPL");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("omap mailbox: omap1 architecture specific functions");
MODULE_AUTHOR("Hiroshi DOYU" <Hiroshi.DOYU@nokia.com>);
MODULE_ALIAS("platform:omap1-mailbox");

24
arch/arm/mach-omap1/mux.c
View File

@ -58,6 +58,25 @@ MUX_CFG_730("W17_730_USB_VBUSI", 2, 29, 0, 28, 0, 0)
#define OMAP730_PINS_SZ 0
#endif /* CONFIG_ARCH_OMAP730 */
#ifdef CONFIG_ARCH_OMAP850
struct pin_config __initdata_or_module omap850_pins[] = {
MUX_CFG_850("E2_850_KBR0", 12, 21, 0, 20, 1, 0)
MUX_CFG_850("J7_850_KBR1", 12, 25, 0, 24, 1, 0)
MUX_CFG_850("E1_850_KBR2", 12, 29, 0, 28, 1, 0)
MUX_CFG_850("F3_850_KBR3", 13, 1, 0, 0, 1, 0)
MUX_CFG_850("D2_850_KBR4", 13, 5, 0, 4, 1, 0)
MUX_CFG_850("C2_850_KBC0", 13, 9, 0, 8, 1, 0)
MUX_CFG_850("D3_850_KBC1", 13, 13, 0, 12, 1, 0)
MUX_CFG_850("E4_850_KBC2", 13, 17, 0, 16, 1, 0)
MUX_CFG_850("F4_850_KBC3", 13, 21, 0, 20, 1, 0)
MUX_CFG_850("E3_850_KBC4", 13, 25, 0, 24, 1, 0)
MUX_CFG_850("AA17_850_USB_DM", 2, 21, 0, 20, 0, 0)
MUX_CFG_850("W16_850_USB_PU_EN", 2, 25, 0, 24, 0, 0)
MUX_CFG_850("W17_850_USB_VBUSI", 2, 29, 0, 28, 0, 0)
};
#endif
#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
static struct pin_config __initdata_or_module omap1xxx_pins[] = {
/*
@ -419,6 +438,11 @@ int __init_or_module omap1_cfg_reg(const struct pin_config *cfg)
printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
cfg->pull_name, cfg->pull_reg, pull_orig, pull);
}
#ifdef CONFIG_ARCH_OMAP850
omap_mux_register(omap850_pins, ARRAY_SIZE(omap850_pins));
#endif
#endif
#ifdef CONFIG_OMAP_MUX_ERRORS

7
arch/arm/mach-omap1/serial.c
View File

@ -121,6 +121,13 @@ void __init omap_serial_init(void)
serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2;
}
if (cpu_is_omap850()) {
serial_platform_data[0].regshift = 0;
serial_platform_data[1].regshift = 0;
serial_platform_data[0].irq = INT_850_UART_MODEM_1;
serial_platform_data[1].irq = INT_850_UART_MODEM_IRDA_2;
}
if (cpu_is_omap15xx()) {
serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;

10
arch/arm/mach-omap2/Kconfig
View File

@ -58,4 +58,12 @@ config MACH_OVERO
config MACH_OMAP3_PANDORA
bool "OMAP3 Pandora"
depends on ARCH_OMAP3 && ARCH_OMAP34XX
depends on ARCH_OMAP3 && ARCH_OMAP34XX
config MACH_OMAP_3430SDP
bool "OMAP 3430 SDP board"
depends on ARCH_OMAP3 && ARCH_OMAP34XX
config MACH_NOKIA_RX51
bool "Nokia RX-51 board"
depends on ARCH_OMAP3 && ARCH_OMAP34XX

8
arch/arm/mach-omap2/Makefile
View File

@ -42,4 +42,12 @@ obj-$(CONFIG_MACH_OVERO) += board-overo.o \
mmc-twl4030.o
obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o \
mmc-twl4030.o
obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o \
mmc-twl4030.o
obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \
board-rx51-peripherals.o \
# Platform specific device init code
ifeq ($(CONFIG_USB_MUSB_SOC),y)
obj-y += usb-musb.o
endif

15
arch/arm/mach-omap2/board-2430sdp.c
View File

@ -35,12 +35,16 @@
#include <mach/board.h>
#include <mach/common.h>
#include <mach/gpmc.h>
#include <mach/usb.h>
#include "mmc-twl4030.h"
#define SDP2430_CS0_BASE 0x04000000
#define SDP2430_FLASH_CS 0
#define SDP2430_SMC91X_CS 5
#define SDP2430_ETHR_GPIO_IRQ 149
static struct mtd_partition sdp2430_partitions[] = {
/* bootloader (U-Boot, etc) in first sector */
{
@ -102,8 +106,8 @@ static struct resource sdp2430_smc91x_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ),
.end = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ),
.start = OMAP_GPIO_IRQ(SDP2430_ETHR_GPIO_IRQ),
.end = OMAP_GPIO_IRQ(SDP2430_ETHR_GPIO_IRQ),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
},
};
@ -170,13 +174,13 @@ static inline void __init sdp2430_init_smc91x(void)
sdp2430_smc91x_resources[0].end = cs_mem_base + 0x30f;
udelay(100);
if (gpio_request(OMAP24XX_ETHR_GPIO_IRQ, "SMC91x irq") < 0) {
if (gpio_request(SDP2430_ETHR_GPIO_IRQ, "SMC91x irq") < 0) {
printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
OMAP24XX_ETHR_GPIO_IRQ);
SDP2430_ETHR_GPIO_IRQ);
gpmc_cs_free(eth_cs);
goto out;
}
gpio_direction_input(OMAP24XX_ETHR_GPIO_IRQ);
gpio_direction_input(SDP2430_ETHR_GPIO_IRQ);
out:
clk_disable(gpmc_fck);
@ -251,6 +255,7 @@ static void __init omap_2430sdp_init(void)
omap_board_config_size = ARRAY_SIZE(sdp2430_config);
omap_serial_init();
twl4030_mmc_init(mmc);
usb_musb_init();
}
static void __init omap_2430sdp_map_io(void)

542
arch/arm/mach-omap2/board-3430sdp.c Normal file
View File

@ -0,0 +1,542 @@
/*
* linux/arch/arm/mach-omap2/board-3430sdp.c
*
* Copyright (C) 2007 Texas Instruments
*
* Modified from mach-omap2/board-generic.c
*
* Initial code: Syed Mohammed Khasim
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/input.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/i2c/twl4030.h>
#include <linux/regulator/machine.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/mcspi.h>
#include <mach/mux.h>
#include <mach/board.h>
#include <mach/usb.h>
#include <mach/common.h>
#include <mach/dma.h>
#include <mach/gpmc.h>
#include <mach/control.h>
#include <mach/keypad.h>
#include "mmc-twl4030.h"
#define CONFIG_DISABLE_HFCLK 1
#define SDP3430_ETHR_GPIO_IRQ_SDPV1 29
#define SDP3430_ETHR_GPIO_IRQ_SDPV2 6
#define SDP3430_SMC91X_CS 3
#define SDP3430_TS_GPIO_IRQ_SDPV1 3
#define SDP3430_TS_GPIO_IRQ_SDPV2 2
#define ENABLE_VAUX3_DEDICATED 0x03
#define ENABLE_VAUX3_DEV_GRP 0x20
#define TWL4030_MSECURE_GPIO 22
static struct resource sdp3430_smc91x_resources[] = {
[0] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 0,
.end = 0,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
},
};
static struct platform_device sdp3430_smc91x_device = {
.name = "smc91x",
.id = -1,
.num_resources = ARRAY_SIZE(sdp3430_smc91x_resources),
.resource = sdp3430_smc91x_resources,
};
static int sdp3430_keymap[] = {
KEY(0, 0, KEY_LEFT),
KEY(0, 1, KEY_RIGHT),
KEY(0, 2, KEY_A),
KEY(0, 3, KEY_B),
KEY(0, 4, KEY_C),
KEY(1, 0, KEY_DOWN),
KEY(1, 1, KEY_UP),
KEY(1, 2, KEY_E),
KEY(1, 3, KEY_F),
KEY(1, 4, KEY_G),
KEY(2, 0, KEY_ENTER),
KEY(2, 1, KEY_I),
KEY(2, 2, KEY_J),
KEY(2, 3, KEY_K),
KEY(2, 4, KEY_3),
KEY(3, 0, KEY_M),
KEY(3, 1, KEY_N),
KEY(3, 2, KEY_O),
KEY(3, 3, KEY_P),
KEY(3, 4, KEY_Q),
KEY(4, 0, KEY_R),
KEY(4, 1, KEY_4),
KEY(4, 2, KEY_T),
KEY(4, 3, KEY_U),
KEY(4, 4, KEY_D),
KEY(5, 0, KEY_V),
KEY(5, 1, KEY_W),
KEY(5, 2, KEY_L),
KEY(5, 3, KEY_S),
KEY(5, 4, KEY_H),
0
};
static struct twl4030_keypad_data sdp3430_kp_data = {
.rows = 5,
.cols = 6,
.keymap = sdp3430_keymap,
.keymapsize = ARRAY_SIZE(sdp3430_keymap),
.rep = 1,
};
static int ts_gpio; /* Needed for ads7846_get_pendown_state */
/**
* @brief ads7846_dev_init : Requests & sets GPIO line for pen-irq
*
* @return - void. If request gpio fails then Flag KERN_ERR.
*/
static void ads7846_dev_init(void)
{
if (gpio_request(ts_gpio, "ADS7846 pendown") < 0) {
printk(KERN_ERR "can't get ads746 pen down GPIO\n");
return;
}
gpio_direction_input(ts_gpio);
omap_set_gpio_debounce(ts_gpio, 1);
omap_set_gpio_debounce_time(ts_gpio, 0xa);
}
static int ads7846_get_pendown_state(void)
{
return !gpio_get_value(ts_gpio);
}
static struct ads7846_platform_data tsc2046_config __initdata = {
.get_pendown_state = ads7846_get_pendown_state,
.keep_vref_on = 1,
};
static struct omap2_mcspi_device_config tsc2046_mcspi_config = {
.turbo_mode = 0,
.single_channel = 1, /* 0: slave, 1: master */
};
static struct spi_board_info sdp3430_spi_board_info[] __initdata = {
[0] = {
/*
* TSC2046 operates at a max freqency of 2MHz, so
* operate slightly below at 1.5MHz
*/
.modalias = "ads7846",
.bus_num = 1,
.chip_select = 0,
.max_speed_hz = 1500000,
.controller_data = &tsc2046_mcspi_config,
.irq = 0,
.platform_data = &tsc2046_config,
},
};
static struct platform_device sdp3430_lcd_device = {
.name = "sdp2430_lcd",
.id = -1,
};
static struct regulator_consumer_supply sdp3430_vdac_supply = {
.supply = "vdac",
.dev = &sdp3430_lcd_device.dev,
};
static struct regulator_consumer_supply sdp3430_vdvi_supply = {
.supply = "vdvi",
.dev = &sdp3430_lcd_device.dev,
};
static struct platform_device *sdp3430_devices[] __initdata = {
&sdp3430_smc91x_device,
&sdp3430_lcd_device,
};
static inline void __init sdp3430_init_smc91x(void)
{
int eth_cs;
unsigned long cs_mem_base;
int eth_gpio = 0;
eth_cs = SDP3430_SMC91X_CS;
if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) {
printk(KERN_ERR "Failed to request GPMC mem for smc91x\n");
return;
}
sdp3430_smc91x_resources[0].start = cs_mem_base + 0x300;
sdp3430_smc91x_resources[0].end = cs_mem_base + 0x30f;
udelay(100);
if (omap_rev() > OMAP3430_REV_ES1_0)
eth_gpio = SDP3430_ETHR_GPIO_IRQ_SDPV2;
else
eth_gpio = SDP3430_ETHR_GPIO_IRQ_SDPV1;
sdp3430_smc91x_resources[1].start = gpio_to_irq(eth_gpio);
if (gpio_request(eth_gpio, "SMC91x irq") < 0) {
printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
eth_gpio);
return;
}
gpio_direction_input(eth_gpio);
}
static void __init omap_3430sdp_init_irq(void)
{
omap2_init_common_hw();
omap_init_irq();
omap_gpio_init();
sdp3430_init_smc91x();
}
static struct omap_uart_config sdp3430_uart_config __initdata = {
.enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
};
static struct omap_lcd_config sdp3430_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct omap_board_config_kernel sdp3430_config[] __initdata = {
{ OMAP_TAG_UART, &sdp3430_uart_config },
{ OMAP_TAG_LCD, &sdp3430_lcd_config },
};
static int sdp3430_batt_table[] = {
/* 0 C*/
30800, 29500, 28300, 27100,
26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
4040, 3910, 3790, 3670, 3550
};
static struct twl4030_bci_platform_data sdp3430_bci_data = {
.battery_tmp_tbl = sdp3430_batt_table,
.tblsize = ARRAY_SIZE(sdp3430_batt_table),
};
static struct twl4030_hsmmc_info mmc[] = {
{
.mmc = 1,
/* 8 bits (default) requires S6.3 == ON,
* so the SIM card isn't used; else 4 bits.
*/
.wires = 8,
.gpio_wp = 4,
},
{
.mmc = 2,
.wires = 8,
.gpio_wp = 7,
},
{} /* Terminator */
};
static struct regulator_consumer_supply sdp3430_vmmc1_supply = {
.supply = "vmmc",
};
static struct regulator_consumer_supply sdp3430_vsim_supply = {
.supply = "vmmc_aux",
};
static struct regulator_consumer_supply sdp3430_vmmc2_supply = {
.supply = "vmmc",
};
static int sdp3430_twl_gpio_setup(struct device *dev,
unsigned gpio, unsigned ngpio)
{
/* gpio + 0 is "mmc0_cd" (input/IRQ),
* gpio + 1 is "mmc1_cd" (input/IRQ)
*/
mmc[0].gpio_cd = gpio + 0;
mmc[1].gpio_cd = gpio + 1;
twl4030_mmc_init(mmc);
/* link regulators to MMC adapters ... we "know" the
* regulators will be set up only *after* we return.
*/
sdp3430_vmmc1_supply.dev = mmc[0].dev;
sdp3430_vsim_supply.dev = mmc[0].dev;
sdp3430_vmmc2_supply.dev = mmc[1].dev;
/* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
gpio_request(gpio + 7, "sub_lcd_en_bkl");
gpio_direction_output(gpio + 7, 0);
/* gpio + 15 is "sub_lcd_nRST" (output) */
gpio_request(gpio + 15, "sub_lcd_nRST");
gpio_direction_output(gpio + 15, 0);
return 0;
}
static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
| BIT(16) | BIT(17),
.setup = sdp3430_twl_gpio_setup,
};
static struct twl4030_usb_data sdp3430_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
static struct twl4030_madc_platform_data sdp3430_madc_data = {
.irq_line = 1,
};
/*
* Apply all the fixed voltages since most versions of U-Boot
* don't bother with that initialization.
*/
/* VAUX1 for mainboard (irda and sub-lcd) */
static struct regulator_init_data sdp3430_vaux1 = {
.constraints = {
.min_uV = 2800000,
.max_uV = 2800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
/* VAUX2 for camera module */
static struct regulator_init_data sdp3430_vaux2 = {
.constraints = {
.min_uV = 2800000,
.max_uV = 2800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
/* VAUX3 for LCD board */
static struct regulator_init_data sdp3430_vaux3 = {
.constraints = {
.min_uV = 2800000,
.max_uV = 2800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
/* VAUX4 for OMAP VDD_CSI2 (camera) */
static struct regulator_init_data sdp3430_vaux4 = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
static struct regulator_init_data sdp3430_vmmc1 = {
.constraints = {
.min_uV = 1850000,
.max_uV = 3150000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
| REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = &sdp3430_vmmc1_supply,
};
/* VMMC2 for MMC2 card */
static struct regulator_init_data sdp3430_vmmc2 = {
.constraints = {
.min_uV = 1850000,
.max_uV = 1850000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = &sdp3430_vmmc2_supply,
};
/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
static struct regulator_init_data sdp3430_vsim = {
.constraints = {
.min_uV = 1800000,
.max_uV = 3000000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
| REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = &sdp3430_vsim_supply,
};
/* VDAC for DSS driving S-Video */
static struct regulator_init_data sdp3430_vdac = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = &sdp3430_vdac_supply,
};
/* VPLL2 for digital video outputs */
static struct regulator_init_data sdp3430_vpll2 = {
.constraints = {
.name = "VDVI",
.min_uV = 1800000,
.max_uV = 1800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = &sdp3430_vdvi_supply,
};
static struct twl4030_platform_data sdp3430_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end = TWL4030_IRQ_END,
/* platform_data for children goes here */
.bci = &sdp3430_bci_data,
.gpio = &sdp3430_gpio_data,
.madc = &sdp3430_madc_data,
.keypad = &sdp3430_kp_data,
.usb = &sdp3430_usb_data,
.vaux1 = &sdp3430_vaux1,
.vaux2 = &sdp3430_vaux2,
.vaux3 = &sdp3430_vaux3,
.vaux4 = &sdp3430_vaux4,
.vmmc1 = &sdp3430_vmmc1,
.vmmc2 = &sdp3430_vmmc2,
.vsim = &sdp3430_vsim,
.vdac = &sdp3430_vdac,
.vpll2 = &sdp3430_vpll2,
};
static struct i2c_board_info __initdata sdp3430_i2c_boardinfo[] = {
{
I2C_BOARD_INFO("twl4030", 0x48),
.flags = I2C_CLIENT_WAKE,
.irq = INT_34XX_SYS_NIRQ,
.platform_data = &sdp3430_twldata,
},
};
static int __init omap3430_i2c_init(void)
{
/* i2c1 for PMIC only */
omap_register_i2c_bus(1, 2600, sdp3430_i2c_boardinfo,
ARRAY_SIZE(sdp3430_i2c_boardinfo));
/* i2c2 on camera connector (for sensor control) and optional isp1301 */
omap_register_i2c_bus(2, 400, NULL, 0);
/* i2c3 on display connector (for DVI, tfp410) */
omap_register_i2c_bus(3, 400, NULL, 0);
return 0;
}
static void __init omap_3430sdp_init(void)
{
omap3430_i2c_init();
platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices));
omap_board_config = sdp3430_config;
omap_board_config_size = ARRAY_SIZE(sdp3430_config);
if (omap_rev() > OMAP3430_REV_ES1_0)
ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2;
else
ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV1;
sdp3430_spi_board_info[0].irq = gpio_to_irq(ts_gpio);
spi_register_board_info(sdp3430_spi_board_info,
ARRAY_SIZE(sdp3430_spi_board_info));
ads7846_dev_init();
omap_serial_init();
usb_musb_init();
}
static void __init omap_3430sdp_map_io(void)
{
omap2_set_globals_343x();
omap2_map_common_io();
}
MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
/* Maintainer: Syed Khasim - Texas Instruments Inc */
.phys_io = 0x48000000,
.io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
.boot_params = 0x80000100,
.map_io = omap_3430sdp_map_io,
.init_irq = omap_3430sdp_init_irq,
.init_machine = omap_3430sdp_init,
.timer = &omap_timer,
MACHINE_END

3
arch/arm/mach-omap2/board-apollon.c
View File

@ -51,6 +51,7 @@
#define APOLLON_FLASH_CS 0
#define APOLLON_ETH_CS 1
#define APOLLON_ETHR_GPIO_IRQ 74
static struct mtd_partition apollon_partitions[] = {
{
@ -272,7 +273,6 @@ static struct omap_lcd_config apollon_lcd_config __initdata = {
static struct omap_board_config_kernel apollon_config[] = {
{ OMAP_TAG_UART, &apollon_uart_config },
{ OMAP_TAG_USB, &apollon_usb_config },
{ OMAP_TAG_LCD, &apollon_lcd_config },
};
@ -299,6 +299,7 @@ static void __init apollon_usb_init(void)
omap_cfg_reg(P21_242X_GPIO12);
gpio_request(12, "USB suspend");
gpio_direction_output(12, 0);
omap_usb_init(&apollon_usb_config);
}
static void __init omap_apollon_init(void)

38
arch/arm/mach-omap2/board-h4.c
View File

@ -47,6 +47,8 @@
#define H4_FLASH_CS 0
#define H4_SMC91X_CS 1
#define H4_ETHR_GPIO_IRQ 92
static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 };
static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 };
@ -341,7 +343,7 @@ static inline void __init h4_init_debug(void)
udelay(100);
omap_cfg_reg(M15_24XX_GPIO92);
if (debug_card_init(cs_mem_base, OMAP24XX_ETHR_GPIO_IRQ) < 0)
if (debug_card_init(cs_mem_base, H4_ETHR_GPIO_IRQ) < 0)
gpmc_cs_free(eth_cs);
out:
@ -377,6 +379,39 @@ static struct omap_lcd_config h4_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct omap_usb_config h4_usb_config __initdata = {
#ifdef CONFIG_MACH_OMAP2_H4_USB1
/* NOTE: usb1 could also be used with 3 wire signaling */
.pins[1] = 4,
#endif
#ifdef CONFIG_MACH_OMAP_H4_OTG
/* S1.10 ON -- USB OTG port
* usb0 switched to Mini-AB port and isp1301 transceiver;
* S2.POS3 = OFF, S2.POS4 = ON ... to allow battery charging
*/
.otg = 1,
.pins[0] = 4,
#ifdef CONFIG_USB_GADGET_OMAP
/* use OTG cable, or standard A-to-MiniB */
.hmc_mode = 0x14, /* 0:dev/otg 1:host 2:disable */
#elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
/* use OTG cable, or NONSTANDARD (B-to-MiniB) */
.hmc_mode = 0x11, /* 0:host 1:host 2:disable */
#endif /* XX */
#else
/* S1.10 OFF -- usb "download port"
* usb0 switched to Mini-B port and isp1105 transceiver;
* S2.POS3 = ON, S2.POS4 = OFF ... to enable battery charging
*/
.register_dev = 1,
.pins[0] = 3,
/* .hmc_mode = 0x14,*/ /* 0:dev 1:host 2:disable */
.hmc_mode = 0x00, /* 0:dev|otg 1:disable 2:disable */
#endif
};
static struct omap_board_config_kernel h4_config[] = {
{ OMAP_TAG_UART, &h4_uart_config },
{ OMAP_TAG_LCD, &h4_lcd_config },
@ -428,6 +463,7 @@ static void __init omap_h4_init(void)
platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices));
omap_board_config = h4_config;
omap_board_config_size = ARRAY_SIZE(h4_config);
omap_usb_init(&h4_usb_config);
omap_serial_init();
}

12
arch/arm/mach-omap2/board-ldp.c
View File

@ -29,7 +29,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/board-ldp.h>
#include <mach/mcspi.h>
#include <mach/gpio.h>
#include <mach/board.h>
@ -38,15 +37,19 @@
#include <asm/delay.h>
#include <mach/control.h>
#include <mach/usb.h>
#include "mmc-twl4030.h"
#define SDP3430_SMC91X_CS 3
#define LDP_SMC911X_CS 1
#define LDP_SMC911X_GPIO 152
#define DEBUG_BASE 0x08000000
#define LDP_ETHR_START DEBUG_BASE
static struct resource ldp_smc911x_resources[] = {
[0] = {
.start = OMAP34XX_ETHR_START,
.end = OMAP34XX_ETHR_START + SZ_4K,
.start = LDP_ETHR_START,
.end = LDP_ETHR_START + SZ_4K,
.flags = IORESOURCE_MEM,
},
[1] = {
@ -162,6 +165,7 @@ static void __init omap_ldp_init(void)
omap_board_config_size = ARRAY_SIZE(ldp_config);
omap_serial_init();
twl4030_mmc_init(mmc);
usb_musb_init();
}
static void __init omap_ldp_map_io(void)

5
arch/arm/mach-omap2/board-omap3beagle.c
View File

@ -41,6 +41,7 @@
#include <mach/gpmc.h>
#include <mach/nand.h>
#include <mach/mux.h>
#include <mach/usb.h>
#include "mmc-twl4030.h"
@ -175,9 +176,6 @@ static int __init omap3_beagle_i2c_init(void)
{
omap_register_i2c_bus(1, 2600, beagle_i2c_boardinfo,
ARRAY_SIZE(beagle_i2c_boardinfo));
#ifdef CONFIG_I2C2_OMAP_BEAGLE
omap_register_i2c_bus(2, 400, NULL, 0);
#endif
/* Bus 3 is attached to the DVI port where devices like the pico DLP
* projector don't work reliably with 400kHz */
omap_register_i2c_bus(3, 100, NULL, 0);
@ -316,6 +314,7 @@ static void __init omap3_beagle_init(void)
/* REVISIT leave DVI powered down until it's needed ... */
gpio_direction_output(170, true);
usb_musb_init();
omap3beagle_flash_init();
}

9
arch/arm/mach-omap2/board-omap3pandora.c
View File

@ -34,6 +34,7 @@
#include <mach/gpio.h>
#include <mach/hardware.h>
#include <mach/mcspi.h>
#include <mach/usb.h>
#include "mmc-twl4030.h"
@ -53,6 +54,13 @@ static struct twl4030_hsmmc_info omap3pandora_mmc[] = {
.gpio_cd = -EINVAL,
.gpio_wp = 127,
.ext_clock = 1,
.transceiver = true,
},
{
.mmc = 3,
.wires = 4,
.gpio_cd = -EINVAL,
.gpio_wp = -EINVAL,
},
{} /* Terminator */
};
@ -193,6 +201,7 @@ static void __init omap3pandora_init(void)
spi_register_board_info(omap3pandora_spi_board_info,
ARRAY_SIZE(omap3pandora_spi_board_info));
omap3pandora_ads7846_init();
usb_musb_init();
}
static void __init omap3pandora_map_io(void)

70
arch/arm/mach-omap2/board-overo.c
View File

@ -37,20 +37,85 @@
#include <asm/mach/flash.h>
#include <asm/mach/map.h>
#include <mach/board-overo.h>
#include <mach/board.h>
#include <mach/common.h>
#include <mach/gpio.h>
#include <mach/gpmc.h>
#include <mach/hardware.h>
#include <mach/nand.h>
#include <mach/usb.h>
#include "mmc-twl4030.h"
#define OVERO_GPIO_BT_XGATE 15
#define OVERO_GPIO_W2W_NRESET 16
#define OVERO_GPIO_BT_NRESET 164
#define OVERO_GPIO_USBH_CPEN 168
#define OVERO_GPIO_USBH_NRESET 183
#define NAND_BLOCK_SIZE SZ_128K
#define GPMC_CS0_BASE 0x60
#define GPMC_CS_SIZE 0x30
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
#include <mach/mcspi.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
static struct omap2_mcspi_device_config ads7846_mcspi_config = {
.turbo_mode = 0,
.single_channel = 1, /* 0: slave, 1: master */
};
static int ads7846_get_pendown_state(void)
{
return !gpio_get_value(OVERO_GPIO_PENDOWN);
}
static struct ads7846_platform_data ads7846_config = {
.x_max = 0x0fff,
.y_max = 0x0fff,
.x_plate_ohms = 180,
.pressure_max = 255,
.debounce_max = 10,
.debounce_tol = 3,
.debounce_rep = 1,
.get_pendown_state = ads7846_get_pendown_state,
.keep_vref_on = 1,
};
static struct spi_board_info overo_spi_board_info[] __initdata = {
{
.modalias = "ads7846",
.bus_num = 1,
.chip_select = 0,
.max_speed_hz = 1500000,
.controller_data = &ads7846_mcspi_config,
.irq = OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN),
.platform_data = &ads7846_config,
}
};
static void __init overo_ads7846_init(void)
{
if ((gpio_request(OVERO_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) &&
(gpio_direction_input(OVERO_GPIO_PENDOWN) == 0)) {
gpio_export(OVERO_GPIO_PENDOWN, 0);
} else {
printk(KERN_ERR "could not obtain gpio for ADS7846_PENDOWN\n");
return;
}
spi_register_board_info(overo_spi_board_info,
ARRAY_SIZE(overo_spi_board_info));
}
#else
static inline void __init overo_ads7846_init(void) { return; }
#endif
static struct mtd_partition overo_nand_partitions[] = {
{
.name = "xloader",
@ -209,6 +274,7 @@ static struct twl4030_hsmmc_info mmc[] __initdata = {
.wires = 4,
.gpio_cd = -EINVAL,
.gpio_wp = -EINVAL,
.transceiver = true,
},
{} /* Terminator */
};
@ -222,6 +288,8 @@ static void __init overo_init(void)
omap_serial_init();
twl4030_mmc_init(mmc);
overo_flash_init();
usb_musb_init();
overo_ads7846_init();
if ((gpio_request(OVERO_GPIO_W2W_NRESET,
"OVERO_GPIO_W2W_NRESET") == 0) &&

419
arch/arm/mach-omap2/board-rx51-peripherals.c Normal file
View File

@ -0,0 +1,419 @@
/*
* linux/arch/arm/mach-omap2/board-rx51-flash.c
*
* Copyright (C) 2008-2009 Nokia
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/input.h>
#include <linux/spi/spi.h>
#include <linux/i2c.h>
#include <linux/i2c/twl4030.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/regulator/machine.h>
#include <linux/gpio.h>
#include <mach/mcspi.h>
#include <mach/mux.h>
#include <mach/board.h>
#include <mach/common.h>
#include <mach/dma.h>
#include <mach/gpmc.h>
#include <mach/keypad.h>
#include "mmc-twl4030.h"
#define SMC91X_CS 1
#define SMC91X_GPIO_IRQ 54
#define SMC91X_GPIO_RESET 164
#define SMC91X_GPIO_PWRDWN 86
static struct resource rx51_smc91x_resources[] = {
[0] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
},
};
static struct platform_device rx51_smc91x_device = {
.name = "smc91x",
.id = -1,
.num_resources = ARRAY_SIZE(rx51_smc91x_resources),
.resource = rx51_smc91x_resources,
};
static int rx51_keymap[] = {
KEY(0, 0, KEY_Q),
KEY(0, 1, KEY_W),
KEY(0, 2, KEY_E),
KEY(0, 3, KEY_R),
KEY(0, 4, KEY_T),
KEY(0, 5, KEY_Y),
KEY(0, 6, KEY_U),
KEY(0, 7, KEY_I),
KEY(1, 0, KEY_O),
KEY(1, 1, KEY_D),
KEY(1, 2, KEY_DOT),
KEY(1, 3, KEY_V),
KEY(1, 4, KEY_DOWN),
KEY(2, 0, KEY_P),
KEY(2, 1, KEY_F),
KEY(2, 2, KEY_UP),
KEY(2, 3, KEY_B),
KEY(2, 4, KEY_RIGHT),
KEY(3, 0, KEY_COMMA),
KEY(3, 1, KEY_G),
KEY(3, 2, KEY_ENTER),
KEY(3, 3, KEY_N),
KEY(4, 0, KEY_BACKSPACE),
KEY(4, 1, KEY_H),
KEY(4, 3, KEY_M),
KEY(4, 4, KEY_LEFTCTRL),
KEY(5, 1, KEY_J),
KEY(5, 2, KEY_Z),
KEY(5, 3, KEY_SPACE),
KEY(5, 4, KEY_LEFTSHIFT),
KEY(6, 0, KEY_A),
KEY(6, 1, KEY_K),
KEY(6, 2, KEY_X),
KEY(6, 3, KEY_SPACE),
KEY(6, 4, KEY_FN),
KEY(7, 0, KEY_S),
KEY(7, 1, KEY_L),
KEY(7, 2, KEY_C),
KEY(7, 3, KEY_LEFT),
KEY(0xff, 0, KEY_F6),
KEY(0xff, 1, KEY_F7),
KEY(0xff, 2, KEY_F8),
KEY(0xff, 4, KEY_F9),
KEY(0xff, 5, KEY_F10),
};
static struct twl4030_keypad_data rx51_kp_data = {
.rows = 8,
.cols = 8,
.keymap = rx51_keymap,
.keymapsize = ARRAY_SIZE(rx51_keymap),
.rep = 1,
};
static struct platform_device *rx51_peripherals_devices[] = {
&rx51_smc91x_device,
};
/*
* Timings are taken from smsc-lan91c96-ms.pdf
*/
static int smc91x_init_gpmc(int cs)
{
struct gpmc_timings t;
const int t2_r = 45; /* t2 in Figure 12.10 */
const int t2_w = 30; /* t2 in Figure 12.11 */
const int t3 = 15; /* t3 in Figure 12.10 */
const int t5_r = 0; /* t5 in Figure 12.10 */
const int t6_r = 45; /* t6 in Figure 12.10 */
const int t6_w = 0; /* t6 in Figure 12.11 */
const int t7_w = 15; /* t7 in Figure 12.11 */
const int t15 = 12; /* t15 in Figure 12.2 */
const int t20 = 185; /* t20 in Figure 12.2 */
memset(&t, 0, sizeof(t));
t.cs_on = t15;
t.cs_rd_off = t3 + t2_r + t5_r; /* Figure 12.10 */
t.cs_wr_off = t3 + t2_w + t6_w; /* Figure 12.11 */
t.adv_on = t3; /* Figure 12.10 */
t.adv_rd_off = t3 + t2_r; /* Figure 12.10 */
t.adv_wr_off = t3 + t2_w; /* Figure 12.11 */
t.oe_off = t3 + t2_r + t5_r; /* Figure 12.10 */
t.oe_on = t.oe_off - t6_r; /* Figure 12.10 */
t.we_off = t3 + t2_w + t6_w; /* Figure 12.11 */
t.we_on = t.we_off - t7_w; /* Figure 12.11 */
t.rd_cycle = t20; /* Figure 12.2 */
t.wr_cycle = t20; /* Figure 12.4 */
t.access = t3 + t2_r + t5_r; /* Figure 12.10 */
t.wr_access = t3 + t2_w + t6_w; /* Figure 12.11 */
gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, GPMC_CONFIG1_DEVICESIZE_16);
return gpmc_cs_set_timings(cs, &t);
}
static void __init rx51_init_smc91x(void)
{
unsigned long cs_mem_base;
int ret;
omap_cfg_reg(U8_34XX_GPIO54_DOWN);
omap_cfg_reg(G25_34XX_GPIO86_OUT);
omap_cfg_reg(H19_34XX_GPIO164_OUT);
if (gpmc_cs_request(SMC91X_CS, SZ_16M, &cs_mem_base) < 0) {
printk(KERN_ERR "Failed to request GPMC mem for smc91x\n");
return;
}
rx51_smc91x_resources[0].start = cs_mem_base + 0x300;
rx51_smc91x_resources[0].end = cs_mem_base + 0x30f;
smc91x_init_gpmc(SMC91X_CS);
if (gpio_request(SMC91X_GPIO_IRQ, "SMC91X irq") < 0)
goto free1;
gpio_direction_input(SMC91X_GPIO_IRQ);
rx51_smc91x_resources[1].start = gpio_to_irq(SMC91X_GPIO_IRQ);
ret = gpio_request(SMC91X_GPIO_PWRDWN, "SMC91X powerdown");
if (ret)
goto free2;
gpio_direction_output(SMC91X_GPIO_PWRDWN, 0);
ret = gpio_request(SMC91X_GPIO_RESET, "SMC91X reset");
if (ret)
goto free3;
gpio_direction_output(SMC91X_GPIO_RESET, 0);
gpio_set_value(SMC91X_GPIO_RESET, 1);
msleep(100);
gpio_set_value(SMC91X_GPIO_RESET, 0);
return;
free3:
gpio_free(SMC91X_GPIO_PWRDWN);
free2:
gpio_free(SMC91X_GPIO_IRQ);
free1:
gpmc_cs_free(SMC91X_CS);
printk(KERN_ERR "Could not initialize smc91x\n");
}
static struct twl4030_madc_platform_data rx51_madc_data = {
.irq_line = 1,
};
static struct twl4030_hsmmc_info mmc[] = {
{
.name = "external",
.mmc = 1,
.wires = 4,
.cover_only = true,
.gpio_cd = 160,
.gpio_wp = -EINVAL,
},
{
.name = "internal",
.mmc = 2,
.wires = 8,
.gpio_cd = -EINVAL,
.gpio_wp = -EINVAL,
},
{} /* Terminator */
};
static struct regulator_consumer_supply rx51_vmmc1_supply = {
.supply = "vmmc",
};
static struct regulator_consumer_supply rx51_vmmc2_supply = {
.supply = "vmmc",
};
static struct regulator_consumer_supply rx51_vsim_supply = {
.supply = "vmmc_aux",
};
static struct regulator_init_data rx51_vaux1 = {
.constraints = {
.name = "V28",
.min_uV = 2800000,
.max_uV = 2800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
static struct regulator_init_data rx51_vaux2 = {
.constraints = {
.name = "VCSI",
.min_uV = 1800000,
.max_uV = 1800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
/* VAUX3 - adds more power to VIO_18 rail */
static struct regulator_init_data rx51_vaux3 = {
.constraints = {
.name = "VCAM_DIG_18",
.min_uV = 1800000,
.max_uV = 1800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
static struct regulator_init_data rx51_vaux4 = {
.constraints = {
.name = "VCAM_ANA_28",
.min_uV = 2800000,
.max_uV = 2800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
static struct regulator_init_data rx51_vmmc1 = {
.constraints = {
.min_uV = 1850000,
.max_uV = 3150000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
| REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = &rx51_vmmc1_supply,
};
static struct regulator_init_data rx51_vmmc2 = {
.constraints = {
.name = "VMMC2_30",
.min_uV = 1850000,
.max_uV = 3150000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
| REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = &rx51_vmmc2_supply,
};
static struct regulator_init_data rx51_vsim = {
.constraints = {
.name = "VMMC2_IO_18",
.min_uV = 1800000,
.max_uV = 1800000,
.apply_uV = true,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = 1,
.consumer_supplies = &rx51_vsim_supply,
};
static struct regulator_init_data rx51_vdac = {
.constraints = {
.min_uV = 1800000,
.max_uV = 1800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL
| REGULATOR_MODE_STANDBY,
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
| REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
};
static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
{
/* FIXME this gpio setup is just a placeholder for now */
gpio_request(gpio + 6, "backlight_pwm");
gpio_direction_output(gpio + 6, 0);
gpio_request(gpio + 7, "speaker_en");
gpio_direction_output(gpio + 7, 1);
/* set up MMC adapters, linking their regulators to them */
twl4030_mmc_init(mmc);
rx51_vmmc1_supply.dev = mmc[0].dev;
rx51_vmmc2_supply.dev = mmc[1].dev;
rx51_vsim_supply.dev = mmc[1].dev;
return 0;
}
static struct twl4030_gpio_platform_data rx51_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3)
| BIT(4) | BIT(5)
| BIT(8) | BIT(9) | BIT(10) | BIT(11)
| BIT(12) | BIT(13) | BIT(14) | BIT(15)
| BIT(16) | BIT(17) ,
.setup = rx51_twlgpio_setup,
};
static struct twl4030_platform_data rx51_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end = TWL4030_IRQ_END,
/* platform_data for children goes here */
.gpio = &rx51_gpio_data,
.keypad = &rx51_kp_data,
.madc = &rx51_madc_data,
.vaux1 = &rx51_vaux1,
.vaux2 = &rx51_vaux2,
.vaux3 = &rx51_vaux3,
.vaux4 = &rx51_vaux4,
.vmmc1 = &rx51_vmmc1,
.vmmc2 = &rx51_vmmc2,
.vsim = &rx51_vsim,
.vdac = &rx51_vdac,
};
static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = {
{
I2C_BOARD_INFO("twl5030", 0x48),
.flags = I2C_CLIENT_WAKE,
.irq = INT_34XX_SYS_NIRQ,
.platform_data = &rx51_twldata,
},
};
static int __init rx51_i2c_init(void)
{
omap_register_i2c_bus(1, 2600, rx51_peripherals_i2c_board_info_1,
ARRAY_SIZE(rx51_peripherals_i2c_board_info_1));
omap_register_i2c_bus(2, 100, NULL, 0);
omap_register_i2c_bus(3, 400, NULL, 0);
return 0;
}
void __init rx51_peripherals_init(void)
{
platform_add_devices(rx51_peripherals_devices,
ARRAY_SIZE(rx51_peripherals_devices));
rx51_i2c_init();
rx51_init_smc91x();
}

96
arch/arm/mach-omap2/board-rx51.c Normal file
View File

@ -0,0 +1,96 @@
/*
* linux/arch/arm/mach-omap2/board-rx51.c
*
* Copyright (C) 2007, 2008 Nokia
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/mcspi.h>
#include <mach/mux.h>
#include <mach/board.h>
#include <mach/common.h>
#include <mach/keypad.h>
#include <mach/dma.h>
#include <mach/gpmc.h>
#include <mach/usb.h>
static struct omap_uart_config rx51_uart_config = {
.enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
};
static struct omap_lcd_config rx51_lcd_config = {
.ctrl_name = "internal",
};
static struct omap_fbmem_config rx51_fbmem0_config = {
.size = 752 * 1024,
};
static struct omap_fbmem_config rx51_fbmem1_config = {
.size = 752 * 1024,
};
static struct omap_fbmem_config rx51_fbmem2_config = {
.size = 752 * 1024,
};
static struct omap_board_config_kernel rx51_config[] = {
{ OMAP_TAG_UART, &rx51_uart_config },
{ OMAP_TAG_FBMEM, &rx51_fbmem0_config },
{ OMAP_TAG_FBMEM, &rx51_fbmem1_config },
{ OMAP_TAG_FBMEM, &rx51_fbmem2_config },
{ OMAP_TAG_LCD, &rx51_lcd_config },
};
static void __init rx51_init_irq(void)
{
omap2_init_common_hw();
omap_init_irq();
omap_gpio_init();
}
extern void __init rx51_peripherals_init(void);
static void __init rx51_init(void)
{
omap_board_config = rx51_config;
omap_board_config_size = ARRAY_SIZE(rx51_config);
omap_serial_init();
usb_musb_init();
rx51_peripherals_init();
}
static void __init rx51_map_io(void)
{
omap2_set_globals_343x();
omap2_map_common_io();
}
MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
/* Maintainer: Lauri Leukkunen <lauri.leukkunen@nokia.com> */
.phys_io = 0x48000000,
.io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
.boot_params = 0x80000100,
.map_io = rx51_map_io,
.init_irq = rx51_init_irq,
.init_machine = rx51_init,
.timer = &omap_timer,
MACHINE_END

147
arch/arm/mach-omap2/devices.c
View File

@ -28,13 +28,121 @@
#include <mach/eac.h>
#include <mach/mmc.h>
#if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)
#define OMAP2_MBOX_BASE IO_ADDRESS(OMAP24XX_MAILBOX_BASE)
#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
static struct resource mbox_resources[] = {
static struct resource cam_resources[] = {
{
.start = OMAP2_MBOX_BASE,
.end = OMAP2_MBOX_BASE + 0x11f,
.start = OMAP24XX_CAMERA_BASE,
.end = OMAP24XX_CAMERA_BASE + 0xfff,
.flags = IORESOURCE_MEM,
},
{
.start = INT_24XX_CAM_IRQ,
.flags = IORESOURCE_IRQ,
}
};
static struct platform_device omap_cam_device = {
.name = "omap24xxcam",
.id = -1,
.num_resources = ARRAY_SIZE(cam_resources),
.resource = cam_resources,
};
static inline void omap_init_camera(void)
{
platform_device_register(&omap_cam_device);
}
#elif defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
static struct resource omap3isp_resources[] = {
{
.start = OMAP3430_ISP_BASE,
.end = OMAP3430_ISP_END,
.flags = IORESOURCE_MEM,
},
{
.start = OMAP3430_ISP_CBUFF_BASE,
.end = OMAP3430_ISP_CBUFF_END,
.flags = IORESOURCE_MEM,
},
{
.start = OMAP3430_ISP_CCP2_BASE,
.end = OMAP3430_ISP_CCP2_END,
.flags = IORESOURCE_MEM,
},
{
.start = OMAP3430_ISP_CCDC_BASE,
.end = OMAP3430_ISP_CCDC_END,
.flags = IORESOURCE_MEM,
},
{
.start = OMAP3430_ISP_HIST_BASE,
.end = OMAP3430_ISP_HIST_END,
.flags = IORESOURCE_MEM,
},
{
.start = OMAP3430_ISP_H3A_BASE,
.end = OMAP3430_ISP_H3A_END,
.flags = IORESOURCE_MEM,
},
{
.start = OMAP3430_ISP_PREV_BASE,
.end = OMAP3430_ISP_PREV_END,
.flags = IORESOURCE_MEM,
},
{
.start = OMAP3430_ISP_RESZ_BASE,
.end = OMAP3430_ISP_RESZ_END,
.flags = IORESOURCE_MEM,
},
{
.start = OMAP3430_ISP_SBL_BASE,
.end = OMAP3430_ISP_SBL_END,
.flags = IORESOURCE_MEM,
},
{
.start = OMAP3430_ISP_CSI2A_BASE,
.end = OMAP3430_ISP_CSI2A_END,
.flags = IORESOURCE_MEM,
},
{
.start = OMAP3430_ISP_CSI2PHY_BASE,
.end = OMAP3430_ISP_CSI2PHY_END,
.flags = IORESOURCE_MEM,
},
{
.start = INT_34XX_CAM_IRQ,
.flags = IORESOURCE_IRQ,
}
};
static struct platform_device omap3isp_device = {
.name = "omap3isp",
.id = -1,
.num_resources = ARRAY_SIZE(omap3isp_resources),
.resource = omap3isp_resources,
};
static inline void omap_init_camera(void)
{
platform_device_register(&omap3isp_device);
}
#else
static inline void omap_init_camera(void)
{
}
#endif
#if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
#define MBOX_REG_SIZE 0x120
static struct resource omap2_mbox_resources[] = {
{
.start = OMAP24XX_MAILBOX_BASE,
.end = OMAP24XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
.flags = IORESOURCE_MEM,
},
{
@ -47,20 +155,40 @@ static struct resource mbox_resources[] = {
},
};
static struct resource omap3_mbox_resources[] = {
{
.start = OMAP34XX_MAILBOX_BASE,
.end = OMAP34XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
.flags = IORESOURCE_MEM,
},
{
.start = INT_24XX_MAIL_U0_MPU,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device mbox_device = {
.name = "mailbox",
.name = "omap2-mailbox",
.id = -1,
.num_resources = ARRAY_SIZE(mbox_resources),
.resource = mbox_resources,
};
static inline void omap_init_mbox(void)
{
if (cpu_is_omap2420()) {
mbox_device.num_resources = ARRAY_SIZE(omap2_mbox_resources);
mbox_device.resource = omap2_mbox_resources;
} else if (cpu_is_omap3430()) {
mbox_device.num_resources = ARRAY_SIZE(omap3_mbox_resources);
mbox_device.resource = omap3_mbox_resources;
} else {
pr_err("%s: platform not supported\n", __func__);
return;
}
platform_device_register(&mbox_device);
}
#else
static inline void omap_init_mbox(void) { }
#endif
#endif /* CONFIG_OMAP_MBOX_FWK */
#if defined(CONFIG_OMAP_STI)
@ -507,6 +635,7 @@ static int __init omap2_init_devices(void)
* in alphabetical order so they're easier to sort through.
*/
omap_hsmmc_reset();
omap_init_camera();
omap_init_mbox();
omap_init_mcspi();
omap_hdq_init();

189
arch/arm/mach-omap2/mailbox.c
View File

@ -1,9 +1,9 @@
/*
* Mailbox reservation modules for OMAP2
* Mailbox reservation modules for OMAP2/3
*
* Copyright (C) 2006 Nokia Corporation
* Copyright (C) 2006-2009 Nokia Corporation
* Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
* and Paul Mundt <paul.mundt@nokia.com>
* and Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@ -18,40 +18,22 @@
#include <mach/mailbox.h>
#include <mach/irqs.h>
#define MAILBOX_REVISION 0x00
#define MAILBOX_SYSCONFIG 0x10
#define MAILBOX_SYSSTATUS 0x14
#define MAILBOX_MESSAGE_0 0x40
#define MAILBOX_MESSAGE_1 0x44
#define MAILBOX_MESSAGE_2 0x48
#define MAILBOX_MESSAGE_3 0x4c
#define MAILBOX_MESSAGE_4 0x50
#define MAILBOX_MESSAGE_5 0x54
#define MAILBOX_FIFOSTATUS_0 0x80
#define MAILBOX_FIFOSTATUS_1 0x84
#define MAILBOX_FIFOSTATUS_2 0x88
#define MAILBOX_FIFOSTATUS_3 0x8c
#define MAILBOX_FIFOSTATUS_4 0x90
#define MAILBOX_FIFOSTATUS_5 0x94
#define MAILBOX_MSGSTATUS_0 0xc0
#define MAILBOX_MSGSTATUS_1 0xc4
#define MAILBOX_MSGSTATUS_2 0xc8
#define MAILBOX_MSGSTATUS_3 0xcc
#define MAILBOX_MSGSTATUS_4 0xd0
#define MAILBOX_MSGSTATUS_5 0xd4
#define MAILBOX_IRQSTATUS_0 0x100
#define MAILBOX_IRQENABLE_0 0x104
#define MAILBOX_IRQSTATUS_1 0x108
#define MAILBOX_IRQENABLE_1 0x10c
#define MAILBOX_IRQSTATUS_2 0x110
#define MAILBOX_IRQENABLE_2 0x114
#define MAILBOX_IRQSTATUS_3 0x118
#define MAILBOX_IRQENABLE_3 0x11c
#define MAILBOX_REVISION 0x000
#define MAILBOX_SYSCONFIG 0x010
#define MAILBOX_SYSSTATUS 0x014
#define MAILBOX_MESSAGE(m) (0x040 + 4 * (m))
#define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m))
#define MAILBOX_MSGSTATUS(m) (0x0c0 + 4 * (m))
#define MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u))
#define MAILBOX_IRQENABLE(u) (0x104 + 8 * (u))
static unsigned long mbox_base;
#define MAILBOX_IRQ_NEWMSG(u) (1 << (2 * (u)))
#define MAILBOX_IRQ_NOTFULL(u) (1 << (2 * (u) + 1))
#define MAILBOX_IRQ_NOTFULL(n) (1 << (2 * (n) + 1))
#define MAILBOX_IRQ_NEWMSG(n) (1 << (2 * (n)))
#define MBOX_REG_SIZE 0x120
#define MBOX_NR_REGS (MBOX_REG_SIZE / sizeof(u32))
static void __iomem *mbox_base;
struct omap_mbox2_fifo {
unsigned long msg;
@ -66,6 +48,7 @@ struct omap_mbox2_priv {
unsigned long irqstatus;
u32 newmsg_bit;
u32 notfull_bit;
u32 ctx[MBOX_NR_REGS];
};
static struct clk *mbox_ick_handle;
@ -73,14 +56,14 @@ static struct clk *mbox_ick_handle;
static void omap2_mbox_enable_irq(struct omap_mbox *mbox,
omap_mbox_type_t irq);
static inline unsigned int mbox_read_reg(unsigned int reg)
static inline unsigned int mbox_read_reg(size_t ofs)
{
return __raw_readl(mbox_base + reg);
return __raw_readl(mbox_base + ofs);
}
static inline void mbox_write_reg(unsigned int val, unsigned int reg)
static inline void mbox_write_reg(u32 val, size_t ofs)
{
__raw_writel(val, mbox_base + reg);
__raw_writel(val, mbox_base + ofs);
}
/* Mailbox H/W preparations */
@ -95,6 +78,9 @@ static int omap2_mbox_startup(struct omap_mbox *mbox)
}
clk_enable(mbox_ick_handle);
l = mbox_read_reg(MAILBOX_REVISION);
pr_info("omap mailbox rev %d.%d\n", (l & 0xf0) >> 4, (l & 0x0f));
/* set smart-idle & autoidle */
l = mbox_read_reg(MAILBOX_SYSCONFIG);
l |= 0x00000011;
@ -183,6 +169,32 @@ static int omap2_mbox_is_irq(struct omap_mbox *mbox,
return (enable & status & bit);
}
static void omap2_mbox_save_ctx(struct omap_mbox *mbox)
{
int i;
struct omap_mbox2_priv *p = mbox->priv;
for (i = 0; i < MBOX_NR_REGS; i++) {
p->ctx[i] = mbox_read_reg(i * sizeof(u32));
dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__,
i, p->ctx[i]);
}
}
static void omap2_mbox_restore_ctx(struct omap_mbox *mbox)
{
int i;
struct omap_mbox2_priv *p = mbox->priv;
for (i = 0; i < MBOX_NR_REGS; i++) {
mbox_write_reg(p->ctx[i], i * sizeof(u32));
dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__,
i, p->ctx[i]);
}
}
static struct omap_mbox_ops omap2_mbox_ops = {
.type = OMAP_MBOX_TYPE2,
.startup = omap2_mbox_startup,
@ -195,6 +207,8 @@ static struct omap_mbox_ops omap2_mbox_ops = {
.disable_irq = omap2_mbox_disable_irq,
.ack_irq = omap2_mbox_ack_irq,
.is_irq = omap2_mbox_is_irq,
.save_ctx = omap2_mbox_save_ctx,
.restore_ctx = omap2_mbox_restore_ctx,
};
/*
@ -209,15 +223,15 @@ static struct omap_mbox_ops omap2_mbox_ops = {
/* DSP */
static struct omap_mbox2_priv omap2_mbox_dsp_priv = {
.tx_fifo = {
.msg = MAILBOX_MESSAGE_0,
.fifo_stat = MAILBOX_FIFOSTATUS_0,
.msg = MAILBOX_MESSAGE(0),
.fifo_stat = MAILBOX_FIFOSTATUS(0),
},
.rx_fifo = {
.msg = MAILBOX_MESSAGE_1,
.msg_stat = MAILBOX_MSGSTATUS_1,
.msg = MAILBOX_MESSAGE(1),
.msg_stat = MAILBOX_MSGSTATUS(1),
},
.irqenable = MAILBOX_IRQENABLE_0,
.irqstatus = MAILBOX_IRQSTATUS_0,
.irqenable = MAILBOX_IRQENABLE(0),
.irqstatus = MAILBOX_IRQSTATUS(0),
.notfull_bit = MAILBOX_IRQ_NOTFULL(0),
.newmsg_bit = MAILBOX_IRQ_NEWMSG(1),
};
@ -229,18 +243,18 @@ struct omap_mbox mbox_dsp_info = {
};
EXPORT_SYMBOL(mbox_dsp_info);
/* IVA */
#if defined(CONFIG_ARCH_OMAP2420) /* IVA */
static struct omap_mbox2_priv omap2_mbox_iva_priv = {
.tx_fifo = {
.msg = MAILBOX_MESSAGE_2,
.fifo_stat = MAILBOX_FIFOSTATUS_2,
.msg = MAILBOX_MESSAGE(2),
.fifo_stat = MAILBOX_FIFOSTATUS(2),
},
.rx_fifo = {
.msg = MAILBOX_MESSAGE_3,
.msg_stat = MAILBOX_MSGSTATUS_3,
.msg = MAILBOX_MESSAGE(3),
.msg_stat = MAILBOX_MSGSTATUS(3),
},
.irqenable = MAILBOX_IRQENABLE_3,
.irqstatus = MAILBOX_IRQSTATUS_3,
.irqenable = MAILBOX_IRQENABLE(3),
.irqstatus = MAILBOX_IRQSTATUS(3),
.notfull_bit = MAILBOX_IRQ_NOTFULL(2),
.newmsg_bit = MAILBOX_IRQ_NEWMSG(3),
};
@ -250,17 +264,12 @@ static struct omap_mbox mbox_iva_info = {
.ops = &omap2_mbox_ops,
.priv = &omap2_mbox_iva_priv,
};
#endif
static int __init omap2_mbox_probe(struct platform_device *pdev)
static int __devinit omap2_mbox_probe(struct platform_device *pdev)
{
struct resource *res;
int ret = 0;
if (pdev->num_resources != 3) {
dev_err(&pdev->dev, "invalid number of resources: %d\n",
pdev->num_resources);
return -ENODEV;
}
int ret;
/* MBOX base */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@ -268,42 +277,61 @@ static int __init omap2_mbox_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "invalid mem resource\n");
return -ENODEV;
}
mbox_base = res->start;
mbox_base = ioremap(res->start, res->end - res->start);
if (!mbox_base)
return -ENOMEM;
/* DSP IRQ */
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (unlikely(!res)) {
/* DSP or IVA2 IRQ */
mbox_dsp_info.irq = platform_get_irq(pdev, 0);
if (mbox_dsp_info.irq < 0) {
dev_err(&pdev->dev, "invalid irq resource\n");
return -ENODEV;
ret = -ENODEV;
goto err_dsp;
}
mbox_dsp_info.irq = res->start;
ret = omap_mbox_register(&mbox_dsp_info);
ret = omap_mbox_register(&pdev->dev, &mbox_dsp_info);
if (ret)
goto err_dsp;
/* IVA IRQ */
res = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
if (unlikely(!res)) {
dev_err(&pdev->dev, "invalid irq resource\n");
return -ENODEV;
#if defined(CONFIG_ARCH_OMAP2420) /* IVA */
if (cpu_is_omap2420()) {
/* IVA IRQ */
res = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
if (unlikely(!res)) {
dev_err(&pdev->dev, "invalid irq resource\n");
ret = -ENODEV;
goto err_iva1;
}
mbox_iva_info.irq = res->start;
ret = omap_mbox_register(&pdev->dev, &mbox_iva_info);
if (ret)
goto err_iva1;
}
mbox_iva_info.irq = res->start;
ret = omap_mbox_register(&mbox_iva_info);
#endif
return 0;
err_iva1:
omap_mbox_unregister(&mbox_dsp_info);
err_dsp:
iounmap(mbox_base);
return ret;
}
static int omap2_mbox_remove(struct platform_device *pdev)
static int __devexit omap2_mbox_remove(struct platform_device *pdev)
{
#if defined(CONFIG_ARCH_OMAP2420)
omap_mbox_unregister(&mbox_iva_info);
#endif
omap_mbox_unregister(&mbox_dsp_info);
iounmap(mbox_base);
return 0;
}
static struct platform_driver omap2_mbox_driver = {
.probe = omap2_mbox_probe,
.remove = omap2_mbox_remove,
.remove = __devexit_p(omap2_mbox_remove),
.driver = {
.name = "mailbox",
.name = "omap2-mailbox",
},
};
@ -320,4 +348,7 @@ static void __exit omap2_mbox_exit(void)
module_init(omap2_mbox_init);
module_exit(omap2_mbox_exit);
MODULE_LICENSE("GPL");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("omap mailbox: omap2/3 architecture specific functions");
MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>, Paul Mundt");
MODULE_ALIAS("platform:omap2-mailbox");

185
arch/arm/mach-omap2/mmc-twl4030.c
View File

@ -17,6 +17,7 @@
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/i2c/twl4030.h>
#include <linux/regulator/machine.h>
#include <mach/hardware.h>
#include <mach/control.h>
@ -44,6 +45,7 @@
#define VMMC2_315V 0x0c
#define VMMC2_300V 0x0b
#define VMMC2_285V 0x0a
#define VMMC2_280V 0x09
#define VMMC2_260V 0x08
#define VMMC2_185V 0x06
#define VMMC2_DEDICATED 0x2E
@ -59,8 +61,8 @@ static struct twl_mmc_controller {
struct omap_mmc_platform_data *mmc;
u8 twl_vmmc_dev_grp;
u8 twl_mmc_dedicated;
char name[HSMMC_NAME_LEN];
} hsmmc[] = {
char name[HSMMC_NAME_LEN + 1];
} hsmmc[OMAP34XX_NR_MMC] = {
{
.twl_vmmc_dev_grp = VMMC1_DEV_GRP,
.twl_mmc_dedicated = VMMC1_DEDICATED,
@ -98,6 +100,14 @@ static int twl_mmc_get_ro(struct device *dev, int slot)
return gpio_get_value_cansleep(mmc->slots[0].gpio_wp);
}
static int twl_mmc_get_cover_state(struct device *dev, int slot)
{
struct omap_mmc_platform_data *mmc = dev->platform_data;
/* NOTE: assumes card detect signal is active-low */
return !gpio_get_value_cansleep(mmc->slots[0].switch_pin);
}
/*
* MMC Slot Initialization.
*/
@ -166,66 +176,85 @@ static int twl_mmc_resume(struct device *dev, int slot)
/*
* Sets the MMC voltage in twl4030
*/
#define MMC1_OCR (MMC_VDD_165_195 \
|MMC_VDD_28_29|MMC_VDD_29_30|MMC_VDD_30_31|MMC_VDD_31_32)
#define MMC2_OCR (MMC_VDD_165_195 \
|MMC_VDD_25_26|MMC_VDD_26_27|MMC_VDD_27_28 \
|MMC_VDD_28_29|MMC_VDD_29_30|MMC_VDD_30_31|MMC_VDD_31_32)
static int twl_mmc_set_voltage(struct twl_mmc_controller *c, int vdd)
{
int ret;
u8 vmmc, dev_grp_val;
u8 vmmc = 0, dev_grp_val;
switch (1 << vdd) {
case MMC_VDD_35_36:
case MMC_VDD_34_35:
case MMC_VDD_33_34:
case MMC_VDD_32_33:
case MMC_VDD_31_32:
case MMC_VDD_30_31:
if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP)
vmmc = VMMC1_315V;
else
vmmc = VMMC2_315V;
break;
case MMC_VDD_29_30:
if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP)
vmmc = VMMC1_315V;
else
vmmc = VMMC2_300V;
break;
case MMC_VDD_27_28:
case MMC_VDD_26_27:
if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP)
vmmc = VMMC1_285V;
else
vmmc = VMMC2_285V;
break;
case MMC_VDD_25_26:
case MMC_VDD_24_25:
case MMC_VDD_23_24:
case MMC_VDD_22_23:
case MMC_VDD_21_22:
case MMC_VDD_20_21:
if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP)
vmmc = VMMC1_285V;
else
vmmc = VMMC2_260V;
break;
case MMC_VDD_165_195:
if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP)
if (!vdd)
goto doit;
if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP) {
/* VMMC1: max 220 mA. And for 8-bit mode,
* VSIM: max 50 mA
*/
switch (1 << vdd) {
case MMC_VDD_165_195:
vmmc = VMMC1_185V;
else
/* and VSIM_180V */
break;
case MMC_VDD_28_29:
vmmc = VMMC1_285V;
/* and VSIM_280V */
break;
case MMC_VDD_29_30:
case MMC_VDD_30_31:
vmmc = VMMC1_300V;
/* and VSIM_300V */
break;
case MMC_VDD_31_32:
vmmc = VMMC1_315V;
/* error if VSIM needed */
break;
default:
return -EINVAL;
}
} else if (c->twl_vmmc_dev_grp == VMMC2_DEV_GRP) {
/* VMMC2: max 100 mA */
switch (1 << vdd) {
case MMC_VDD_165_195:
vmmc = VMMC2_185V;
break;
default:
vmmc = 0;
break;
break;
case MMC_VDD_25_26:
case MMC_VDD_26_27:
vmmc = VMMC2_260V;
break;
case MMC_VDD_27_28:
vmmc = VMMC2_280V;
break;
case MMC_VDD_28_29:
vmmc = VMMC2_285V;
break;
case MMC_VDD_29_30:
case MMC_VDD_30_31:
vmmc = VMMC2_300V;
break;
case MMC_VDD_31_32:
vmmc = VMMC2_315V;
break;
default:
return -EINVAL;
}
} else {
return -EINVAL;
}
if (vmmc)
doit:
if (vdd)
dev_grp_val = VMMC_DEV_GRP_P1; /* Power up */
else
dev_grp_val = LDO_CLR; /* Power down */
ret = twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
dev_grp_val, c->twl_vmmc_dev_grp);
if (ret)
if (ret || !vdd)
return ret;
ret = twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
@ -242,6 +271,14 @@ static int twl_mmc1_set_power(struct device *dev, int slot, int power_on,
struct twl_mmc_controller *c = &hsmmc[0];
struct omap_mmc_platform_data *mmc = dev->platform_data;
/*
* Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
* card using the same TWL VMMC1 supply (hsmmc[0]); OMAP has both
* 1.8V and 3.0V modes, controlled by the PBIAS register.
*
* In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which
* is most naturally TWL VSIM; those pins also use PBIAS.
*/
if (power_on) {
if (cpu_is_omap2430()) {
reg = omap_ctrl_readl(OMAP243X_CONTROL_DEVCONF1);
@ -298,6 +335,12 @@ static int twl_mmc2_set_power(struct device *dev, int slot, int power_on, int vd
struct twl_mmc_controller *c = &hsmmc[1];
struct omap_mmc_platform_data *mmc = dev->platform_data;
/*
* Assume TWL VMMC2 (hsmmc[1]) is used only to power the card ... OMAP
* VDDS is used to power the pins, optionally with a transceiver to
* support cards using voltages other than VDDS (1.8V nominal). When a
* transceiver is used, DAT3..7 are muxed as transceiver control pins.
*/
if (power_on) {
if (mmc->slots[0].internal_clock) {
u32 reg;
@ -314,6 +357,16 @@ static int twl_mmc2_set_power(struct device *dev, int slot, int power_on, int vd
return ret;
}
static int twl_mmc3_set_power(struct device *dev, int slot, int power_on,
int vdd)
{
/*
* Assume MMC3 has self-powered device connected, for example on-board
* chip with external power source.
*/
return 0;
}
static struct omap_mmc_platform_data *hsmmc_data[OMAP34XX_NR_MMC] __initdata;
void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
@ -349,13 +402,13 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
return;
}
sprintf(twl->name, "mmc%islot%i", c->mmc, 1);
if (c->name)
strncpy(twl->name, c->name, HSMMC_NAME_LEN);
else
snprintf(twl->name, ARRAY_SIZE(twl->name),
"mmc%islot%i", c->mmc, 1);
mmc->slots[0].name = twl->name;
mmc->nr_slots = 1;
mmc->slots[0].ocr_mask = MMC_VDD_165_195 |
MMC_VDD_26_27 | MMC_VDD_27_28 |
MMC_VDD_29_30 |
MMC_VDD_30_31 | MMC_VDD_31_32;
mmc->slots[0].wires = c->wires;
mmc->slots[0].internal_clock = !c->ext_clock;
mmc->dma_mask = 0xffffffff;
@ -369,7 +422,10 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
mmc->slots[0].switch_pin = c->gpio_cd;
mmc->slots[0].card_detect_irq = gpio_to_irq(c->gpio_cd);
mmc->slots[0].card_detect = twl_mmc_card_detect;
if (c->cover_only)
mmc->slots[0].get_cover_state = twl_mmc_get_cover_state;
else
mmc->slots[0].card_detect = twl_mmc_card_detect;
} else
mmc->slots[0].switch_pin = -EINVAL;
@ -385,24 +441,43 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
/* NOTE: we assume OMAP's MMC1 and MMC2 use
* the TWL4030's VMMC1 and VMMC2, respectively;
* and that OMAP's MMC3 isn't used.
* and that MMC3 device has it's own power source.
*/
switch (c->mmc) {
case 1:
mmc->slots[0].set_power = twl_mmc1_set_power;
mmc->slots[0].ocr_mask = MMC1_OCR;
break;
case 2:
mmc->slots[0].set_power = twl_mmc2_set_power;
if (c->transceiver)
mmc->slots[0].ocr_mask = MMC2_OCR;
else
mmc->slots[0].ocr_mask = MMC_VDD_165_195;
break;
case 3:
mmc->slots[0].set_power = twl_mmc3_set_power;
mmc->slots[0].ocr_mask = MMC_VDD_165_195;
break;
default:
pr_err("MMC%d configuration not supported!\n", c->mmc);
kfree(mmc);
continue;
}
hsmmc_data[c->mmc - 1] = mmc;
}
omap2_init_mmc(hsmmc_data, OMAP34XX_NR_MMC);
/* pass the device nodes back to board setup code */
for (c = controllers; c->mmc; c++) {
struct omap_mmc_platform_data *mmc = hsmmc_data[c->mmc - 1];
if (!c->mmc || c->mmc > nr_hsmmc)
continue;
c->dev = mmc->dev;
}
}
#endif

6
arch/arm/mach-omap2/mmc-twl4030.h
View File

@ -9,9 +9,13 @@
struct twl4030_hsmmc_info {
u8 mmc; /* controller 1/2/3 */
u8 wires; /* 1/4/8 wires */
bool transceiver; /* MMC-2 option */
bool ext_clock; /* use external pin for input clock */
bool cover_only; /* No card detect - just cover switch */
int gpio_cd; /* or -EINVAL */
int gpio_wp; /* or -EINVAL */
int ext_clock:1; /* use external pin for input clock */
char *name; /* or NULL for default */
struct device *dev; /* returned: pointer to mmc adapter */
};
#if defined(CONFIG_TWL4030_CORE) && \

27
arch/arm/mach-omap2/mux.c
View File

@ -453,10 +453,37 @@ MUX_CFG_34XX("AC1_3430_USB3FS_PHY_MM3_TXEN_N", 0x18a,
/* 34XX GPIO - bidirectional, unless the name has an "_OUT" suffix.
* (Always specify PIN_INPUT, except for names suffixed by "_OUT".)
* No internal pullup/pulldown without "_UP" or "_DOWN" suffix.
*/
MUX_CFG_34XX("AF26_34XX_GPIO0", 0x1e0,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
MUX_CFG_34XX("AF22_34XX_GPIO9", 0xa18,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
MUX_CFG_34XX("AH8_34XX_GPIO29", 0x5fa,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
MUX_CFG_34XX("U8_34XX_GPIO54_OUT", 0x0b4,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
MUX_CFG_34XX("U8_34XX_GPIO54_DOWN", 0x0b4,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLDOWN)
MUX_CFG_34XX("L8_34XX_GPIO63", 0x0ce,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
MUX_CFG_34XX("G25_34XX_GPIO86_OUT", 0x0fc,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
MUX_CFG_34XX("AG4_34XX_GPIO134_OUT", 0x160,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
MUX_CFG_34XX("AE4_34XX_GPIO136_OUT", 0x164,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
MUX_CFG_34XX("AF6_34XX_GPIO140_UP", 0x16c,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
MUX_CFG_34XX("AE6_34XX_GPIO141", 0x16e,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
MUX_CFG_34XX("AF5_34XX_GPIO142", 0x170,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
MUX_CFG_34XX("AE5_34XX_GPIO143", 0x172,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
MUX_CFG_34XX("H19_34XX_GPIO164_OUT", 0x19c,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
MUX_CFG_34XX("J25_34XX_GPIO170", 0x1c6,
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
};

187
arch/arm/mach-omap2/usb-musb.c Normal file
View File

@ -0,0 +1,187 @@
/*
* linux/arch/arm/mach-omap2/usb-musb.c
*
* This file will contain the board specific details for the
* MENTOR USB OTG controller on OMAP3430
*
* Copyright (C) 2007-2008 Texas Instruments
* Copyright (C) 2008 Nokia Corporation
* Author: Vikram Pandita
*
* Generalization by:
* Felipe Balbi <felipe.balbi@nokia.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/dma-mapping.h>
#include <linux/io.h>
#include <linux/usb/musb.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/pm.h>
#include <mach/mux.h>
#include <mach/usb.h>
static struct resource musb_resources[] = {
[0] = { /* start and end set dynamically */
.flags = IORESOURCE_MEM,
},
[1] = { /* general IRQ */
.start = INT_243X_HS_USB_MC,
.flags = IORESOURCE_IRQ,
},
[2] = { /* DMA IRQ */
.start = INT_243X_HS_USB_DMA,
.flags = IORESOURCE_IRQ,
},
};
static int clk_on;
static int musb_set_clock(struct clk *clk, int state)
{
if (state) {
if (clk_on > 0)
return -ENODEV;
clk_enable(clk);
clk_on = 1;
} else {
if (clk_on == 0)
return -ENODEV;
clk_disable(clk);
clk_on = 0;
}
return 0;
}
static struct musb_hdrc_eps_bits musb_eps[] = {
{ "ep1_tx", 10, },
{ "ep1_rx", 10, },
{ "ep2_tx", 9, },
{ "ep2_rx", 9, },
{ "ep3_tx", 3, },
{ "ep3_rx", 3, },
{ "ep4_tx", 3, },
{ "ep4_rx", 3, },
{ "ep5_tx", 3, },
{ "ep5_rx", 3, },
{ "ep6_tx", 3, },
{ "ep6_rx", 3, },
{ "ep7_tx", 3, },
{ "ep7_rx", 3, },
{ "ep8_tx", 2, },
{ "ep8_rx", 2, },
{ "ep9_tx", 2, },
{ "ep9_rx", 2, },
{ "ep10_tx", 2, },
{ "ep10_rx", 2, },
{ "ep11_tx", 2, },
{ "ep11_rx", 2, },
{ "ep12_tx", 2, },
{ "ep12_rx", 2, },
{ "ep13_tx", 2, },
{ "ep13_rx", 2, },
{ "ep14_tx", 2, },
{ "ep14_rx", 2, },
{ "ep15_tx", 2, },
{ "ep15_rx", 2, },
};
static struct musb_hdrc_config musb_config = {
.multipoint = 1,
.dyn_fifo = 1,
.soft_con = 1,
.dma = 1,
.num_eps = 16,
.dma_channels = 7,
.dma_req_chan = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3),
.ram_bits = 12,
.eps_bits = musb_eps,
};
static struct musb_hdrc_platform_data musb_plat = {
#ifdef CONFIG_USB_MUSB_OTG
.mode = MUSB_OTG,
#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
.mode = MUSB_HOST,
#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
.mode = MUSB_PERIPHERAL,
#endif
/* .clock is set dynamically */
.set_clock = musb_set_clock,
.config = &musb_config,
/* REVISIT charge pump on TWL4030 can supply up to
* 100 mA ... but this value is board-specific, like
* "mode", and should be passed to usb_musb_init().
*/
.power = 50, /* up to 100 mA */
};
static u64 musb_dmamask = DMA_32BIT_MASK;
static struct platform_device musb_device = {
.name = "musb_hdrc",
.id = -1,
.dev = {
.dma_mask = &musb_dmamask,
.coherent_dma_mask = DMA_32BIT_MASK,
.platform_data = &musb_plat,
},
.num_resources = ARRAY_SIZE(musb_resources),
.resource = musb_resources,
};
#ifdef CONFIG_NOP_USB_XCEIV
static u64 nop_xceiv_dmamask = DMA_32BIT_MASK;
static struct platform_device nop_xceiv_device = {
.name = "nop_usb_xceiv",
.id = -1,
.dev = {
.dma_mask = &nop_xceiv_dmamask,
.coherent_dma_mask = DMA_32BIT_MASK,
.platform_data = NULL,
},
};
#endif
void __init usb_musb_init(void)
{
if (cpu_is_omap243x())
musb_resources[0].start = OMAP243X_HS_BASE;
else
musb_resources[0].start = OMAP34XX_HSUSB_OTG_BASE;
musb_resources[0].end = musb_resources[0].start + SZ_8K - 1;
/*
* REVISIT: This line can be removed once all the platforms using
* musb_core.c have been converted to use use clkdev.
*/
musb_plat.clock = "ick";
#ifdef CONFIG_NOP_USB_XCEIV
if (platform_device_register(&nop_xceiv_device) < 0) {
printk(KERN_ERR "Unable to register NOP-XCEIV device\n");
return;
}
#endif
if (platform_device_register(&musb_device) < 0) {
printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n");
return;
}
}

8
arch/arm/plat-omap/Kconfig
View File

@ -107,6 +107,14 @@ config OMAP_MCBSP
Say Y here if you want support for the OMAP Multichannel
Buffered Serial Port.
config OMAP_MBOX_FWK
tristate "Mailbox framework support"
depends on ARCH_OMAP
default n
help
Say Y here if you want to use OMAP Mailbox framework support for
DSP, IVA1.0 and IVA2 in OMAP1/2/3.
choice
prompt "System timer"
default OMAP_MPU_TIMER

3
arch/arm/plat-omap/devices.c
View File

@ -228,6 +228,9 @@ int __init omap_mmc_add(const char *name, int id, unsigned long base,
ret = platform_device_add(pdev);
if (ret)
goto fail;
/* return device handle to board setup code */
data->dev = &pdev->dev;
return 0;
fail:

28
arch/arm/plat-omap/dma.c
View File

@ -123,6 +123,7 @@ static struct dma_link_info *dma_linked_lch;
static int dma_lch_count;
static int dma_chan_count;
static int omap_dma_reserve_channels;
static spinlock_t dma_chan_lock;
static struct omap_dma_lch *dma_chan;
@ -737,7 +738,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
* id.
*/
dma_write(dev_id | (1 << 10), CCR(free_ch));
} else if (cpu_is_omap730() || cpu_is_omap15xx()) {
} else if (cpu_is_omap7xx() || cpu_is_omap15xx()) {
dma_write(dev_id, CCR(free_ch));
}
@ -1900,7 +1901,7 @@ static int omap2_dma_handle_ch(int ch)
/* STATUS register count is from 1-32 while our is 0-31 */
static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id)
{
u32 val;
u32 val, enable_reg;
int i;
val = dma_read(IRQSTATUS_L0);
@ -1909,6 +1910,8 @@ static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id)
printk(KERN_WARNING "Spurious DMA IRQ\n");
return IRQ_HANDLED;
}
enable_reg = dma_read(IRQENABLE_L0);
val &= enable_reg; /* Dispatch only relevant interrupts */
for (i = 0; i < dma_lch_count && val != 0; i++) {
if (val & 1)
omap2_dma_handle_ch(i);
@ -2321,6 +2324,10 @@ static int __init omap_init_dma(void)
return -ENODEV;
}
if (cpu_class_is_omap2() && omap_dma_reserve_channels
&& (omap_dma_reserve_channels <= dma_lch_count))
dma_lch_count = omap_dma_reserve_channels;
dma_chan = kzalloc(sizeof(struct omap_dma_lch) * dma_lch_count,
GFP_KERNEL);
if (!dma_chan)
@ -2339,7 +2346,7 @@ static int __init omap_init_dma(void)
printk(KERN_INFO "DMA support for OMAP15xx initialized\n");
dma_chan_count = 9;
enable_1510_mode = 1;
} else if (cpu_is_omap16xx() || cpu_is_omap730()) {
} else if (cpu_is_omap16xx() || cpu_is_omap7xx()) {
printk(KERN_INFO "OMAP DMA hardware version %d\n",
dma_read(HW_ID));
printk(KERN_INFO "DMA capabilities: %08x:%08x:%04x:%04x:%04x\n",
@ -2371,7 +2378,7 @@ static int __init omap_init_dma(void)
u8 revision = dma_read(REVISION) & 0xff;
printk(KERN_INFO "OMAP DMA hardware revision %d.%d\n",
revision >> 4, revision & 0xf);
dma_chan_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
dma_chan_count = dma_lch_count;
} else {
dma_chan_count = 0;
return 0;
@ -2437,4 +2444,17 @@ static int __init omap_init_dma(void)
arch_initcall(omap_init_dma);
/*
* Reserve the omap SDMA channels using cmdline bootarg
* "omap_dma_reserve_ch=". The valid range is 1 to 32
*/
static int __init omap_dma_cmdline_reserve_ch(char *str)
{
if (get_option(&str, &omap_dma_reserve_channels) != 1)
omap_dma_reserve_channels = 0;
return 1;
}
__setup("omap_dma_reserve_ch=", omap_dma_cmdline_reserve_ch);

26
arch/arm/plat-omap/dmtimer.c
View File

@ -33,6 +33,7 @@
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/module.h>
#include <mach/hardware.h>
#include <mach/dmtimer.h>
#include <mach/irqs.h>
@ -362,6 +363,7 @@ struct omap_dm_timer *omap_dm_timer_request(void)
return timer;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_request);
struct omap_dm_timer *omap_dm_timer_request_specific(int id)
{
@ -385,6 +387,7 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
return timer;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
void omap_dm_timer_free(struct omap_dm_timer *timer)
{
@ -395,6 +398,7 @@ void omap_dm_timer_free(struct omap_dm_timer *timer)
WARN_ON(!timer->reserved);
timer->reserved = 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_free);
void omap_dm_timer_enable(struct omap_dm_timer *timer)
{
@ -406,6 +410,7 @@ void omap_dm_timer_enable(struct omap_dm_timer *timer)
timer->enabled = 1;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
void omap_dm_timer_disable(struct omap_dm_timer *timer)
{
@ -417,11 +422,13 @@ void omap_dm_timer_disable(struct omap_dm_timer *timer)
timer->enabled = 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
{
return timer->irq;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
#if defined(CONFIG_ARCH_OMAP1)
@ -452,6 +459,7 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
return inputmask;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
#elif defined(CONFIG_ARCH_OMAP2) || defined (CONFIG_ARCH_OMAP3)
@ -459,6 +467,7 @@ struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
{
return timer->fclk;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_get_fclk);
__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
{
@ -466,6 +475,7 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
#endif
@ -473,6 +483,7 @@ void omap_dm_timer_trigger(struct omap_dm_timer *timer)
{
omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
}
EXPORT_SYMBOL_GPL(omap_dm_timer_trigger);
void omap_dm_timer_start(struct omap_dm_timer *timer)
{
@ -484,6 +495,7 @@ void omap_dm_timer_start(struct omap_dm_timer *timer)
omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
}
}
EXPORT_SYMBOL_GPL(omap_dm_timer_start);
void omap_dm_timer_stop(struct omap_dm_timer *timer)
{
@ -495,6 +507,7 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer)
omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
}
}
EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
#ifdef CONFIG_ARCH_OMAP1
@ -507,6 +520,7 @@ void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
l |= source << n;
omap_writel(l, MOD_CONF_CTRL_1);
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
#else
@ -523,6 +537,7 @@ void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
* cause an abort. */
__delay(150000);
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
#endif
@ -541,6 +556,7 @@ void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_load);
/* Optimized set_load which removes costly spin wait in timer_start */
void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
@ -560,6 +576,7 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, load);
omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
unsigned int match)
@ -574,6 +591,7 @@ void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match);
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_match);
void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
int toggle, int trigger)
@ -590,6 +608,7 @@ void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
l |= trigger << 10;
omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_pwm);
void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
{
@ -603,6 +622,7 @@ void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
}
omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
unsigned int value)
@ -610,6 +630,7 @@ void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
omap_dm_timer_write_reg(timer, OMAP_TIMER_INT_EN_REG, value);
omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, value);
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
{
@ -619,11 +640,13 @@ unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
return l;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
{
omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, value);
}
EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
{
@ -633,11 +656,13 @@ unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
return l;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
{
omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value);
}
EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter);
int omap_dm_timers_active(void)
{
@ -658,6 +683,7 @@ int omap_dm_timers_active(void)
}
return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timers_active);
int __init omap_dm_timer_init(void)
{

111
arch/arm/plat-omap/gpio.c
View File

@ -80,6 +80,22 @@
#define OMAP730_GPIO_INT_MASK 0x10
#define OMAP730_GPIO_INT_STATUS 0x14
/*
* OMAP850 specific GPIO registers
*/
#define OMAP850_GPIO1_BASE IO_ADDRESS(0xfffbc000)
#define OMAP850_GPIO2_BASE IO_ADDRESS(0xfffbc800)
#define OMAP850_GPIO3_BASE IO_ADDRESS(0xfffbd000)
#define OMAP850_GPIO4_BASE IO_ADDRESS(0xfffbd800)
#define OMAP850_GPIO5_BASE IO_ADDRESS(0xfffbe000)
#define OMAP850_GPIO6_BASE IO_ADDRESS(0xfffbe800)
#define OMAP850_GPIO_DATA_INPUT 0x00
#define OMAP850_GPIO_DATA_OUTPUT 0x04
#define OMAP850_GPIO_DIR_CONTROL 0x08
#define OMAP850_GPIO_INT_CONTROL 0x0c
#define OMAP850_GPIO_INT_MASK 0x10
#define OMAP850_GPIO_INT_STATUS 0x14
/*
* omap24xx specific GPIO registers
*/
@ -159,7 +175,8 @@ struct gpio_bank {
#define METHOD_GPIO_1510 1
#define METHOD_GPIO_1610 2
#define METHOD_GPIO_730 3
#define METHOD_GPIO_24XX 4
#define METHOD_GPIO_850 4
#define METHOD_GPIO_24XX 5
#ifdef CONFIG_ARCH_OMAP16XX
static struct gpio_bank gpio_bank_1610[5] = {
@ -190,6 +207,19 @@ static struct gpio_bank gpio_bank_730[7] = {
};
#endif
#ifdef CONFIG_ARCH_OMAP850
static struct gpio_bank gpio_bank_850[7] = {
{ OMAP_MPUIO_BASE, INT_850_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
{ OMAP850_GPIO1_BASE, INT_850_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_850 },
{ OMAP850_GPIO2_BASE, INT_850_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_850 },
{ OMAP850_GPIO3_BASE, INT_850_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_850 },
{ OMAP850_GPIO4_BASE, INT_850_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_850 },
{ OMAP850_GPIO5_BASE, INT_850_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_850 },
{ OMAP850_GPIO6_BASE, INT_850_GPIO_BANK6, IH_GPIO_BASE + 160, METHOD_GPIO_850 },
};
#endif
#ifdef CONFIG_ARCH_OMAP24XX
static struct gpio_bank gpio_bank_242x[4] = {
@ -236,7 +266,7 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)
return &gpio_bank[0];
return &gpio_bank[1 + (gpio >> 4)];
}
if (cpu_is_omap730()) {
if (cpu_is_omap7xx()) {
if (OMAP_GPIO_IS_MPUIO(gpio))
return &gpio_bank[0];
return &gpio_bank[1 + (gpio >> 5)];
@ -251,7 +281,7 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)
static inline int get_gpio_index(int gpio)
{
if (cpu_is_omap730())
if (cpu_is_omap7xx())
return gpio & 0x1f;
if (cpu_is_omap24xx())
return gpio & 0x1f;
@ -273,7 +303,7 @@ static inline int gpio_valid(int gpio)
return 0;
if ((cpu_is_omap16xx()) && gpio < 64)
return 0;
if (cpu_is_omap730() && gpio < 192)
if (cpu_is_omap7xx() && gpio < 192)
return 0;
if (cpu_is_omap24xx() && gpio < 128)
return 0;
@ -318,6 +348,11 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
reg += OMAP730_GPIO_DIR_CONTROL;
break;
#endif
#ifdef CONFIG_ARCH_OMAP850
case METHOD_GPIO_850:
reg += OMAP850_GPIO_DIR_CONTROL;
break;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_OE;
@ -380,6 +415,16 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
l &= ~(1 << gpio);
break;
#endif
#ifdef CONFIG_ARCH_OMAP850
case METHOD_GPIO_850:
reg += OMAP850_GPIO_DATA_OUTPUT;
l = __raw_readl(reg);
if (enable)
l |= 1 << gpio;
else
l &= ~(1 << gpio);
break;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
case METHOD_GPIO_24XX:
if (enable)
@ -426,6 +471,11 @@ static int __omap_get_gpio_datain(int gpio)
reg += OMAP730_GPIO_DATA_INPUT;
break;
#endif
#ifdef CONFIG_ARCH_OMAP850
case METHOD_GPIO_850:
reg += OMAP850_GPIO_DATA_INPUT;
break;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_DATAIN;
@ -598,6 +648,18 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
goto bad;
break;
#endif
#ifdef CONFIG_ARCH_OMAP850
case METHOD_GPIO_850:
reg += OMAP850_GPIO_INT_CONTROL;
l = __raw_readl(reg);
if (trigger & IRQ_TYPE_EDGE_RISING)
l |= 1 << gpio;
else if (trigger & IRQ_TYPE_EDGE_FALLING)
l &= ~(1 << gpio);
else
goto bad;
break;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
case METHOD_GPIO_24XX:
set_24xx_gpio_triggering(bank, gpio, trigger);
@ -678,6 +740,11 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
reg += OMAP730_GPIO_INT_STATUS;
break;
#endif
#ifdef CONFIG_ARCH_OMAP850
case METHOD_GPIO_850:
reg += OMAP850_GPIO_INT_STATUS;
break;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_IRQSTATUS1;
@ -736,6 +803,13 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
inv = 1;
break;
#endif
#ifdef CONFIG_ARCH_OMAP850
case METHOD_GPIO_850:
reg += OMAP850_GPIO_INT_MASK;
mask = 0xffffffff;
inv = 1;
break;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_IRQENABLE1;
@ -799,6 +873,16 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
l |= gpio_mask;
break;
#endif
#ifdef CONFIG_ARCH_OMAP850
case METHOD_GPIO_850:
reg += OMAP850_GPIO_INT_MASK;
l = __raw_readl(reg);
if (enable)
l &= ~(gpio_mask);
else
l |= gpio_mask;
break;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
case METHOD_GPIO_24XX:
if (enable)
@ -983,6 +1067,10 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
if (bank->method == METHOD_GPIO_730)
isr_reg = bank->base + OMAP730_GPIO_INT_STATUS;
#endif
#ifdef CONFIG_ARCH_OMAP850
if (bank->method == METHOD_GPIO_850)
isr_reg = bank->base + OMAP850_GPIO_INT_STATUS;
#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
if (bank->method == METHOD_GPIO_24XX)
isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1;
@ -1372,6 +1460,13 @@ static int __init _omap_gpio_init(void)
gpio_bank = gpio_bank_730;
}
#endif
#ifdef CONFIG_ARCH_OMAP850
if (cpu_is_omap850()) {
printk(KERN_INFO "OMAP850 GPIO hardware\n");
gpio_bank_count = 7;
gpio_bank = gpio_bank_850;
}
#endif
#ifdef CONFIG_ARCH_OMAP24XX
if (cpu_is_omap242x()) {
@ -1420,7 +1515,7 @@ static int __init _omap_gpio_init(void)
__raw_writew(0xffff, bank->base + OMAP1610_GPIO_IRQSTATUS1);
__raw_writew(0x0014, bank->base + OMAP1610_GPIO_SYSCONFIG);
}
if (cpu_is_omap730() && bank->method == METHOD_GPIO_730) {
if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_730) {
__raw_writel(0xffffffff, bank->base + OMAP730_GPIO_INT_MASK);
__raw_writel(0x00000000, bank->base + OMAP730_GPIO_INT_STATUS);
@ -1743,6 +1838,9 @@ static int gpio_is_input(struct gpio_bank *bank, int mask)
case METHOD_GPIO_730:
reg += OMAP730_GPIO_DIR_CONTROL;
break;
case METHOD_GPIO_850:
reg += OMAP850_GPIO_DIR_CONTROL;
break;
case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_OE;
break;
@ -1762,7 +1860,8 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
if (bank_is_mpuio(bank))
gpio = OMAP_MPUIO(0);
else if (cpu_class_is_omap2() || cpu_is_omap730())
else if (cpu_class_is_omap2() || cpu_is_omap730() ||
cpu_is_omap850())
bankwidth = 32;
for (j = 0; j < bankwidth; j++, gpio++, mask <<= 1) {

104
arch/arm/plat-omap/i2c.c
View File

@ -98,6 +98,8 @@ static const int omap34xx_pins[][2] = {
static const int omap34xx_pins[][2] = {};
#endif
#define OMAP_I2C_CMDLINE_SETUP (BIT(31))
static void __init omap_i2c_mux_pins(int bus)
{
int scl, sda;
@ -119,14 +121,9 @@ static void __init omap_i2c_mux_pins(int bus)
omap_cfg_reg(scl);
}
int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
struct i2c_board_info const *info,
unsigned len)
static int __init omap_i2c_nr_ports(void)
{
int ports, err;
struct platform_device *pdev;
struct resource *res;
resource_size_t base, irq;
int ports = 0;
if (cpu_class_is_omap1())
ports = 1;
@ -135,17 +132,16 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
else if (cpu_is_omap34xx())
ports = 3;
BUG_ON(bus_id < 1 || bus_id > ports);
return ports;
}
if (info) {
err = i2c_register_board_info(bus_id, info, len);
if (err)
return err;
}
static int __init omap_i2c_add_bus(int bus_id)
{
struct platform_device *pdev;
struct resource *res;
resource_size_t base, irq;
pdev = &omap_i2c_devices[bus_id - 1];
*(u32 *)pdev->dev.platform_data = clkrate;
if (bus_id == 1) {
res = pdev->resource;
if (cpu_class_is_omap1()) {
@ -163,3 +159,81 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
omap_i2c_mux_pins(bus_id - 1);
return platform_device_register(pdev);
}
/**
* omap_i2c_bus_setup - Process command line options for the I2C bus speed
* @str: String of options
*
* This function allow to override the default I2C bus speed for given I2C
* bus with a command line option.
*
* Format: i2c_bus=bus_id,clkrate (in kHz)
*
* Returns 1 on success, 0 otherwise.
*/
static int __init omap_i2c_bus_setup(char *str)
{
int ports;
int ints[3];
ports = omap_i2c_nr_ports();
get_options(str, 3, ints);
if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
return 0;
i2c_rate[ints[1] - 1] = ints[2];
i2c_rate[ints[1] - 1] |= OMAP_I2C_CMDLINE_SETUP;
return 1;
}
__setup("i2c_bus=", omap_i2c_bus_setup);
/*
* Register busses defined in command line but that are not registered with
* omap_register_i2c_bus from board initialization code.
*/
static int __init omap_register_i2c_bus_cmdline(void)
{
int i, err = 0;
for (i = 0; i < ARRAY_SIZE(i2c_rate); i++)
if (i2c_rate[i] & OMAP_I2C_CMDLINE_SETUP) {
i2c_rate[i] &= ~OMAP_I2C_CMDLINE_SETUP;
err = omap_i2c_add_bus(i + 1);
if (err)
goto out;
}
out:
return err;
}
subsys_initcall(omap_register_i2c_bus_cmdline);
/**
* omap_register_i2c_bus - register I2C bus with device descriptors
* @bus_id: bus id counting from number 1
* @clkrate: clock rate of the bus in kHz
* @info: pointer into I2C device descriptor table or NULL
* @len: number of descriptors in the table
*
* Returns 0 on success or an error code.
*/
int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
struct i2c_board_info const *info,
unsigned len)
{
int err;
BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());
if (info) {
err = i2c_register_board_info(bus_id, info, len);
if (err)
return err;
}
if (!i2c_rate[bus_id - 1])
i2c_rate[bus_id - 1] = clkrate;
i2c_rate[bus_id - 1] &= ~OMAP_I2C_CMDLINE_SETUP;
return omap_i2c_add_bus(bus_id);
}

41
arch/arm/plat-omap/include/mach/board-2430sdp.h
View File

@ -1,41 +0,0 @@
/*
* arch/arm/plat-omap/include/mach/board-2430sdp.h
*
* Hardware definitions for TI OMAP2430 SDP board.
*
* Based on board-h4.h by Dirk Behme <dirk.behme@de.bosch.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __ASM_ARCH_OMAP_2430SDP_H
#define __ASM_ARCH_OMAP_2430SDP_H
/* Placeholder for 2430SDP specific defines */
#define OMAP24XX_ETHR_START 0x08000300
#define OMAP24XX_ETHR_GPIO_IRQ 149
#define SDP2430_CS0_BASE 0x04000000
/* Function prototypes */
extern void sdp2430_flash_init(void);
extern void sdp2430_usb_init(void);
#endif /* __ASM_ARCH_OMAP_2430SDP_H */

46
arch/arm/plat-omap/include/mach/board-apollon.h
View File

@ -1,46 +0,0 @@
/*
* arch/arm/plat-omap/include/mach/board-apollon.h
*
* Hardware definitions for Samsung OMAP24XX Apollon board.
*
* Initial creation by Kyungmin Park <kyungmin.park@samsung.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __ASM_ARCH_OMAP_APOLLON_H
#define __ASM_ARCH_OMAP_APOLLON_H
#include <mach/cpu.h>
extern void apollon_mmc_init(void);
static inline int apollon_plus(void)
{
/* The apollon plus has IDCODE revision 5 */
return omap_rev() & 0xc0;
}
/* Placeholder for APOLLON specific defines */
#define APOLLON_ETHR_GPIO_IRQ 74
#endif /* __ASM_ARCH_OMAP_APOLLON_H */

51
arch/arm/plat-omap/include/mach/board-fsample.h
View File

@ -1,51 +0,0 @@
/*
* arch/arm/plat-omap/include/mach/board-fsample.h
*
* Board-specific goodies for TI F-Sample.
*
* Copyright (C) 2006 Google, Inc.
* Author: Brian Swetland <swetland@google.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_OMAP_FSAMPLE_H
#define __ASM_ARCH_OMAP_FSAMPLE_H
/* fsample is pretty close to p2-sample */
#include <mach/board-perseus2.h>
#define fsample_cpld_read(reg) __raw_readb(reg)
#define fsample_cpld_write(val, reg) __raw_writeb(val, reg)
#define FSAMPLE_CPLD_BASE 0xE8100000
#define FSAMPLE_CPLD_SIZE SZ_4K
#define FSAMPLE_CPLD_START 0x05080000
#define FSAMPLE_CPLD_REG_A (FSAMPLE_CPLD_BASE + 0x00)
#define FSAMPLE_CPLD_SWITCH (FSAMPLE_CPLD_BASE + 0x02)
#define FSAMPLE_CPLD_UART (FSAMPLE_CPLD_BASE + 0x02)
#define FSAMPLE_CPLD_REG_B (FSAMPLE_CPLD_BASE + 0x04)
#define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06)
#define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06)
#define FSAMPLE_CPLD_BIT_BT_RESET 0
#define FSAMPLE_CPLD_BIT_LCD_RESET 1
#define FSAMPLE_CPLD_BIT_CAM_PWDN 2
#define FSAMPLE_CPLD_BIT_CHARGER_ENABLE 3
#define FSAMPLE_CPLD_BIT_SD_MMC_EN 4
#define FSAMPLE_CPLD_BIT_aGPS_PWREN 5
#define FSAMPLE_CPLD_BIT_BACKLIGHT 6
#define FSAMPLE_CPLD_BIT_aGPS_EN_RESET 7
#define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N 8
#define FSAMPLE_CPLD_BIT_OTG_RESET 9
#define fsample_cpld_set(bit) \
fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR)
#define fsample_cpld_clear(bit) \
fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR)
#endif

38
arch/arm/plat-omap/include/mach/board-h4.h
View File

@ -1,38 +0,0 @@
/*
* arch/arm/plat-omap/include/mach/board-h4.h
*
* Hardware definitions for TI OMAP2420 H4 board.
*
* Initial creation by Dirk Behme <dirk.behme@de.bosch.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __ASM_ARCH_OMAP_H4_H
#define __ASM_ARCH_OMAP_H4_H
/* MMC Prototypes */
extern void h4_mmc_init(void);
/* Placeholder for H4 specific defines */
#define OMAP24XX_ETHR_GPIO_IRQ 92
#endif /* __ASM_ARCH_OMAP_H4_H */

52
arch/arm/plat-omap/include/mach/board-innovator.h
View File

@ -1,52 +0,0 @@
/*
* arch/arm/plat-omap/include/mach/board-innovator.h
*
* Copyright (C) 2001 RidgeRun, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __ASM_ARCH_OMAP_INNOVATOR_H
#define __ASM_ARCH_OMAP_INNOVATOR_H
#if defined (CONFIG_ARCH_OMAP15XX)
#ifndef OMAP_SDRAM_DEVICE
#define OMAP_SDRAM_DEVICE D256M_1X16_4B
#endif
#define OMAP1510P1_IMIF_PRI_VALUE 0x00
#define OMAP1510P1_EMIFS_PRI_VALUE 0x00
#define OMAP1510P1_EMIFF_PRI_VALUE 0x00
#ifndef __ASSEMBLY__
void fpga_write(unsigned char val, int reg);
unsigned char fpga_read(int reg);
#endif
#endif /* CONFIG_ARCH_OMAP15XX */
#if defined (CONFIG_ARCH_OMAP16XX)
/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
#define INNOVATOR1610_ETHR_START 0x04000300
#endif /* CONFIG_ARCH_OMAP1610 */
#endif /* __ASM_ARCH_OMAP_INNOVATOR_H */

39
arch/arm/plat-omap/include/mach/board-ldp.h
View File

@ -1,39 +0,0 @@
/*
* arch/arm/plat-omap/include/mach/board-ldp.h
*
* Hardware definitions for TI OMAP3 LDP.
*
* Copyright (C) 2008 Texas Instruments Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __ASM_ARCH_OMAP_LDP_H
#define __ASM_ARCH_OMAP_LDP_H
extern void twl4030_bci_battery_init(void);
#define TWL4030_IRQNUM INT_34XX_SYS_NIRQ
#define LDP_SMC911X_CS 1
#define LDP_SMC911X_GPIO 152
#define DEBUG_BASE 0x08000000
#define OMAP34XX_ETHR_START DEBUG_BASE
#endif /* __ASM_ARCH_OMAP_LDP_H */

54
arch/arm/plat-omap/include/mach/board-nokia.h
View File

@ -1,54 +0,0 @@
/*
* arch/arm/plat-omap/include/mach/board-nokia.h
*
* Information structures for Nokia-specific board config data
*
* Copyright (C) 2005 Nokia Corporation
*/
#ifndef _OMAP_BOARD_NOKIA_H
#define _OMAP_BOARD_NOKIA_H
#include <linux/types.h>
#define OMAP_TAG_NOKIA_BT 0x4e01
#define OMAP_TAG_WLAN_CX3110X 0x4e02
#define OMAP_TAG_CBUS 0x4e03
#define OMAP_TAG_EM_ASIC_BB5 0x4e04
#define BT_CHIP_CSR 1
#define BT_CHIP_TI 2
#define BT_SYSCLK_12 1
#define BT_SYSCLK_38_4 2
struct omap_bluetooth_config {
u8 chip_type;
u8 bt_wakeup_gpio;
u8 host_wakeup_gpio;
u8 reset_gpio;
u8 bt_uart;
u8 bd_addr[6];
u8 bt_sysclk;
};
struct omap_wlan_cx3110x_config {
u8 chip_type;
s16 power_gpio;
s16 irq_gpio;
s16 spi_cs_gpio;
};
struct omap_cbus_config {
s16 clk_gpio;
s16 dat_gpio;
s16 sel_gpio;
};
struct omap_em_asic_bb5_config {
s16 retu_irq_gpio;
s16 tahvo_irq_gpio;
};
#endif

33
arch/arm/plat-omap/include/mach/board-omap3beagle.h
View File

@ -1,33 +0,0 @@
/*
* arch/arm/plat-omap/include/mach/board-omap3beagle.h
*
* Hardware definitions for TI OMAP3 BEAGLE.
*
* Initial creation by Syed Mohammed Khasim <khasim@ti.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __ASM_ARCH_OMAP3_BEAGLE_H
#define __ASM_ARCH_OMAP3_BEAGLE_H
#endif /* __ASM_ARCH_OMAP3_BEAGLE_H */

47
arch/arm/plat-omap/include/mach/board-osk.h
View File

@ -1,47 +0,0 @@
/*
* arch/arm/plat-omap/include/mach/board-osk.h
*
* Hardware definitions for TI OMAP5912 OSK board.
*
* Written by Dirk Behme <dirk.behme@de.bosch.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __ASM_ARCH_OMAP_OSK_H
#define __ASM_ARCH_OMAP_OSK_H
/* At OMAP5912 OSK the Ethernet is directly connected to CS1 */
#define OMAP_OSK_ETHR_START 0x04800300
/* TPS65010 has four GPIOs. nPG and LED2 can be treated like GPIOs with
* alternate pin configurations for hardware-controlled blinking.
*/
#define OSK_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)
# define OSK_TPS_GPIO_USB_PWR_EN (OSK_TPS_GPIO_BASE + 0)
# define OSK_TPS_GPIO_LED_D3 (OSK_TPS_GPIO_BASE + 1)
# define OSK_TPS_GPIO_LAN_RESET (OSK_TPS_GPIO_BASE + 2)
# define OSK_TPS_GPIO_DSP_PWR_EN (OSK_TPS_GPIO_BASE + 3)
# define OSK_TPS_GPIO_LED_D9 (OSK_TPS_GPIO_BASE + 4)
# define OSK_TPS_GPIO_LED_D2 (OSK_TPS_GPIO_BASE + 5)
#endif /* __ASM_ARCH_OMAP_OSK_H */

26
arch/arm/plat-omap/include/mach/board-overo.h
View File

@ -1,26 +0,0 @@
/*
* board-overo.h (Gumstix Overo)
*
* Initial code: Steve Sakoman <steve@sakoman.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __ASM_ARCH_OVERO_H
#define __ASM_ARCH_OVERO_H
#define OVERO_GPIO_BT_XGATE 15
#define OVERO_GPIO_W2W_NRESET 16
#define OVERO_GPIO_BT_NRESET 164
#define OVERO_GPIO_USBH_CPEN 168
#define OVERO_GPIO_USBH_NRESET 183
#endif /* ____ASM_ARCH_OVERO_H */

32
arch/arm/plat-omap/include/mach/board-palmte.h
View File

@ -1,32 +0,0 @@
/*
* arch/arm/plat-omap/include/mach/board-palmte.h
*
* Hardware definitions for the Palm Tungsten E device.
*
* Maintainters : http://palmtelinux.sf.net
* palmtelinux-developpers@lists.sf.net
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __OMAP_BOARD_PALMTE_H
#define __OMAP_BOARD_PALMTE_H
#define PALMTE_USBDETECT_GPIO 0
#define PALMTE_USB_OR_DC_GPIO 1
#define PALMTE_TSC_GPIO 4
#define PALMTE_PINTDAV_GPIO 6
#define PALMTE_MMC_WP_GPIO 8
#define PALMTE_MMC_POWER_GPIO 9
#define PALMTE_HDQ_GPIO 11
#define PALMTE_HEADPHONES_GPIO 14
#define PALMTE_SPEAKER_GPIO 15
#define PALMTE_DC_GPIO OMAP_MPUIO(2)
#define PALMTE_MMC_SWITCH_GPIO OMAP_MPUIO(4)
#define PALMTE_MMC1_GPIO OMAP_MPUIO(6)
#define PALMTE_MMC2_GPIO OMAP_MPUIO(7)
#define PALMTE_MMC3_GPIO OMAP_MPUIO(11)
#endif /* __OMAP_BOARD_PALMTE_H */

23
arch/arm/plat-omap/include/mach/board-palmtt.h
View File

@ -1,23 +0,0 @@
/*
* arch/arm/plat-omap/include/mach/board-palmte.h
*
* Hardware definitions for the Palm Tungsten|T device.
*
* Maintainters : Marek Vasut <marek.vasut@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __OMAP_BOARD_PALMTT_H
#define __OMAP_BOARD_PALMTT_H
#define PALMTT_USBDETECT_GPIO 0
#define PALMTT_CABLE_GPIO 1
#define PALMTT_LED_GPIO 3
#define PALMTT_PENIRQ_GPIO 6
#define PALMTT_MMC_WP_GPIO 8
#define PALMTT_HDQ_GPIO 11
#endif /* __OMAP_BOARD_PALMTT_H */

26
arch/arm/plat-omap/include/mach/board-palmz71.h
View File

@ -1,26 +0,0 @@
/*
* arch/arm/plat-omap/include/mach/board-palmz71.h
*
* Hardware definitions for the Palm Zire71 device.
*
* Maintainters : Marek Vasut <marek.vasut@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __OMAP_BOARD_PALMZ71_H
#define __OMAP_BOARD_PALMZ71_H
#define PALMZ71_USBDETECT_GPIO 0
#define PALMZ71_PENIRQ_GPIO 6
#define PALMZ71_MMC_WP_GPIO 8
#define PALMZ71_HDQ_GPIO 11
#define PALMZ71_HOTSYNC_GPIO OMAP_MPUIO(1)
#define PALMZ71_CABLE_GPIO OMAP_MPUIO(2)
#define PALMZ71_SLIDER_GPIO OMAP_MPUIO(3)
#define PALMZ71_MMC_IN_GPIO OMAP_MPUIO(4)
#endif /* __OMAP_BOARD_PALMZ71_H */

39
arch/arm/plat-omap/include/mach/board-perseus2.h
View File

@ -1,39 +0,0 @@
/*
* arch/arm/plat-omap/include/mach/board-perseus2.h
*
* Copyright 2003 by Texas Instruments Incorporated
* OMAP730 / Perseus2 support by Jean Pihet
*
* Copyright (C) 2001 RidgeRun, Inc. (http://www.ridgerun.com)
* Author: RidgeRun, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __ASM_ARCH_OMAP_PERSEUS2_H
#define __ASM_ARCH_OMAP_PERSEUS2_H
#include <mach/fpga.h>
#ifndef OMAP_SDRAM_DEVICE
#define OMAP_SDRAM_DEVICE D256M_1X16_4B
#endif
#endif

1
arch/arm/plat-omap/include/mach/board-voiceblue.h
View File

@ -14,7 +14,6 @@
extern void voiceblue_wdt_enable(void);
extern void voiceblue_wdt_disable(void);
extern void voiceblue_wdt_ping(void);
extern void voiceblue_reset(void);
#endif /* __ASM_ARCH_VOICEBLUE_H */

4
arch/arm/plat-omap/include/mach/board.h
View File

@ -17,7 +17,6 @@
/* Different peripheral ids */
#define OMAP_TAG_CLOCK 0x4f01
#define OMAP_TAG_SERIAL_CONSOLE 0x4f03
#define OMAP_TAG_USB 0x4f04
#define OMAP_TAG_LCD 0x4f05
#define OMAP_TAG_GPIO_SWITCH 0x4f06
#define OMAP_TAG_UART 0x4f07
@ -133,9 +132,6 @@ struct omap_version_config {
char version[12];
};
#include <mach/board-nokia.h>
struct omap_board_config_entry {
u16 tag;
u16 len;

35
arch/arm/plat-omap/include/mach/cpu.h
View File

@ -56,6 +56,14 @@ unsigned int omap_rev(void);
# define OMAP_NAME omap730
# endif
#endif
#ifdef CONFIG_ARCH_OMAP850
# ifdef OMAP_NAME
# undef MULTI_OMAP1
# define MULTI_OMAP1
# else
# define OMAP_NAME omap850
# endif
#endif
#ifdef CONFIG_ARCH_OMAP15XX
# ifdef OMAP_NAME
# undef MULTI_OMAP1
@ -105,7 +113,7 @@ unsigned int omap_rev(void);
/*
* Macros to group OMAP into cpu classes.
* These can be used in most places.
* cpu_is_omap7xx(): True for OMAP730
* cpu_is_omap7xx(): True for OMAP730, OMAP850
* cpu_is_omap15xx(): True for OMAP1510, OMAP5910 and OMAP310
* cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710
* cpu_is_omap24xx(): True for OMAP2420, OMAP2422, OMAP2423, OMAP2430
@ -153,6 +161,10 @@ IS_OMAP_SUBCLASS(343x, 0x343)
# undef cpu_is_omap7xx
# define cpu_is_omap7xx() is_omap7xx()
# endif
# if defined(CONFIG_ARCH_OMAP850)
# undef cpu_is_omap7xx
# define cpu_is_omap7xx() is_omap7xx()
# endif
# if defined(CONFIG_ARCH_OMAP15XX)
# undef cpu_is_omap15xx
# define cpu_is_omap15xx() is_omap15xx()
@ -166,6 +178,10 @@ IS_OMAP_SUBCLASS(343x, 0x343)
# undef cpu_is_omap7xx
# define cpu_is_omap7xx() 1
# endif
# if defined(CONFIG_ARCH_OMAP850)
# undef cpu_is_omap7xx
# define cpu_is_omap7xx() 1
# endif
# if defined(CONFIG_ARCH_OMAP15XX)
# undef cpu_is_omap15xx
# define cpu_is_omap15xx() 1
@ -219,6 +235,7 @@ IS_OMAP_SUBCLASS(343x, 0x343)
* These are only rarely needed.
* cpu_is_omap330(): True for OMAP330
* cpu_is_omap730(): True for OMAP730
* cpu_is_omap850(): True for OMAP850
* cpu_is_omap1510(): True for OMAP1510
* cpu_is_omap1610(): True for OMAP1610
* cpu_is_omap1611(): True for OMAP1611
@ -241,6 +258,7 @@ static inline int is_omap ##type (void) \
IS_OMAP_TYPE(310, 0x0310)
IS_OMAP_TYPE(730, 0x0730)
IS_OMAP_TYPE(850, 0x0850)
IS_OMAP_TYPE(1510, 0x1510)
IS_OMAP_TYPE(1610, 0x1610)
IS_OMAP_TYPE(1611, 0x1611)
@ -255,6 +273,7 @@ IS_OMAP_TYPE(3430, 0x3430)
#define cpu_is_omap310() 0
#define cpu_is_omap730() 0
#define cpu_is_omap850() 0
#define cpu_is_omap1510() 0
#define cpu_is_omap1610() 0
#define cpu_is_omap5912() 0
@ -272,12 +291,22 @@ IS_OMAP_TYPE(3430, 0x3430)
# undef cpu_is_omap730
# define cpu_is_omap730() is_omap730()
# endif
# if defined(CONFIG_ARCH_OMAP850)
# undef cpu_is_omap850
# define cpu_is_omap850() is_omap850()
# endif
#else
# if defined(CONFIG_ARCH_OMAP730)
# undef cpu_is_omap730
# define cpu_is_omap730() 1
# endif
#endif
#else
# if defined(CONFIG_ARCH_OMAP850)
# undef cpu_is_omap850
# define cpu_is_omap850() 1
# endif
#endif
/*
* Whether we have MULTI_OMAP1 or not, we still need to distinguish
@ -320,7 +349,7 @@ IS_OMAP_TYPE(3430, 0x3430)
#endif
/* Macros to detect if we have OMAP1 or OMAP2 */
#define cpu_class_is_omap1() (cpu_is_omap730() || cpu_is_omap15xx() || \
#define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \
cpu_is_omap16xx())
#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx())
@ -392,5 +421,3 @@ int omap_type(void);
void omap2_check_revision(void);
#endif /* defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) */
#endif

3
arch/arm/plat-omap/include/mach/gpio.h
View File

@ -31,7 +31,8 @@
#define OMAP_MPUIO_BASE 0xfffb5000
#ifdef CONFIG_ARCH_OMAP730
#if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850))
#define OMAP_MPUIO_INPUT_LATCH 0x00
#define OMAP_MPUIO_OUTPUT 0x02
#define OMAP_MPUIO_IO_CNTL 0x04

74
arch/arm/plat-omap/include/mach/hardware.h
View File

@ -286,78 +286,4 @@
#include "omap24xx.h"
#include "omap34xx.h"
#ifndef __ASSEMBLER__
/*
* ---------------------------------------------------------------------------
* Board specific defines
* ---------------------------------------------------------------------------
*/
#ifdef CONFIG_MACH_OMAP_INNOVATOR
#include "board-innovator.h"
#endif
#ifdef CONFIG_MACH_OMAP_H2
#include "board-h2.h"
#endif
#ifdef CONFIG_MACH_OMAP_PERSEUS2
#include "board-perseus2.h"
#endif
#ifdef CONFIG_MACH_OMAP_FSAMPLE
#include "board-fsample.h"
#endif
#ifdef CONFIG_MACH_OMAP_H3
#include "board-h3.h"
#endif
#ifdef CONFIG_MACH_OMAP_H4
#include "board-h4.h"
#endif
#ifdef CONFIG_MACH_OMAP_2430SDP
#include "board-2430sdp.h"
#endif
#ifdef CONFIG_MACH_OMAP3_BEAGLE
#include "board-omap3beagle.h"
#endif
#ifdef CONFIG_MACH_OMAP_LDP
#include "board-ldp.h"
#endif
#ifdef CONFIG_MACH_OMAP_APOLLON
#include "board-apollon.h"
#endif
#ifdef CONFIG_MACH_OMAP_OSK
#include "board-osk.h"
#endif
#ifdef CONFIG_MACH_VOICEBLUE
#include "board-voiceblue.h"
#endif
#ifdef CONFIG_MACH_OMAP_PALMTE
#include "board-palmte.h"
#endif
#ifdef CONFIG_MACH_OMAP_PALMZ71
#include "board-palmz71.h"
#endif
#ifdef CONFIG_MACH_OMAP_PALMTT
#include "board-palmtt.h"
#endif
#ifdef CONFIG_MACH_SX1
#include "board-sx1.h"
#endif
#endif /* !__ASSEMBLER__ */
#endif /* __ASM_ARCH_OMAP_HARDWARE_H */

83
arch/arm/plat-omap/include/mach/irqs.h
View File

@ -104,6 +104,29 @@
#define INT_730_GPIO_BANK6 18
#define INT_730_SPGIO_WR 29
/*
* OMAP-850 specific IRQ numbers for interrupt handler 1
*/
#define INT_850_IH2_FIQ 0
#define INT_850_IH2_IRQ 1
#define INT_850_USB_NON_ISO 2
#define INT_850_USB_ISO 3
#define INT_850_ICR 4
#define INT_850_EAC 5
#define INT_850_GPIO_BANK1 6
#define INT_850_GPIO_BANK2 7
#define INT_850_GPIO_BANK3 8
#define INT_850_McBSP2TX 10
#define INT_850_McBSP2RX 11
#define INT_850_McBSP2RX_OVF 12
#define INT_850_LCD_LINE 14
#define INT_850_GSM_PROTECT 15
#define INT_850_TIMER3 16
#define INT_850_GPIO_BANK5 17
#define INT_850_GPIO_BANK6 18
#define INT_850_SPGIO_WR 29
/*
* IRQ numbers for interrupt handler 2
*
@ -237,6 +260,64 @@
#define INT_730_DMA_CH15 (62 + IH2_BASE)
#define INT_730_NAND (63 + IH2_BASE)
/*
* OMAP-850 specific IRQ numbers for interrupt handler 2
*/
#define INT_850_HW_ERRORS (0 + IH2_BASE)
#define INT_850_NFIQ_PWR_FAIL (1 + IH2_BASE)
#define INT_850_CFCD (2 + IH2_BASE)
#define INT_850_CFIREQ (3 + IH2_BASE)
#define INT_850_I2C (4 + IH2_BASE)
#define INT_850_PCC (5 + IH2_BASE)
#define INT_850_MPU_EXT_NIRQ (6 + IH2_BASE)
#define INT_850_SPI_100K_1 (7 + IH2_BASE)
#define INT_850_SYREN_SPI (8 + IH2_BASE)
#define INT_850_VLYNQ (9 + IH2_BASE)
#define INT_850_GPIO_BANK4 (10 + IH2_BASE)
#define INT_850_McBSP1TX (11 + IH2_BASE)
#define INT_850_McBSP1RX (12 + IH2_BASE)
#define INT_850_McBSP1RX_OF (13 + IH2_BASE)
#define INT_850_UART_MODEM_IRDA_2 (14 + IH2_BASE)
#define INT_850_UART_MODEM_1 (15 + IH2_BASE)
#define INT_850_MCSI (16 + IH2_BASE)
#define INT_850_uWireTX (17 + IH2_BASE)
#define INT_850_uWireRX (18 + IH2_BASE)
#define INT_850_SMC_CD (19 + IH2_BASE)
#define INT_850_SMC_IREQ (20 + IH2_BASE)
#define INT_850_HDQ_1WIRE (21 + IH2_BASE)
#define INT_850_TIMER32K (22 + IH2_BASE)
#define INT_850_MMC_SDIO (23 + IH2_BASE)
#define INT_850_UPLD (24 + IH2_BASE)
#define INT_850_USB_HHC_1 (27 + IH2_BASE)
#define INT_850_USB_HHC_2 (28 + IH2_BASE)
#define INT_850_USB_GENI (29 + IH2_BASE)
#define INT_850_USB_OTG (30 + IH2_BASE)
#define INT_850_CAMERA_IF (31 + IH2_BASE)
#define INT_850_RNG (32 + IH2_BASE)
#define INT_850_DUAL_MODE_TIMER (33 + IH2_BASE)
#define INT_850_DBB_RF_EN (34 + IH2_BASE)
#define INT_850_MPUIO_KEYPAD (35 + IH2_BASE)
#define INT_850_SHA1_MD5 (36 + IH2_BASE)
#define INT_850_SPI_100K_2 (37 + IH2_BASE)
#define INT_850_RNG_IDLE (38 + IH2_BASE)
#define INT_850_MPUIO (39 + IH2_BASE)
#define INT_850_LLPC_LCD_CTRL_CAN_BE_OFF (40 + IH2_BASE)
#define INT_850_LLPC_OE_FALLING (41 + IH2_BASE)
#define INT_850_LLPC_OE_RISING (42 + IH2_BASE)
#define INT_850_LLPC_VSYNC (43 + IH2_BASE)
#define INT_850_WAKE_UP_REQ (46 + IH2_BASE)
#define INT_850_DMA_CH6 (53 + IH2_BASE)
#define INT_850_DMA_CH7 (54 + IH2_BASE)
#define INT_850_DMA_CH8 (55 + IH2_BASE)
#define INT_850_DMA_CH9 (56 + IH2_BASE)
#define INT_850_DMA_CH10 (57 + IH2_BASE)
#define INT_850_DMA_CH11 (58 + IH2_BASE)
#define INT_850_DMA_CH12 (59 + IH2_BASE)
#define INT_850_DMA_CH13 (60 + IH2_BASE)
#define INT_850_DMA_CH14 (61 + IH2_BASE)
#define INT_850_DMA_CH15 (62 + IH2_BASE)
#define INT_850_NAND (63 + IH2_BASE)
#define INT_24XX_SYS_NIRQ 7
#define INT_24XX_SDMA_IRQ0 12
#define INT_24XX_SDMA_IRQ1 13
@ -341,7 +422,7 @@
#define INT_34XX_BENCH_MPU_EMUL 3
/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and
/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
* 16 MPUIO lines */
#define OMAP_MAX_GPIO_LINES 192
#define IH_GPIO_BASE (128 + IH2_BASE)

27
arch/arm/plat-omap/include/mach/mailbox.h
View File

@ -33,6 +33,9 @@ struct omap_mbox_ops {
void (*disable_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq);
void (*ack_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq);
int (*is_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq);
/* ctx */
void (*save_ctx)(struct omap_mbox *mbox);
void (*restore_ctx)(struct omap_mbox *mbox);
};
struct omap_mbox_queue {
@ -53,7 +56,7 @@ struct omap_mbox {
mbox_msg_t seq_snd, seq_rcv;
struct device dev;
struct device *dev;
struct omap_mbox *next;
void *priv;
@ -67,7 +70,27 @@ void omap_mbox_init_seq(struct omap_mbox *);
struct omap_mbox *omap_mbox_get(const char *);
void omap_mbox_put(struct omap_mbox *);
int omap_mbox_register(struct omap_mbox *);
int omap_mbox_register(struct device *parent, struct omap_mbox *);
int omap_mbox_unregister(struct omap_mbox *);
static inline void omap_mbox_save_ctx(struct omap_mbox *mbox)
{
if (!mbox->ops->save_ctx) {
dev_err(mbox->dev, "%s:\tno save\n", __func__);
return;
}
mbox->ops->save_ctx(mbox);
}
static inline void omap_mbox_restore_ctx(struct omap_mbox *mbox)
{
if (!mbox->ops->restore_ctx) {
dev_err(mbox->dev, "%s:\tno restore\n", __func__);
return;
}
mbox->ops->restore_ctx(mbox);
}
#endif /* MAILBOX_H */

2
arch/arm/plat-omap/include/mach/mmc.h
View File

@ -37,6 +37,8 @@
#define OMAP_MMC_MAX_SLOTS 2
struct omap_mmc_platform_data {
/* back-link to device */
struct device *dev;
/* number of slots per controller */
unsigned nr_slots:2;

65
arch/arm/plat-omap/include/mach/mux.h
View File

@ -61,6 +61,16 @@
.pull_bit = bit, \
.pull_val = status,
#define MUX_REG_850(reg, mode_offset, mode) .mux_reg_name = "OMAP850_IO_CONF_"#reg, \
.mux_reg = OMAP850_IO_CONF_##reg, \
.mask_offset = mode_offset, \
.mask = mode,
#define PULL_REG_850(reg, bit, status) .pull_name = "OMAP850_IO_CONF_"#reg, \
.pull_reg = OMAP850_IO_CONF_##reg, \
.pull_bit = bit, \
.pull_val = status,
#else
#define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \
@ -83,6 +93,15 @@
.pull_bit = bit, \
.pull_val = status,
#define MUX_REG_850(reg, mode_offset, mode) \
.mux_reg = OMAP850_IO_CONF_##reg, \
.mask_offset = mode_offset, \
.mask = mode,
#define PULL_REG_850(reg, bit, status) .pull_reg = OMAP850_IO_CONF_##reg, \
.pull_bit = bit, \
.pull_val = status,
#endif /* CONFIG_OMAP_MUX_DEBUG */
#define MUX_CFG(desc, mux_reg, mode_offset, mode, \
@ -98,7 +117,7 @@
/*
* OMAP730 has a slightly different config for the pin mux.
* OMAP730/850 has a slightly different config for the pin mux.
* - config regs are the OMAP730_IO_CONF_x regs (see omap730.h) regs and
* not the FUNC_MUX_CTRL_x regs from hardware.h
* - for pull-up/down, only has one enable bit which is is in the same register
@ -114,6 +133,17 @@
PU_PD_REG(NA, 0) \
},
#define MUX_CFG_850(desc, mux_reg, mode_offset, mode, \
pull_bit, pull_status, debug_status)\
{ \
.name = desc, \
.debug = debug_status, \
MUX_REG_850(mux_reg, mode_offset, mode) \
PULL_REG_850(mux_reg, pull_bit, pull_status) \
PU_PD_REG(NA, 0) \
},
#define MUX_CFG_24XX(desc, reg_offset, mode, \
pull_en, pull_mode, dbg) \
{ \
@ -221,6 +251,26 @@ enum omap730_index {
W17_730_USB_VBUSI,
};
enum omap850_index {
/* OMAP 850 keyboard */
E2_850_KBR0,
J7_850_KBR1,
E1_850_KBR2,
F3_850_KBR3,
D2_850_KBR4,
C2_850_KBC0,
D3_850_KBC1,
E4_850_KBC2,
F4_850_KBC3,
E3_850_KBC4,
/* USB */
AA17_850_USB_DM,
W16_850_USB_PU_EN,
W17_850_USB_VBUSI,
};
enum omap1xxx_index {
/* UART1 (BT_UART_GATING)*/
UART1_TX = 0,
@ -788,7 +838,20 @@ enum omap34xx_index {
* - "_DOWN" suffix (GPIO3_DOWN) with internal pulldown
* - "_OUT" suffix (GPIO3_OUT) for output-only pins (unlike 24xx)
*/
AF26_34XX_GPIO0,
AF22_34XX_GPIO9,
AH8_34XX_GPIO29,
U8_34XX_GPIO54_OUT,
U8_34XX_GPIO54_DOWN,
L8_34XX_GPIO63,
G25_34XX_GPIO86_OUT,
AG4_34XX_GPIO134_OUT,
AE4_34XX_GPIO136_OUT,
AF6_34XX_GPIO140_UP,
AE6_34XX_GPIO141,
AF5_34XX_GPIO142,
AE5_34XX_GPIO143,
H19_34XX_GPIO164_OUT,
J25_34XX_GPIO170,
};

28
arch/arm/plat-omap/include/mach/omap34xx.h
View File

@ -49,6 +49,33 @@
#define OMAP343X_CTRL_BASE OMAP343X_SCM_BASE
#define OMAP34XX_IC_BASE 0x48200000
#define OMAP3430_ISP_BASE (L4_34XX_BASE + 0xBC000)
#define OMAP3430_ISP_CBUFF_BASE (OMAP3430_ISP_BASE + 0x0100)
#define OMAP3430_ISP_CCP2_BASE (OMAP3430_ISP_BASE + 0x0400)
#define OMAP3430_ISP_CCDC_BASE (OMAP3430_ISP_BASE + 0x0600)
#define OMAP3430_ISP_HIST_BASE (OMAP3430_ISP_BASE + 0x0A00)
#define OMAP3430_ISP_H3A_BASE (OMAP3430_ISP_BASE + 0x0C00)
#define OMAP3430_ISP_PREV_BASE (OMAP3430_ISP_BASE + 0x0E00)
#define OMAP3430_ISP_RESZ_BASE (OMAP3430_ISP_BASE + 0x1000)
#define OMAP3430_ISP_SBL_BASE (OMAP3430_ISP_BASE + 0x1200)
#define OMAP3430_ISP_MMU_BASE (OMAP3430_ISP_BASE + 0x1400)
#define OMAP3430_ISP_CSI2A_BASE (OMAP3430_ISP_BASE + 0x1800)
#define OMAP3430_ISP_CSI2PHY_BASE (OMAP3430_ISP_BASE + 0x1970)
#define OMAP3430_ISP_END (OMAP3430_ISP_BASE + 0x06F)
#define OMAP3430_ISP_CBUFF_END (OMAP3430_ISP_CBUFF_BASE + 0x077)
#define OMAP3430_ISP_CCP2_END (OMAP3430_ISP_CCP2_BASE + 0x1EF)
#define OMAP3430_ISP_CCDC_END (OMAP3430_ISP_CCDC_BASE + 0x0A7)
#define OMAP3430_ISP_HIST_END (OMAP3430_ISP_HIST_BASE + 0x047)
#define OMAP3430_ISP_H3A_END (OMAP3430_ISP_H3A_BASE + 0x05F)
#define OMAP3430_ISP_PREV_END (OMAP3430_ISP_PREV_BASE + 0x09F)
#define OMAP3430_ISP_RESZ_END (OMAP3430_ISP_RESZ_BASE + 0x0AB)
#define OMAP3430_ISP_SBL_END (OMAP3430_ISP_SBL_BASE + 0x0FB)
#define OMAP3430_ISP_MMU_END (OMAP3430_ISP_MMU_BASE + 0x06F)
#define OMAP3430_ISP_CSI2A_END (OMAP3430_ISP_CSI2A_BASE + 0x16F)
#define OMAP3430_ISP_CSI2PHY_END (OMAP3430_ISP_CSI2PHY_BASE + 0x007)
#define OMAP34XX_IVA_INTC_BASE 0x40000000
#define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000)
#define OMAP34XX_HSUSB_HOST_BASE (L4_34XX_BASE + 0x64000)
@ -61,6 +88,7 @@
#define OMAP2_CM_BASE OMAP3430_CM_BASE
#define OMAP2_PRM_BASE OMAP3430_PRM_BASE
#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP34XX_IC_BASE)
#define OMAP34XX_MAILBOX_BASE (L4_34XX_BASE + 0x94000)
#endif

102
arch/arm/plat-omap/include/mach/omap850.h Normal file
View File

@ -0,0 +1,102 @@
/* arch/arm/plat-omap/include/mach/omap850.h
*
* Hardware definitions for TI OMAP850 processor.
*
* Derived from omap730.h by Zebediah C. McClure <zmc@lurian.net>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __ASM_ARCH_OMAP850_H
#define __ASM_ARCH_OMAP850_H
/*
* ----------------------------------------------------------------------------
* Base addresses
* ----------------------------------------------------------------------------
*/
/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */
#define OMAP850_DSP_BASE 0xE0000000
#define OMAP850_DSP_SIZE 0x50000
#define OMAP850_DSP_START 0xE0000000
#define OMAP850_DSPREG_BASE 0xE1000000
#define OMAP850_DSPREG_SIZE SZ_128K
#define OMAP850_DSPREG_START 0xE1000000
/*
* ----------------------------------------------------------------------------
* OMAP850 specific configuration registers
* ----------------------------------------------------------------------------
*/
#define OMAP850_CONFIG_BASE 0xfffe1000
#define OMAP850_IO_CONF_0 0xfffe1070
#define OMAP850_IO_CONF_1 0xfffe1074
#define OMAP850_IO_CONF_2 0xfffe1078
#define OMAP850_IO_CONF_3 0xfffe107c
#define OMAP850_IO_CONF_4 0xfffe1080
#define OMAP850_IO_CONF_5 0xfffe1084
#define OMAP850_IO_CONF_6 0xfffe1088
#define OMAP850_IO_CONF_7 0xfffe108c
#define OMAP850_IO_CONF_8 0xfffe1090
#define OMAP850_IO_CONF_9 0xfffe1094
#define OMAP850_IO_CONF_10 0xfffe1098
#define OMAP850_IO_CONF_11 0xfffe109c
#define OMAP850_IO_CONF_12 0xfffe10a0
#define OMAP850_IO_CONF_13 0xfffe10a4
#define OMAP850_MODE_1 0xfffe1010
#define OMAP850_MODE_2 0xfffe1014
/* CSMI specials: in terms of base + offset */
#define OMAP850_MODE2_OFFSET 0x14
/*
* ----------------------------------------------------------------------------
* OMAP850 traffic controller configuration registers
* ----------------------------------------------------------------------------
*/
#define OMAP850_FLASH_CFG_0 0xfffecc10
#define OMAP850_FLASH_ACFG_0 0xfffecc50
#define OMAP850_FLASH_CFG_1 0xfffecc14
#define OMAP850_FLASH_ACFG_1 0xfffecc54
/*
* ----------------------------------------------------------------------------
* OMAP850 DSP control registers
* ----------------------------------------------------------------------------
*/
#define OMAP850_ICR_BASE 0xfffbb800
#define OMAP850_DSP_M_CTL 0xfffbb804
#define OMAP850_DSP_MMU_BASE 0xfffed200
/*
* ----------------------------------------------------------------------------
* OMAP850 PCC_UPLD configuration registers
* ----------------------------------------------------------------------------
*/
#define OMAP850_PCC_UPLD_CTRL_BASE (0xfffe0900)
#define OMAP850_PCC_UPLD_CTRL (OMAP850_PCC_UPLD_CTRL_BASE + 0x00)
#endif /* __ASM_ARCH_OMAP850_H */

2
arch/arm/plat-omap/include/mach/system.h
View File

@ -13,6 +13,8 @@
#ifndef CONFIG_MACH_VOICEBLUE
#define voiceblue_reset() do {} while (0)
#else
extern void voiceblue_reset(void);
#endif
static inline void arch_idle(void)

10
arch/arm/plat-omap/include/mach/usb.h
View File

@ -27,8 +27,18 @@
#define UDC_BASE OMAP2_UDC_BASE
#define OMAP_OHCI_BASE OMAP2_OHCI_BASE
#ifdef CONFIG_USB_MUSB_SOC
extern void usb_musb_init(void);
#else
static inline void usb_musb_init(void)
{
}
#endif
#endif
void omap_usb_init(struct omap_usb_config *pdata);
/*-------------------------------------------------------------------------*/
/*

152
arch/arm/plat-omap/mailbox.c
View File

@ -1,10 +1,9 @@
/*
* OMAP mailbox driver
*
* Copyright (C) 2006 Nokia Corporation. All rights reserved.
* Copyright (C) 2006-2009 Nokia Corporation. All rights reserved.
*
* Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
* Restructured by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
* Contact: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@ -22,21 +21,98 @@
*
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/device.h>
#include <linux/blkdev.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <mach/mailbox.h>
#include "mailbox.h"
static int enable_seq_bit;
module_param(enable_seq_bit, bool, 0);
MODULE_PARM_DESC(enable_seq_bit, "Enable sequence bit checking.");
static struct omap_mbox *mboxes;
static DEFINE_RWLOCK(mboxes_lock);
/*
* Mailbox sequence bit API
*/
/* seq_rcv should be initialized with any value other than
* 0 and 1 << 31, to allow either value for the first
* message. */
static inline void mbox_seq_init(struct omap_mbox *mbox)
{
if (!enable_seq_bit)
return;
/* any value other than 0 and 1 << 31 */
mbox->seq_rcv = 0xffffffff;
}
static inline void mbox_seq_toggle(struct omap_mbox *mbox, mbox_msg_t * msg)
{
if (!enable_seq_bit)
return;
/* add seq_snd to msg */
*msg = (*msg & 0x7fffffff) | mbox->seq_snd;
/* flip seq_snd */
mbox->seq_snd ^= 1 << 31;
}
static inline int mbox_seq_test(struct omap_mbox *mbox, mbox_msg_t msg)
{
mbox_msg_t seq;
if (!enable_seq_bit)
return 0;
seq = msg & (1 << 31);
if (seq == mbox->seq_rcv)
return -1;
mbox->seq_rcv = seq;
return 0;
}
/* Mailbox FIFO handle functions */
static inline mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox)
{
return mbox->ops->fifo_read(mbox);
}
static inline void mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
{
mbox->ops->fifo_write(mbox, msg);
}
static inline int mbox_fifo_empty(struct omap_mbox *mbox)
{
return mbox->ops->fifo_empty(mbox);
}
static inline int mbox_fifo_full(struct omap_mbox *mbox)
{
return mbox->ops->fifo_full(mbox);
}
/* Mailbox IRQ handle functions */
static inline void enable_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
{
mbox->ops->enable_irq(mbox, irq);
}
static inline void disable_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
{
mbox->ops->disable_irq(mbox, irq);
}
static inline void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
{
if (mbox->ops->ack_irq)
mbox->ops->ack_irq(mbox, irq);
}
static inline int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
{
return mbox->ops->is_irq(mbox, irq);
}
/* Mailbox Sequence Bit function */
void omap_mbox_init_seq(struct omap_mbox *mbox)
{
@ -136,7 +212,7 @@ static void mbox_rx_work(struct work_struct *work)
unsigned long flags;
if (mbox->rxq->callback == NULL) {
sysfs_notify(&mbox->dev.kobj, NULL, "mbox");
sysfs_notify(&mbox->dev->kobj, NULL, "mbox");
return;
}
@ -204,7 +280,7 @@ static void __mbox_rx_interrupt(struct omap_mbox *mbox)
/* no more messages in the fifo. clear IRQ source. */
ack_mbox_irq(mbox, IRQ_RX);
enable_mbox_irq(mbox, IRQ_RX);
nomem:
nomem:
schedule_work(&mbox->rxq->work);
}
@ -286,7 +362,7 @@ static ssize_t mbox_show(struct class *class, char *buf)
static CLASS_ATTR(mbox, S_IRUGO, mbox_show, NULL);
static struct class omap_mbox_class = {
.name = "omap_mbox",
.name = "omap-mailbox",
};
static struct omap_mbox_queue *mbox_queue_alloc(struct omap_mbox *mbox,
@ -333,21 +409,6 @@ static int omap_mbox_init(struct omap_mbox *mbox)
return ret;
}
mbox->dev.class = &omap_mbox_class;
dev_set_name(&mbox->dev, "%s", mbox->name);
dev_set_drvdata(&mbox->dev, mbox);
ret = device_register(&mbox->dev);
if (unlikely(ret))
goto fail_device_reg;
ret = device_create_file(&mbox->dev, &dev_attr_mbox);
if (unlikely(ret)) {
printk(KERN_ERR
"device_create_file failed: %d\n", ret);
goto fail_create_mbox;
}
ret = request_irq(mbox->irq, mbox_interrupt, IRQF_DISABLED,
mbox->name, mbox);
if (unlikely(ret)) {
@ -377,10 +438,6 @@ static int omap_mbox_init(struct omap_mbox *mbox)
fail_alloc_txq:
free_irq(mbox->irq, mbox);
fail_request_irq:
device_remove_file(&mbox->dev, &dev_attr_mbox);
fail_create_mbox:
device_unregister(&mbox->dev);
fail_device_reg:
if (unlikely(mbox->ops->shutdown))
mbox->ops->shutdown(mbox);
@ -393,8 +450,6 @@ static void omap_mbox_fini(struct omap_mbox *mbox)
mbox_queue_free(mbox->rxq);
free_irq(mbox->irq, mbox);
device_remove_file(&mbox->dev, &dev_attr_mbox);
class_unregister(&omap_mbox_class);
if (unlikely(mbox->ops->shutdown))
mbox->ops->shutdown(mbox);
@ -440,7 +495,7 @@ void omap_mbox_put(struct omap_mbox *mbox)
}
EXPORT_SYMBOL(omap_mbox_put);
int omap_mbox_register(struct omap_mbox *mbox)
int omap_mbox_register(struct device *parent, struct omap_mbox *mbox)
{
int ret = 0;
struct omap_mbox **tmp;
@ -450,14 +505,31 @@ int omap_mbox_register(struct omap_mbox *mbox)
if (mbox->next)
return -EBUSY;
mbox->dev = device_create(&omap_mbox_class,
parent, 0, mbox, "%s", mbox->name);
if (IS_ERR(mbox->dev))
return PTR_ERR(mbox->dev);
ret = device_create_file(mbox->dev, &dev_attr_mbox);
if (ret)
goto err_sysfs;
write_lock(&mboxes_lock);
tmp = find_mboxes(mbox->name);
if (*tmp)
if (*tmp) {
ret = -EBUSY;
else
*tmp = mbox;
write_unlock(&mboxes_lock);
goto err_find;
}
*tmp = mbox;
write_unlock(&mboxes_lock);
return 0;
err_find:
device_remove_file(mbox->dev, &dev_attr_mbox);
err_sysfs:
device_unregister(mbox->dev);
return ret;
}
EXPORT_SYMBOL(omap_mbox_register);
@ -473,6 +545,8 @@ int omap_mbox_unregister(struct omap_mbox *mbox)
*tmp = mbox->next;
mbox->next = NULL;
write_unlock(&mboxes_lock);
device_remove_file(mbox->dev, &dev_attr_mbox);
device_unregister(mbox->dev);
return 0;
}
tmp = &(*tmp)->next;
@ -501,4 +575,6 @@ static void __exit omap_mbox_class_exit(void)
subsys_initcall(omap_mbox_class_init);
module_exit(omap_mbox_class_exit);
MODULE_LICENSE("GPL");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("omap mailbox: interrupt driven messaging");
MODULE_AUTHOR("Toshihiro Kobayashi and Hiroshi DOYU");

100
arch/arm/plat-omap/mailbox.h
View File

@ -1,100 +0,0 @@
/*
* Mailbox internal functions
*
* Copyright (C) 2006 Nokia Corporation
* Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#ifndef __ARCH_ARM_PLAT_MAILBOX_H
#define __ARCH_ARM_PLAT_MAILBOX_H
/*
* Mailbox sequence bit API
*/
#if defined(CONFIG_ARCH_OMAP1)
# define MBOX_USE_SEQ_BIT
#elif defined(CONFIG_ARCH_OMAP2)
# define MBOX_USE_SEQ_BIT
#endif
#ifdef MBOX_USE_SEQ_BIT
/* seq_rcv should be initialized with any value other than
* 0 and 1 << 31, to allow either value for the first
* message. */
static inline void mbox_seq_init(struct omap_mbox *mbox)
{
/* any value other than 0 and 1 << 31 */
mbox->seq_rcv = 0xffffffff;
}
static inline void mbox_seq_toggle(struct omap_mbox *mbox, mbox_msg_t * msg)
{
/* add seq_snd to msg */
*msg = (*msg & 0x7fffffff) | mbox->seq_snd;
/* flip seq_snd */
mbox->seq_snd ^= 1 << 31;
}
static inline int mbox_seq_test(struct omap_mbox *mbox, mbox_msg_t msg)
{
mbox_msg_t seq = msg & (1 << 31);
if (seq == mbox->seq_rcv)
return -1;
mbox->seq_rcv = seq;
return 0;
}
#else
static inline void mbox_seq_init(struct omap_mbox *mbox)
{
}
static inline void mbox_seq_toggle(struct omap_mbox *mbox, mbox_msg_t * msg)
{
}
static inline int mbox_seq_test(struct omap_mbox *mbox, mbox_msg_t msg)
{
return 0;
}
#endif
/* Mailbox FIFO handle functions */
static inline mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox)
{
return mbox->ops->fifo_read(mbox);
}
static inline void mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
{
mbox->ops->fifo_write(mbox, msg);
}
static inline int mbox_fifo_empty(struct omap_mbox *mbox)
{
return mbox->ops->fifo_empty(mbox);
}
static inline int mbox_fifo_full(struct omap_mbox *mbox)
{
return mbox->ops->fifo_full(mbox);
}
/* Mailbox IRQ handle functions */
static inline void enable_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
{
mbox->ops->enable_irq(mbox, irq);
}
static inline void disable_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
{
mbox->ops->disable_irq(mbox, irq);
}
static inline void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
{
if (mbox->ops->ack_irq)
mbox->ops->ack_irq(mbox, irq);
}
static inline int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
{
return mbox->ops->is_irq(mbox, irq);
}
#endif /* __ARCH_ARM_PLAT_MAILBOX_H */

2
arch/arm/plat-omap/sram.c
View File

@ -148,7 +148,7 @@ void __init omap_detect_sram(void)
omap_sram_base = OMAP1_SRAM_VA;
omap_sram_start = OMAP1_SRAM_PA;
if (cpu_is_omap730())
if (cpu_is_omap7xx())
omap_sram_size = 0x32000; /* 200K */
else if (cpu_is_omap15xx())
omap_sram_size = 0x30000; /* 192K */

25
arch/arm/plat-omap/usb.c
View File

@ -729,30 +729,13 @@ static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
/*-------------------------------------------------------------------------*/
static struct omap_usb_config platform_data;
static int __init
omap_usb_init(void)
void __init omap_usb_init(struct omap_usb_config *pdata)
{
const struct omap_usb_config *config;
config = omap_get_config(OMAP_TAG_USB, struct omap_usb_config);
if (config == NULL) {
printk(KERN_ERR "USB: No board-specific "
"platform config found\n");
return -ENODEV;
}
platform_data = *config;
if (cpu_is_omap730() || cpu_is_omap16xx() || cpu_is_omap24xx())
omap_otg_init(&platform_data);
omap_otg_init(pdata);
else if (cpu_is_omap15xx())
omap_1510_usb_init(&platform_data);
else {
omap_1510_usb_init(pdata);
else
printk(KERN_ERR "USB: No init for your chip yet\n");
return -ENODEV;
}
return 0;
}
subsys_initcall(omap_usb_init);

29
arch/m68k/include/asm/param.h
View File

@ -1,5 +1,26 @@
#ifdef __uClinux__
#include "param_no.h"
#else
#include "param_mm.h"
#ifndef _M68K_PARAM_H
#define _M68K_PARAM_H
#ifdef __KERNEL__
# define HZ CONFIG_HZ /* Internal kernel timer frequency */
# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
#endif
#ifndef HZ
#define HZ 100
#endif
#ifdef __uClinux__
#define EXEC_PAGESIZE 4096
#else
#define EXEC_PAGESIZE 8192
#endif
#ifndef NOGROUP
#define NOGROUP (-1)
#endif
#define MAXHOSTNAMELEN 64 /* max length of hostname */
#endif /* _M68K_PARAM_H */

22
arch/m68k/include/asm/param_mm.h
View File

@ -1,22 +0,0 @@
#ifndef _M68K_PARAM_H
#define _M68K_PARAM_H
#ifdef __KERNEL__
# define HZ CONFIG_HZ /* Internal kernel timer frequency */
# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
#endif
#ifndef HZ
#define HZ 100
#endif
#define EXEC_PAGESIZE 8192
#ifndef NOGROUP
#define NOGROUP (-1)
#endif
#define MAXHOSTNAMELEN 64 /* max length of hostname */
#endif /* _M68K_PARAM_H */

22
arch/m68k/include/asm/param_no.h
View File

@ -1,22 +0,0 @@
#ifndef _M68KNOMMU_PARAM_H
#define _M68KNOMMU_PARAM_H
#ifdef __KERNEL__
#define HZ CONFIG_HZ
#define USER_HZ HZ
#define CLOCKS_PER_SEC (USER_HZ)
#endif
#ifndef HZ
#define HZ 100
#endif
#define EXEC_PAGESIZE 4096
#ifndef NOGROUP
#define NOGROUP (-1)
#endif
#define MAXHOSTNAMELEN 64 /* max length of hostname */
#endif /* _M68KNOMMU_PARAM_H */

88
arch/m68k/include/asm/ptrace.h
View File

@ -1,5 +1,87 @@
#ifdef __uClinux__
#include "ptrace_no.h"
#ifndef _M68K_PTRACE_H
#define _M68K_PTRACE_H
#define PT_D1 0
#define PT_D2 1
#define PT_D3 2
#define PT_D4 3
#define PT_D5 4
#define PT_D6 5
#define PT_D7 6
#define PT_A0 7
#define PT_A1 8
#define PT_A2 9
#define PT_A3 10
#define PT_A4 11
#define PT_A5 12
#define PT_A6 13
#define PT_D0 14
#define PT_USP 15
#define PT_ORIG_D0 16
#define PT_SR 17
#define PT_PC 18
#ifndef __ASSEMBLY__
/* this struct defines the way the registers are stored on the
stack during a system call. */
struct pt_regs {
long d1;
long d2;
long d3;
long d4;
long d5;
long a0;
long a1;
long a2;
long d0;
long orig_d0;
long stkadj;
#ifdef CONFIG_COLDFIRE
unsigned format : 4; /* frame format specifier */
unsigned vector : 12; /* vector offset */
unsigned short sr;
unsigned long pc;
#else
#include "ptrace_mm.h"
unsigned short sr;
unsigned long pc;
unsigned format : 4; /* frame format specifier */
unsigned vector : 12; /* vector offset */
#endif
};
/*
* This is the extended stack used by signal handlers and the context
* switcher: it's pushed after the normal "struct pt_regs".
*/
struct switch_stack {
unsigned long d6;
unsigned long d7;
unsigned long a3;
unsigned long a4;
unsigned long a5;
unsigned long a6;
unsigned long retpc;
};
/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
#define PTRACE_GETREGS 12
#define PTRACE_SETREGS 13
#define PTRACE_GETFPREGS 14
#define PTRACE_SETFPREGS 15
#ifdef __KERNEL__
#ifndef PS_S
#define PS_S (0x2000)
#define PS_M (0x1000)
#endif
#define user_mode(regs) (!((regs)->sr & PS_S))
#define instruction_pointer(regs) ((regs)->pc)
#define profile_pc(regs) instruction_pointer(regs)
extern void show_regs(struct pt_regs *);
#endif /* __KERNEL__ */
#endif /* __ASSEMBLY__ */
#endif /* _M68K_PTRACE_H */

80
arch/m68k/include/asm/ptrace_mm.h
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@ -1,80 +0,0 @@
#ifndef _M68K_PTRACE_H
#define _M68K_PTRACE_H
#define PT_D1 0
#define PT_D2 1
#define PT_D3 2
#define PT_D4 3
#define PT_D5 4
#define PT_D6 5
#define PT_D7 6
#define PT_A0 7
#define PT_A1 8
#define PT_A2 9
#define PT_A3 10
#define PT_A4 11
#define PT_A5 12
#define PT_A6 13
#define PT_D0 14
#define PT_USP 15
#define PT_ORIG_D0 16
#define PT_SR 17
#define PT_PC 18
#ifndef __ASSEMBLY__
/* this struct defines the way the registers are stored on the
stack during a system call. */
struct pt_regs {
long d1;
long d2;
long d3;
long d4;
long d5;
long a0;
long a1;
long a2;
long d0;
long orig_d0;
long stkadj;
unsigned short sr;
unsigned long pc;
unsigned format : 4; /* frame format specifier */
unsigned vector : 12; /* vector offset */
};
/*
* This is the extended stack used by signal handlers and the context
* switcher: it's pushed after the normal "struct pt_regs".
*/
struct switch_stack {
unsigned long d6;
unsigned long d7;
unsigned long a3;
unsigned long a4;
unsigned long a5;
unsigned long a6;
unsigned long retpc;
};
/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
#define PTRACE_GETREGS 12
#define PTRACE_SETREGS 13
#define PTRACE_GETFPREGS 14
#define PTRACE_SETFPREGS 15
#ifdef __KERNEL__
#ifndef PS_S
#define PS_S (0x2000)
#define PS_M (0x1000)
#endif
#define user_mode(regs) (!((regs)->sr & PS_S))
#define instruction_pointer(regs) ((regs)->pc)
#define profile_pc(regs) instruction_pointer(regs)
extern void show_regs(struct pt_regs *);
#endif /* __KERNEL__ */
#endif /* __ASSEMBLY__ */
#endif /* _M68K_PTRACE_H */

87
arch/m68k/include/asm/ptrace_no.h
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@ -1,87 +0,0 @@
#ifndef _M68K_PTRACE_H
#define _M68K_PTRACE_H
#define PT_D1 0
#define PT_D2 1
#define PT_D3 2
#define PT_D4 3
#define PT_D5 4
#define PT_D6 5
#define PT_D7 6
#define PT_A0 7
#define PT_A1 8
#define PT_A2 9
#define PT_A3 10
#define PT_A4 11
#define PT_A5 12
#define PT_A6 13
#define PT_D0 14
#define PT_USP 15
#define PT_ORIG_D0 16
#define PT_SR 17
#define PT_PC 18
#ifndef __ASSEMBLY__
/* this struct defines the way the registers are stored on the
stack during a system call. */
struct pt_regs {
long d1;
long d2;
long d3;
long d4;
long d5;
long a0;
long a1;
long a2;
long d0;
long orig_d0;
long stkadj;
#ifdef CONFIG_COLDFIRE
unsigned format : 4; /* frame format specifier */
unsigned vector : 12; /* vector offset */
unsigned short sr;
unsigned long pc;
#else
unsigned short sr;
unsigned long pc;
unsigned format : 4; /* frame format specifier */
unsigned vector : 12; /* vector offset */
#endif
};
/*
* This is the extended stack used by signal handlers and the context
* switcher: it's pushed after the normal "struct pt_regs".
*/
struct switch_stack {
unsigned long d6;
unsigned long d7;
unsigned long a3;
unsigned long a4;
unsigned long a5;
unsigned long a6;
unsigned long retpc;
};
/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
#define PTRACE_GETREGS 12
#define PTRACE_SETREGS 13
#define PTRACE_GETFPREGS 14
#define PTRACE_SETFPREGS 15
#ifdef __KERNEL__
#ifndef PS_S
#define PS_S (0x2000)
#define PS_M (0x1000)
#endif
#define user_mode(regs) (!((regs)->sr & PS_S))
#define instruction_pointer(regs) ((regs)->pc)
#define profile_pc(regs) instruction_pointer(regs)
extern void show_regs(struct pt_regs *);
#endif /* __KERNEL__ */
#endif /* __ASSEMBLY__ */
#endif /* _M68K_PTRACE_H */

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