ASoC/ARM: Davinci: McASP: split asp header into platform and audio specific

Davinci McASP header & driver are shared by few OMAP platforms (like
TI81xx, AM335x). Splitting asp header into Davinci platform specific
header and Audio specific header helps to share them across platforms.

Audio specific defines is moved to to common
<linux/platform_data/davinci_asp.h> so that the header can be
accessed by all related platforms.

While here, correct the header usage (remove multiple header
re-definitions and unused headers) and remove platform names from
structures comments and enum. Also some some coding style errors.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Acked-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Hebbar, Gururaja 2012-08-27 18:56:41 +05:30 committed by Mark Brown
parent bdd732786d
commit 896f66b7de
14 changed files with 81 additions and 68 deletions

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@ -0,0 +1,49 @@
/*
* TI DaVinci Audio definitions
*/
#ifndef __ASM_ARCH_DAVINCI_ASP_H
#define __ASM_ARCH_DAVINCI_ASP_H
/* Bases of dm644x and dm355 register banks */
#define DAVINCI_ASP0_BASE 0x01E02000
#define DAVINCI_ASP1_BASE 0x01E04000
/* Bases of dm365 register banks */
#define DAVINCI_DM365_ASP0_BASE 0x01D02000
/* Bases of dm646x register banks */
#define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000
#define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800
/* Bases of da850/da830 McASP0 register banks */
#define DAVINCI_DA8XX_MCASP0_REG_BASE 0x01D00000
/* Bases of da830 McASP1 register banks */
#define DAVINCI_DA830_MCASP1_REG_BASE 0x01D04000
/* EDMA channels of dm644x and dm355 */
#define DAVINCI_DMA_ASP0_TX 2
#define DAVINCI_DMA_ASP0_RX 3
#define DAVINCI_DMA_ASP1_TX 8
#define DAVINCI_DMA_ASP1_RX 9
/* EDMA channels of dm646x */
#define DAVINCI_DM646X_DMA_MCASP0_AXEVT0 6
#define DAVINCI_DM646X_DMA_MCASP0_AREVT0 9
#define DAVINCI_DM646X_DMA_MCASP1_AXEVT1 12
/* EDMA channels of da850/da830 McASP0 */
#define DAVINCI_DA8XX_DMA_MCASP0_AREVT 0
#define DAVINCI_DA8XX_DMA_MCASP0_AXEVT 1
/* EDMA channels of da830 McASP1 */
#define DAVINCI_DA830_DMA_MCASP1_AREVT 2
#define DAVINCI_DA830_DMA_MCASP1_AXEVT 3
/* Interrupts */
#define DAVINCI_ASP0_RX_INT IRQ_MBRINT
#define DAVINCI_ASP0_TX_INT IRQ_MBXINT
#define DAVINCI_ASP1_RX_INT IRQ_MBRINT
#define DAVINCI_ASP1_TX_INT IRQ_MBXINT
#endif /* __ASM_ARCH_DAVINCI_ASP_H */

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@ -22,10 +22,11 @@
#include <linux/davinci_emac.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/platform_data/davinci_asp.h>
#include <mach/asp.h>
#include <mach/keyscan.h>
#include <mach/hardware.h>
#include <mach/edma.h>
#include <media/davinci/vpfe_capture.h>
#include <media/davinci/vpif_types.h>

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@ -24,6 +24,7 @@
#include <mach/cpuidle.h>
#include "clock.h"
#include "asp.h"
#define DA8XX_TPCC_BASE 0x01c00000
#define DA8XX_TPTC0_BASE 0x01c08000

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@ -26,13 +26,13 @@
#include <mach/time.h>
#include <mach/serial.h>
#include <mach/common.h>
#include <mach/asp.h>
#include <mach/spi.h>
#include <mach/gpio-davinci.h>
#include "davinci.h"
#include "clock.h"
#include "mux.h"
#include "asp.h"
#define DM355_UART2_BASE (IO_PHYS + 0x206000)

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@ -29,7 +29,6 @@
#include <mach/time.h>
#include <mach/serial.h>
#include <mach/common.h>
#include <mach/asp.h>
#include <mach/keyscan.h>
#include <mach/spi.h>
#include <mach/gpio-davinci.h>
@ -37,6 +36,7 @@
#include "davinci.h"
#include "clock.h"
#include "mux.h"
#include "asp.h"
#define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */

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@ -23,12 +23,12 @@
#include <mach/time.h>
#include <mach/serial.h>
#include <mach/common.h>
#include <mach/asp.h>
#include <mach/gpio-davinci.h>
#include "davinci.h"
#include "clock.h"
#include "mux.h"
#include "asp.h"
/*
* Device specific clocks

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@ -24,12 +24,12 @@
#include <mach/time.h>
#include <mach/serial.h>
#include <mach/common.h>
#include <mach/asp.h>
#include <mach/gpio-davinci.h>
#include "davinci.h"
#include "clock.h"
#include "mux.h"
#include "asp.h"
#define DAVINCI_VPIF_BASE (0x01C12000)

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@ -16,11 +16,11 @@
#include <linux/platform_device.h>
#include <linux/davinci_emac.h>
#include <linux/spi/spi.h>
#include <linux/platform_data/davinci_asp.h>
#include <mach/serial.h>
#include <mach/edma.h>
#include <mach/i2c.h>
#include <mach/asp.h>
#include <mach/mmc.h>
#include <mach/usb.h>
#include <mach/pm.h>

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@ -1,59 +1,26 @@
/*
* <mach/asp.h> - DaVinci Audio Serial Port support
* TI DaVinci Audio Serial Port support
*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __ASM_ARCH_DAVINCI_ASP_H
#define __ASM_ARCH_DAVINCI_ASP_H
#include <mach/irqs.h>
#include <mach/edma.h>
/* Bases of dm644x and dm355 register banks */
#define DAVINCI_ASP0_BASE 0x01E02000
#define DAVINCI_ASP1_BASE 0x01E04000
/* Bases of dm365 register banks */
#define DAVINCI_DM365_ASP0_BASE 0x01D02000
/* Bases of dm646x register banks */
#define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000
#define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800
/* Bases of da850/da830 McASP0 register banks */
#define DAVINCI_DA8XX_MCASP0_REG_BASE 0x01D00000
/* Bases of da830 McASP1 register banks */
#define DAVINCI_DA830_MCASP1_REG_BASE 0x01D04000
/* EDMA channels of dm644x and dm355 */
#define DAVINCI_DMA_ASP0_TX 2
#define DAVINCI_DMA_ASP0_RX 3
#define DAVINCI_DMA_ASP1_TX 8
#define DAVINCI_DMA_ASP1_RX 9
/* EDMA channels of dm646x */
#define DAVINCI_DM646X_DMA_MCASP0_AXEVT0 6
#define DAVINCI_DM646X_DMA_MCASP0_AREVT0 9
#define DAVINCI_DM646X_DMA_MCASP1_AXEVT1 12
/* EDMA channels of da850/da830 McASP0 */
#define DAVINCI_DA8XX_DMA_MCASP0_AREVT 0
#define DAVINCI_DA8XX_DMA_MCASP0_AXEVT 1
/* EDMA channels of da830 McASP1 */
#define DAVINCI_DA830_DMA_MCASP1_AREVT 2
#define DAVINCI_DA830_DMA_MCASP1_AXEVT 3
/* Interrupts */
#define DAVINCI_ASP0_RX_INT IRQ_MBRINT
#define DAVINCI_ASP0_TX_INT IRQ_MBXINT
#define DAVINCI_ASP1_RX_INT IRQ_MBRINT
#define DAVINCI_ASP1_TX_INT IRQ_MBXINT
#ifndef __DAVINCI_ASP_H
#define __DAVINCI_ASP_H
struct snd_platform_data {
u32 tx_dma_offset;
u32 rx_dma_offset;
enum dma_event_q asp_chan_q; /* event queue number for ASP channel */
enum dma_event_q ram_chan_q; /* event queue number for RAM channel */
int asp_chan_q; /* event queue number for ASP channel */
int ram_chan_q; /* event queue number for RAM channel */
unsigned int codec_fmt;
/*
* Allowing this is more efficient and eliminates left and right swaps
@ -70,7 +37,7 @@ struct snd_platform_data {
* and MCBSP_CLKS.
* Depending on different hardware connections it is possible
* to use this setting to change the behaviour of McBSP
* driver. The dm365_clk_input_pin enum is available for dm365
* driver.
*/
int clk_input_pin;
@ -122,8 +89,8 @@ enum {
MCASP_VERSION_2, /* DA8xx/OMAPL1x */
};
enum dm365_clk_input_pin {
MCBSP_CLKR = 0, /* DM365 */
enum mcbsp_clk_input_pin {
MCBSP_CLKR = 0, /* as in DM365 */
MCBSP_CLKS,
};
@ -134,4 +101,4 @@ enum dm365_clk_input_pin {
#define DAVINCI_MCASP_IIS_MODE 0
#define DAVINCI_MCASP_DIT_MODE 1
#endif /* __ASM_ARCH_DAVINCI_ASP_H */
#endif

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@ -22,9 +22,6 @@
#include <asm/dma.h>
#include <asm/mach-types.h>
#include <mach/asp.h>
#include <mach/edma.h>
#include "davinci-pcm.h"
#include "davinci-i2s.h"
#include "davinci-mcasp.h"

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@ -16,6 +16,7 @@
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/platform_data/davinci_asp.h>
#include <sound/core.h>
#include <sound/pcm.h>
@ -23,8 +24,6 @@
#include <sound/initval.h>
#include <sound/soc.h>
#include <mach/asp.h>
#include "davinci-pcm.h"
#include "davinci-i2s.h"

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@ -19,7 +19,8 @@
#define DAVINCI_MCASP_H
#include <linux/io.h>
#include <mach/asp.h>
#include <linux/platform_data/davinci_asp.h>
#include "davinci-pcm.h"
#define DAVINCI_MCASP_RATES SNDRV_PCM_RATE_8000_96000

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@ -23,7 +23,6 @@
#include <sound/soc.h>
#include <asm/dma.h>
#include <mach/edma.h>
#include <mach/sram.h>
#include "davinci-pcm.h"

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@ -12,9 +12,8 @@
#ifndef _DAVINCI_PCM_H
#define _DAVINCI_PCM_H
#include <linux/platform_data/davinci_asp.h>
#include <mach/edma.h>
#include <mach/asp.h>
struct davinci_pcm_dma_params {
int channel; /* sync dma channel ID */