media updates for v5.5-rc1

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Merge tag 'media/v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media

Pull media updates from Mauro Carvalho Chehab:

 - uAPI documentation for stateless decoders

 - Added a new CEC ioctl together with its documentation

 - Improved IPU3 documentation

 - New i2c drivers: hi556 and imx290

 - Added support on Vivid driver for meta streams

 - Added de-interlace support for sunxi subdriver

 - Added a few new remote controler keymaps

 - Added H.265 support for Sunxi Cedrus driver

 - Another round of random driver cleanups, fixes and improvements

* tag 'media/v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (361 commits)
  media: Revert "media: mtk-vcodec: Remove extra area allocation in an input buffer on encoding"
  media: hantro: Set H264 FIELDPIC_FLAG_E flag correctly
  media: hantro: Remove now unused H264 pic_size
  media: hantro: Use output buffer width and height for H264 decoding
  media: hantro: Reduce H264 extra space for motion vectors
  media: hantro: Fix H264 motion vector buffer offset
  media: ti-vpe: vpe: fix compatible to match bindings
  media: dt-bindings: media: ti-vpe: Document VPE driver
  media: zr364xx: remove redundant assigmnent to idx, clean up code
  media: Documentation: media: *_DEFAULT targets for subdevs
  media: hantro: Fix s_fmt for dynamic resolution changes
  media: i2c: Use the correct style for SPDX License Identifier
  media: siano: Use the correct style for SPDX License Identifier
  media: vicodec: media_device_cleanup was called too early
  media: vim2m: media_device_cleanup was called too early
  media: cedrus: Increase maximum supported size
  media: cedrus: Fix H264 4k support
  media: cedrus: Properly signal size in mode register
  media: v4l2-ctrl: Lock main_hdl on operations of requests_queued.
  media: si470x-i2c: add missed operations in remove
  ...
This commit is contained in:
Linus Torvalds 2019-11-26 20:11:43 -08:00
commit 89d57dddd7
299 changed files with 12866 additions and 4740 deletions

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@ -0,0 +1,76 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/allwinner,sun8i-h3-deinterlace.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner H3 Deinterlace Device Tree Bindings
maintainers:
- Jernej Skrabec <jernej.skrabec@siol.net>
- Chen-Yu Tsai <wens@csie.org>
- Maxime Ripard <mripard@kernel.org>
description: |-
The Allwinner H3 and later has a deinterlace core used for
deinterlacing interlaced video content.
properties:
compatible:
const: allwinner,sun8i-h3-deinterlace
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: Deinterlace interface clock
- description: Deinterlace module clock
- description: Deinterlace DRAM clock
clock-names:
items:
- const: bus
- const: mod
- const: ram
resets:
maxItems: 1
interconnects:
maxItems: 1
interconnect-names:
const: dma-mem
required:
- compatible
- reg
- interrupts
- clocks
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/sun8i-h3-ccu.h>
#include <dt-bindings/reset/sun8i-h3-ccu.h>
deinterlace: deinterlace@1400000 {
compatible = "allwinner,sun8i-h3-deinterlace";
reg = <0x01400000 0x20000>;
clocks = <&ccu CLK_BUS_DEINTERLACE>,
<&ccu CLK_DEINTERLACE>,
<&ccu CLK_DRAM_DEINTERLACE>;
clock-names = "bus", "mod", "ram";
resets = <&ccu RST_BUS_DEINTERLACE>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
interconnects = <&mbus 9>;
interconnect-names = "dma-mem";
};
...

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@ -2,12 +2,20 @@
Required Properties:
- compatible: Must contain "adi,ad5820"
- compatible: Must contain one of:
- "adi,ad5820"
- "adi,ad5821"
- "adi,ad5823"
- reg: I2C slave address
- VANA-supply: supply of voltage for VANA pin
Optional properties:
- enable-gpios : GPIO spec for the XSHUTDOWN pin. The XSHUTDOWN signal is
active low, a high level on the pin enables the device.
Example:
ad5820: coil@c {
@ -15,5 +23,6 @@ Example:
reg = <0x0c>;
VANA-supply = <&vaux4>;
enable-gpios = <&msmgpio 26 GPIO_ACTIVE_HIGH>;
};

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@ -0,0 +1,57 @@
* Sony IMX290 1/2.8-Inch CMOS Image Sensor
The Sony IMX290 is a 1/2.8-Inch CMOS Solid-state image sensor with
Square Pixel for Color Cameras. It is programmable through I2C and 4-wire
interfaces. The sensor output is available via CMOS logic parallel SDR output,
Low voltage LVDS DDR output and CSI-2 serial data output. The CSI-2 bus is the
default. No bindings have been defined for the other busses.
Required Properties:
- compatible: Should be "sony,imx290"
- reg: I2C bus address of the device
- clocks: Reference to the xclk clock.
- clock-names: Should be "xclk".
- clock-frequency: Frequency of the xclk clock in Hz.
- vdddo-supply: Sensor digital IO regulator.
- vdda-supply: Sensor analog regulator.
- vddd-supply: Sensor digital core regulator.
Optional Properties:
- reset-gpios: Sensor reset GPIO
The imx290 device node should contain one 'port' child node with
an 'endpoint' subnode. For further reading on port node refer to
Documentation/devicetree/bindings/media/video-interfaces.txt.
Required Properties on endpoint:
- data-lanes: check ../video-interfaces.txt
- link-frequencies: check ../video-interfaces.txt
- remote-endpoint: check ../video-interfaces.txt
Example:
&i2c1 {
...
imx290: camera-sensor@1a {
compatible = "sony,imx290";
reg = <0x1a>;
reset-gpios = <&msmgpio 35 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&camera_rear_default>;
clocks = <&gcc GCC_CAMSS_MCLK0_CLK>;
clock-names = "xclk";
clock-frequency = <37125000>;
vdddo-supply = <&camera_vdddo_1v8>;
vdda-supply = <&camera_vdda_2v8>;
vddd-supply = <&camera_vddd_1v5>;
port {
imx290_ep: endpoint {
data-lanes = <1 2 3 4>;
link-frequencies = /bits/ 64 <445500000>;
remote-endpoint = <&csiphy0_ep>;
};
};
};

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@ -27,8 +27,6 @@ Mandatory properties
Optional properties
-------------------
- nokia,nvm-size: The size of the NVM, in bytes. If the size is not given,
the NVM contents will not be read.
- reset-gpios: XSHUTDOWN GPIO
- flash-leds: See ../video-interfaces.txt
- lens-focus: See ../video-interfaces.txt

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@ -12,6 +12,12 @@ Required Properties:
- clock-names: should be "xvclk".
- link-frequencies: target pixel clock frequency.
Optional Properties:
- powerdown-gpios: reference to the GPIO connected to the pwdn pin, if any.
Active high with internal pull down resistor.
- reset-gpios: reference to the GPIO connected to the resetb pin, if any.
Active low with internal pull up resistor.
For further reading on port node refer to
Documentation/devicetree/bindings/media/video-interfaces.txt.
@ -27,6 +33,9 @@ Example:
clocks = <&clk_ov2659 0>;
clock-names = "xvclk";
powerdown-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
port {
ov2659_0: endpoint {
remote-endpoint = <&vpfe_ep>;

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@ -39,6 +39,7 @@ properties:
- rc-avermedia-rm-ks
- rc-avertv-303
- rc-azurewave-ad-tu700
- rc-beelink-gs1
- rc-behold
- rc-behold-columbus
- rc-budget-ci-old

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@ -9,6 +9,7 @@ Mandatory properties
--------------------
- compatible: Must be one or more of the following
- "renesas,r8a774a1-csi2" for the R8A774A1 device.
- "renesas,r8a774b1-csi2" for the R8A774B1 device.
- "renesas,r8a774c0-csi2" for the R8A774C0 device.
- "renesas,r8a7795-csi2" for the R8A7795 device.
- "renesas,r8a7796-csi2" for the R8A7796 device.

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@ -14,6 +14,7 @@ on Gen3 and RZ/G2 platforms to a CSI-2 receiver.
- "renesas,vin-r8a7744" for the R8A7744 device
- "renesas,vin-r8a7745" for the R8A7745 device
- "renesas,vin-r8a774a1" for the R8A774A1 device
- "renesas,vin-r8a774b1" for the R8A774B1 device
- "renesas,vin-r8a774c0" for the R8A774C0 device
- "renesas,vin-r8a7778" for the R8A7778 device
- "renesas,vin-r8a7779" for the R8A7779 device
@ -43,7 +44,7 @@ on Gen3 and RZ/G2 platforms to a CSI-2 receiver.
Additionally, an alias named vinX will need to be created to specify
which video input device this is.
The per-board settings Gen2 platforms:
The per-board settings for Gen2 and RZ/G1 platforms:
- port - sub-node describing a single endpoint connected to the VIN
from external SoC pins as described in video-interfaces.txt[1].
@ -63,7 +64,7 @@ The per-board settings Gen2 platforms:
- data-enable-active: polarity of CLKENB signal, see [1] for
description. Default is active high.
The per-board settings Gen3 and RZ/G2 platforms:
The per-board settings for Gen3 and RZ/G2 platforms:
Gen3 and RZ/G2 platforms can support both a single connected parallel input
source from external SoC pins (port@0) and/or multiple parallel input sources

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@ -1,17 +0,0 @@
Bindings, specific for the sh_mobile_ceu_camera.c driver:
- compatible: Should be "renesas,sh-mobile-ceu"
- reg: register base and size
- interrupts: the interrupt number
- renesas,max-width: maximum image width, supported on this SoC
- renesas,max-height: maximum image height, supported on this SoC
Example:
ceu0: ceu@fe910000 {
compatible = "renesas,sh-mobile-ceu";
reg = <0xfe910000 0xa0>;
interrupt-parent = <&intcs>;
interrupts = <0x880>;
renesas,max-width = <8188>;
renesas,max-height = <8188>;
};

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@ -0,0 +1,64 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/ti,vpe.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments DRA7x Video Processing Engine (VPE) Device Tree Bindings
maintainers:
- Benoit Parrot <bparrot@ti.com>
description: |-
The Video Processing Engine (VPE) is a key component for image post
processing applications. VPE consist of a single memory to memory
path which can perform chroma up/down sampling, deinterlacing,
scaling and color space conversion.
properties:
compatible:
const: ti,dra7-vpe
reg:
items:
- description: The VPE main register region
- description: Scaler (SC) register region
- description: Color Space Conversion (CSC) register region
- description: Video Port Direct Memory Access (VPDMA) register region
reg-names:
items:
- const: vpe_top
- const: sc
- const: csc
- const: vpdma
interrupts:
maxItems: 1
required:
- compatible
- reg
- reg-names
- interrupts
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
vpe: vpe@489d0000 {
compatible = "ti,dra7-vpe";
reg = <0x489d0000 0x120>,
<0x489d0700 0x80>,
<0x489d5700 0x18>,
<0x489dd000 0x400>;
reg-names = "vpe_top",
"sc",
"csc",
"vpdma";
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
};
...

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@ -335,6 +335,95 @@ ignore define CEC_OP_MENU_STATE_DEACTIVATED
ignore define CEC_MSG_USER_CONTROL_PRESSED
ignore define CEC_OP_UI_CMD_SELECT
ignore define CEC_OP_UI_CMD_UP
ignore define CEC_OP_UI_CMD_DOWN
ignore define CEC_OP_UI_CMD_LEFT
ignore define CEC_OP_UI_CMD_RIGHT
ignore define CEC_OP_UI_CMD_RIGHT_UP
ignore define CEC_OP_UI_CMD_RIGHT_DOWN
ignore define CEC_OP_UI_CMD_LEFT_UP
ignore define CEC_OP_UI_CMD_LEFT_DOWN
ignore define CEC_OP_UI_CMD_DEVICE_ROOT_MENU
ignore define CEC_OP_UI_CMD_DEVICE_SETUP_MENU
ignore define CEC_OP_UI_CMD_CONTENTS_MENU
ignore define CEC_OP_UI_CMD_FAVORITE_MENU
ignore define CEC_OP_UI_CMD_BACK
ignore define CEC_OP_UI_CMD_MEDIA_TOP_MENU
ignore define CEC_OP_UI_CMD_MEDIA_CONTEXT_SENSITIVE_MENU
ignore define CEC_OP_UI_CMD_NUMBER_ENTRY_MODE
ignore define CEC_OP_UI_CMD_NUMBER_11
ignore define CEC_OP_UI_CMD_NUMBER_12
ignore define CEC_OP_UI_CMD_NUMBER_0_OR_NUMBER_10
ignore define CEC_OP_UI_CMD_NUMBER_1
ignore define CEC_OP_UI_CMD_NUMBER_2
ignore define CEC_OP_UI_CMD_NUMBER_3
ignore define CEC_OP_UI_CMD_NUMBER_4
ignore define CEC_OP_UI_CMD_NUMBER_5
ignore define CEC_OP_UI_CMD_NUMBER_6
ignore define CEC_OP_UI_CMD_NUMBER_7
ignore define CEC_OP_UI_CMD_NUMBER_8
ignore define CEC_OP_UI_CMD_NUMBER_9
ignore define CEC_OP_UI_CMD_DOT
ignore define CEC_OP_UI_CMD_ENTER
ignore define CEC_OP_UI_CMD_CLEAR
ignore define CEC_OP_UI_CMD_NEXT_FAVORITE
ignore define CEC_OP_UI_CMD_CHANNEL_UP
ignore define CEC_OP_UI_CMD_CHANNEL_DOWN
ignore define CEC_OP_UI_CMD_PREVIOUS_CHANNEL
ignore define CEC_OP_UI_CMD_SOUND_SELECT
ignore define CEC_OP_UI_CMD_INPUT_SELECT
ignore define CEC_OP_UI_CMD_DISPLAY_INFORMATION
ignore define CEC_OP_UI_CMD_HELP
ignore define CEC_OP_UI_CMD_PAGE_UP
ignore define CEC_OP_UI_CMD_PAGE_DOWN
ignore define CEC_OP_UI_CMD_POWER
ignore define CEC_OP_UI_CMD_VOLUME_UP
ignore define CEC_OP_UI_CMD_VOLUME_DOWN
ignore define CEC_OP_UI_CMD_MUTE
ignore define CEC_OP_UI_CMD_PLAY
ignore define CEC_OP_UI_CMD_STOP
ignore define CEC_OP_UI_CMD_PAUSE
ignore define CEC_OP_UI_CMD_RECORD
ignore define CEC_OP_UI_CMD_REWIND
ignore define CEC_OP_UI_CMD_FAST_FORWARD
ignore define CEC_OP_UI_CMD_EJECT
ignore define CEC_OP_UI_CMD_SKIP_FORWARD
ignore define CEC_OP_UI_CMD_SKIP_BACKWARD
ignore define CEC_OP_UI_CMD_STOP_RECORD
ignore define CEC_OP_UI_CMD_PAUSE_RECORD
ignore define CEC_OP_UI_CMD_ANGLE
ignore define CEC_OP_UI_CMD_SUB_PICTURE
ignore define CEC_OP_UI_CMD_VIDEO_ON_DEMAND
ignore define CEC_OP_UI_CMD_ELECTRONIC_PROGRAM_GUIDE
ignore define CEC_OP_UI_CMD_TIMER_PROGRAMMING
ignore define CEC_OP_UI_CMD_INITIAL_CONFIGURATION
ignore define CEC_OP_UI_CMD_SELECT_BROADCAST_TYPE
ignore define CEC_OP_UI_CMD_SELECT_SOUND_PRESENTATION
ignore define CEC_OP_UI_CMD_AUDIO_DESCRIPTION
ignore define CEC_OP_UI_CMD_INTERNET
ignore define CEC_OP_UI_CMD_3D_MODE
ignore define CEC_OP_UI_CMD_PLAY_FUNCTION
ignore define CEC_OP_UI_CMD_PAUSE_PLAY_FUNCTION
ignore define CEC_OP_UI_CMD_RECORD_FUNCTION
ignore define CEC_OP_UI_CMD_PAUSE_RECORD_FUNCTION
ignore define CEC_OP_UI_CMD_STOP_FUNCTION
ignore define CEC_OP_UI_CMD_MUTE_FUNCTION
ignore define CEC_OP_UI_CMD_RESTORE_VOLUME_FUNCTION
ignore define CEC_OP_UI_CMD_TUNE_FUNCTION
ignore define CEC_OP_UI_CMD_SELECT_MEDIA_FUNCTION
ignore define CEC_OP_UI_CMD_SELECT_AV_INPUT_FUNCTION
ignore define CEC_OP_UI_CMD_SELECT_AUDIO_INPUT_FUNCTION
ignore define CEC_OP_UI_CMD_POWER_TOGGLE_FUNCTION
ignore define CEC_OP_UI_CMD_POWER_OFF_FUNCTION
ignore define CEC_OP_UI_CMD_POWER_ON_FUNCTION
ignore define CEC_OP_UI_CMD_F1_BLUE
ignore define CEC_OP_UI_CMD_F2_RED
ignore define CEC_OP_UI_CMD_F3_GREEN
ignore define CEC_OP_UI_CMD_F4_YELLOW
ignore define CEC_OP_UI_CMD_F5
ignore define CEC_OP_UI_CMD_DATA
ignore define CEC_OP_UI_BCAST_TYPE_TOGGLE_ALL
ignore define CEC_OP_UI_BCAST_TYPE_TOGGLE_DIG_ANA
ignore define CEC_OP_UI_BCAST_TYPE_ANALOGUE

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@ -140,6 +140,15 @@ Menu controls with a driver specific menu are added by calling
const struct v4l2_ctrl_ops *ops, u32 id, s32 max,
s32 skip_mask, s32 def, const char * const *qmenu);
Standard compound controls can be added by calling
:c:func:`v4l2_ctrl_new_std_compound`:
.. code-block:: c
struct v4l2_ctrl *v4l2_ctrl_new_std_compound(struct v4l2_ctrl_handler *hdl,
const struct v4l2_ctrl_ops *ops, u32 id,
const union v4l2_ctrl_ptr p_def);
Integer menu controls with a driver specific menu can be added by calling
:c:func:`v4l2_ctrl_new_int_menu`:

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@ -24,6 +24,7 @@ Function Reference
cec-ioc-adap-g-caps
cec-ioc-adap-g-log-addrs
cec-ioc-adap-g-phys-addr
cec-ioc-adap-g-conn-info
cec-ioc-dqevent
cec-ioc-g-mode
cec-ioc-receive

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@ -135,8 +135,12 @@ returns the information to the application. The ioctl never fails.
- The CEC hardware can monitor CEC pin changes from low to high voltage
and vice versa. When in pin monitoring mode the application will
receive ``CEC_EVENT_PIN_CEC_LOW`` and ``CEC_EVENT_PIN_CEC_HIGH`` events.
* .. _`CEC-CAP-CONNECTOR-INFO`:
- ``CEC_CAP_CONNECTOR_INFO``
- 0x00000100
- If this capability is set, then :ref:`CEC_ADAP_G_CONNECTOR_INFO` can
be used.
Return Value
============

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@ -0,0 +1,105 @@
.. SPDX-License-Identifier: GPL-2.0
..
.. Copyright 2019 Google LLC
..
.. _CEC_ADAP_G_CONNECTOR_INFO:
*******************************
ioctl CEC_ADAP_G_CONNECTOR_INFO
*******************************
Name
====
CEC_ADAP_G_CONNECTOR_INFO - Query HDMI connector information
Synopsis
========
.. c:function:: int ioctl( int fd, CEC_ADAP_G_CONNECTOR_INFO, struct cec_connector_info *argp )
:name: CEC_ADAP_G_CONNECTOR_INFO
Arguments
=========
``fd``
File descriptor returned by :c:func:`open() <cec-open>`.
``argp``
Description
===========
Using this ioctl an application can learn which HDMI connector this CEC
device corresponds to. While calling this ioctl the application should
provide a pointer to a cec_connector_info struct which will be populated
by the kernel with the info provided by the adapter's driver. This ioctl
is only available if the ``CEC_CAP_CONNECTOR_INFO`` capability is set.
.. tabularcolumns:: |p{1.0cm}|p{4.4cm}|p{2.5cm}|p{9.6cm}|
.. c:type:: cec_connector_info
.. flat-table:: struct cec_connector_info
:header-rows: 0
:stub-columns: 0
:widths: 1 1 1 8
* - __u32
- ``type``
- The type of connector this adapter is associated with.
* - union
- ``(anonymous)``
-
* -
- ``struct cec_drm_connector_info``
- drm
- :ref:`cec-drm-connector-info`
.. tabularcolumns:: |p{4.4cm}|p{2.5cm}|p{10.6cm}|
.. _connector-type:
.. flat-table:: Connector types
:header-rows: 0
:stub-columns: 0
:widths: 3 1 8
* .. _`CEC-CONNECTOR-TYPE-NO-CONNECTOR`:
- ``CEC_CONNECTOR_TYPE_NO_CONNECTOR``
- 0
- No connector is associated with the adapter/the information is not
provided by the driver.
* .. _`CEC-CONNECTOR-TYPE-DRM`:
- ``CEC_CONNECTOR_TYPE_DRM``
- 1
- Indicates that a DRM connector is associated with this adapter.
Information about the connector can be found in
:ref:`cec-drm-connector-info`.
.. tabularcolumns:: |p{4.4cm}|p{2.5cm}|p{10.6cm}|
.. c:type:: cec_drm_connector_info
.. _cec-drm-connector-info:
.. flat-table:: struct cec_drm_connector_info
:header-rows: 0
:stub-columns: 0
:widths: 3 1 8
* .. _`CEC-DRM-CONNECTOR-TYPE-CARD-NO`:
- __u32
- ``card_no``
- DRM card number: the number from a card's path, e.g. 0 in case of
/dev/card0.
* .. _`CEC-DRM-CONNECTOR-TYPE-CONNECTOR_ID`:
- __u32
- ``connector_id``
- DRM connector ID.

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@ -70,6 +70,14 @@ it is guaranteed that the state did change in between the two events.
addresses are claimed or if ``phys_addr`` is ``CEC_PHYS_ADDR_INVALID``.
If bit 15 is set (``1 << CEC_LOG_ADDR_UNREGISTERED``) then this device
has the unregistered logical address. In that case all other bits are 0.
* - __u16
- ``have_conn_info``
- If non-zero, then HDMI connector information is available.
This field is only valid if ``CEC_CAP_CONNECTOR_INFO`` is set. If that
capability is set and ``have_conn_info`` is zero, then that indicates
that the HDMI connector device is not instantiated, either because
the HDMI driver is still configuring the device or because the HDMI
device was unbound.
.. c:type:: cec_event_lost_msgs

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@ -53,8 +53,8 @@ with different configurations in advance, knowing that the configuration will be
applied when needed to get the expected result. Configuration values at the time
of request completion are also available for reading.
Usage
=====
General Usage
-------------
The Request API extends the Media Controller API and cooperates with
subsystem-specific APIs to support request usage. At the Media Controller

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@ -131,6 +131,15 @@ ITU-T Rec. H.264 Specification (04/2017 Edition)
:author: International Telecommunication Union (http://www.itu.ch)
.. _hevc:
ITU H.265/HEVC
==============
:title: ITU-T Rec. H.265 | ISO/IEC 23008-2 "High Efficiency Video Coding"
:author: International Telecommunication Union (http://www.itu.ch), International Organisation for Standardisation (http://www.iso.ch)
.. _jfif:
JFIF

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@ -607,6 +607,19 @@ Buffer Flags
applications shall use this flag for output buffers if the data in
this buffer has not been created by the CPU but by some
DMA-capable unit, in which case caches have not been used.
* .. _`V4L2-BUF-FLAG-M2M-HOLD-CAPTURE-BUF`:
- ``V4L2_BUF_FLAG_M2M_HOLD_CAPTURE_BUF``
- 0x00000200
- Only valid if ``V4L2_BUF_CAP_SUPPORTS_M2M_HOLD_CAPTURE_BUF`` is
set. It is typically used with stateless decoders where multiple
output buffers each decode to a slice of the decoded frame.
Applications can set this flag when queueing the output buffer
to prevent the driver from dequeueing the capture buffer after
the output buffer has been decoded (i.e. the capture buffer is
'held'). If the timestamp of this output buffer differs from that
of the previous output buffer, then that indicates the start of a
new frame and the previously held capture buffer is dequeued.
* .. _`V4L2-BUF-FLAG-LAST`:
- ``V4L2_BUF_FLAG_LAST``

View File

@ -46,3 +46,4 @@ devices are given in the following sections.
:maxdepth: 1
dev-decoder
dev-stateless-decoder

View File

@ -0,0 +1,424 @@
.. SPDX-License-Identifier: GPL-2.0
.. _stateless_decoder:
**************************************************
Memory-to-memory Stateless Video Decoder Interface
**************************************************
A stateless decoder is a decoder that works without retaining any kind of state
between processed frames. This means that each frame is decoded independently
of any previous and future frames, and that the client is responsible for
maintaining the decoding state and providing it to the decoder with each
decoding request. This is in contrast to the stateful video decoder interface,
where the hardware and driver maintain the decoding state and all the client
has to do is to provide the raw encoded stream and dequeue decoded frames in
display order.
This section describes how user-space ("the client") is expected to communicate
with stateless decoders in order to successfully decode an encoded stream.
Compared to stateful codecs, the decoder/client sequence is simpler, but the
cost of this simplicity is extra complexity in the client which is responsible
for maintaining a consistent decoding state.
Stateless decoders make use of the :ref:`media-request-api`. A stateless
decoder must expose the ``V4L2_BUF_CAP_SUPPORTS_REQUESTS`` capability on its
``OUTPUT`` queue when :c:func:`VIDIOC_REQBUFS` or :c:func:`VIDIOC_CREATE_BUFS`
are invoked.
Depending on the encoded formats supported by the decoder, a single decoded
frame may be the result of several decode requests (for instance, H.264 streams
with multiple slices per frame). Decoders that support such formats must also
expose the ``V4L2_BUF_CAP_SUPPORTS_M2M_HOLD_CAPTURE_BUF`` capability on their
``OUTPUT`` queue.
Querying capabilities
=====================
1. To enumerate the set of coded formats supported by the decoder, the client
calls :c:func:`VIDIOC_ENUM_FMT` on the ``OUTPUT`` queue.
* The driver must always return the full set of supported ``OUTPUT`` formats,
irrespective of the format currently set on the ``CAPTURE`` queue.
* Simultaneously, the driver must restrain the set of values returned by
codec-specific capability controls (such as H.264 profiles) to the set
actually supported by the hardware.
2. To enumerate the set of supported raw formats, the client calls
:c:func:`VIDIOC_ENUM_FMT` on the ``CAPTURE`` queue.
* The driver must return only the formats supported for the format currently
active on the ``OUTPUT`` queue.
* Depending on the currently set ``OUTPUT`` format, the set of supported raw
formats may depend on the value of some codec-dependent controls.
The client is responsible for making sure that these controls are set
before querying the ``CAPTURE`` queue. Failure to do so will result in the
default values for these controls being used, and a returned set of formats
that may not be usable for the media the client is trying to decode.
3. The client may use :c:func:`VIDIOC_ENUM_FRAMESIZES` to detect supported
resolutions for a given format, passing desired pixel format in
:c:type:`v4l2_frmsizeenum`'s ``pixel_format``.
4. Supported profiles and levels for the current ``OUTPUT`` format, if
applicable, may be queried using their respective controls via
:c:func:`VIDIOC_QUERYCTRL`.
Initialization
==============
1. Set the coded format on the ``OUTPUT`` queue via :c:func:`VIDIOC_S_FMT`.
* **Required fields:**
``type``
a ``V4L2_BUF_TYPE_*`` enum appropriate for ``OUTPUT``.
``pixelformat``
a coded pixel format.
``width``, ``height``
coded width and height parsed from the stream.
other fields
follow standard semantics.
.. note::
Changing the ``OUTPUT`` format may change the currently set ``CAPTURE``
format. The driver will derive a new ``CAPTURE`` format from the
``OUTPUT`` format being set, including resolution, colorimetry
parameters, etc. If the client needs a specific ``CAPTURE`` format,
it must adjust it afterwards.
2. Call :c:func:`VIDIOC_S_EXT_CTRLS` to set all the controls (parsed headers,
etc.) required by the ``OUTPUT`` format to enumerate the ``CAPTURE`` formats.
3. Call :c:func:`VIDIOC_G_FMT` for ``CAPTURE`` queue to get the format for the
destination buffers parsed/decoded from the bytestream.
* **Required fields:**
``type``
a ``V4L2_BUF_TYPE_*`` enum appropriate for ``CAPTURE``.
* **Returned fields:**
``width``, ``height``
frame buffer resolution for the decoded frames.
``pixelformat``
pixel format for decoded frames.
``num_planes`` (for _MPLANE ``type`` only)
number of planes for pixelformat.
``sizeimage``, ``bytesperline``
as per standard semantics; matching frame buffer format.
.. note::
The value of ``pixelformat`` may be any pixel format supported for the
``OUTPUT`` format, based on the hardware capabilities. It is suggested
that the driver chooses the preferred/optimal format for the current
configuration. For example, a YUV format may be preferred over an RGB
format, if an additional conversion step would be required for RGB.
4. *[optional]* Enumerate ``CAPTURE`` formats via :c:func:`VIDIOC_ENUM_FMT` on
the ``CAPTURE`` queue. The client may use this ioctl to discover which
alternative raw formats are supported for the current ``OUTPUT`` format and
select one of them via :c:func:`VIDIOC_S_FMT`.
.. note::
The driver will return only formats supported for the currently selected
``OUTPUT`` format and currently set controls, even if more formats may be
supported by the decoder in general.
For example, a decoder may support YUV and RGB formats for
resolutions 1920x1088 and lower, but only YUV for higher resolutions (due
to hardware limitations). After setting a resolution of 1920x1088 or lower
as the ``OUTPUT`` format, :c:func:`VIDIOC_ENUM_FMT` may return a set of
YUV and RGB pixel formats, but after setting a resolution higher than
1920x1088, the driver will not return RGB pixel formats, since they are
unsupported for this resolution.
5. *[optional]* Choose a different ``CAPTURE`` format than suggested via
:c:func:`VIDIOC_S_FMT` on ``CAPTURE`` queue. It is possible for the client to
choose a different format than selected/suggested by the driver in
:c:func:`VIDIOC_G_FMT`.
* **Required fields:**
``type``
a ``V4L2_BUF_TYPE_*`` enum appropriate for ``CAPTURE``.
``pixelformat``
a raw pixel format.
``width``, ``height``
frame buffer resolution of the decoded stream; typically unchanged from
what was returned with :c:func:`VIDIOC_G_FMT`, but it may be different
if the hardware supports composition and/or scaling.
After performing this step, the client must perform step 3 again in order
to obtain up-to-date information about the buffers size and layout.
6. Allocate source (bytestream) buffers via :c:func:`VIDIOC_REQBUFS` on
``OUTPUT`` queue.
* **Required fields:**
``count``
requested number of buffers to allocate; greater than zero.
``type``
a ``V4L2_BUF_TYPE_*`` enum appropriate for ``OUTPUT``.
``memory``
follows standard semantics.
* **Return fields:**
``count``
actual number of buffers allocated.
* If required, the driver will adjust ``count`` to be equal or bigger to the
minimum of required number of ``OUTPUT`` buffers for the given format and
requested count. The client must check this value after the ioctl returns
to get the actual number of buffers allocated.
7. Allocate destination (raw format) buffers via :c:func:`VIDIOC_REQBUFS` on the
``CAPTURE`` queue.
* **Required fields:**
``count``
requested number of buffers to allocate; greater than zero. The client
is responsible for deducing the minimum number of buffers required
for the stream to be properly decoded (taking e.g. reference frames
into account) and pass an equal or bigger number.
``type``
a ``V4L2_BUF_TYPE_*`` enum appropriate for ``CAPTURE``.
``memory``
follows standard semantics. ``V4L2_MEMORY_USERPTR`` is not supported
for ``CAPTURE`` buffers.
* **Return fields:**
``count``
adjusted to allocated number of buffers, in case the codec requires
more buffers than requested.
* The driver must adjust count to the minimum of required number of
``CAPTURE`` buffers for the current format, stream configuration and
requested count. The client must check this value after the ioctl
returns to get the number of buffers allocated.
8. Allocate requests (likely one per ``OUTPUT`` buffer) via
:c:func:`MEDIA_IOC_REQUEST_ALLOC` on the media device.
9. Start streaming on both ``OUTPUT`` and ``CAPTURE`` queues via
:c:func:`VIDIOC_STREAMON`.
Decoding
========
For each frame, the client is responsible for submitting at least one request to
which the following is attached:
* The amount of encoded data expected by the codec for its current
configuration, as a buffer submitted to the ``OUTPUT`` queue. Typically, this
corresponds to one frame worth of encoded data, but some formats may allow (or
require) different amounts per unit.
* All the metadata needed to decode the submitted encoded data, in the form of
controls relevant to the format being decoded.
The amount of data and contents of the source ``OUTPUT`` buffer, as well as the
controls that must be set on the request, depend on the active coded pixel
format and might be affected by codec-specific extended controls, as stated in
documentation of each format.
If there is a possibility that the decoded frame will require one or more
decode requests after the current one in order to be produced, then the client
must set the ``V4L2_BUF_FLAG_M2M_HOLD_CAPTURE_BUF`` flag on the ``OUTPUT``
buffer. This will result in the (potentially partially) decoded ``CAPTURE``
buffer not being made available for dequeueing, and reused for the next decode
request if the timestamp of the next ``OUTPUT`` buffer has not changed.
A typical frame would thus be decoded using the following sequence:
1. Queue an ``OUTPUT`` buffer containing one unit of encoded bytestream data for
the decoding request, using :c:func:`VIDIOC_QBUF`.
* **Required fields:**
``index``
index of the buffer being queued.
``type``
type of the buffer.
``bytesused``
number of bytes taken by the encoded data frame in the buffer.
``flags``
the ``V4L2_BUF_FLAG_REQUEST_FD`` flag must be set. Additionally, if
we are not sure that the current decode request is the last one needed
to produce a fully decoded frame, then
``V4L2_BUF_FLAG_M2M_HOLD_CAPTURE_BUF`` must also be set.
``request_fd``
must be set to the file descriptor of the decoding request.
``timestamp``
must be set to a unique value per frame. This value will be propagated
into the decoded frame's buffer and can also be used to use this frame
as the reference of another. If using multiple decode requests per
frame, then the timestamps of all the ``OUTPUT`` buffers for a given
frame must be identical. If the timestamp changes, then the currently
held ``CAPTURE`` buffer will be made available for dequeuing and the
current request will work on a new ``CAPTURE`` buffer.
2. Set the codec-specific controls for the decoding request, using
:c:func:`VIDIOC_S_EXT_CTRLS`.
* **Required fields:**
``which``
must be ``V4L2_CTRL_WHICH_REQUEST_VAL``.
``request_fd``
must be set to the file descriptor of the decoding request.
other fields
other fields are set as usual when setting controls. The ``controls``
array must contain all the codec-specific controls required to decode
a frame.
.. note::
It is possible to specify the controls in different invocations of
:c:func:`VIDIOC_S_EXT_CTRLS`, or to overwrite a previously set control, as
long as ``request_fd`` and ``which`` are properly set. The controls state
at the moment of request submission is the one that will be considered.
.. note::
The order in which steps 1 and 2 take place is interchangeable.
3. Submit the request by invoking :c:func:`MEDIA_REQUEST_IOC_QUEUE` on the
request FD.
If the request is submitted without an ``OUTPUT`` buffer, or if some of the
required controls are missing from the request, then
:c:func:`MEDIA_REQUEST_IOC_QUEUE` will return ``-ENOENT``. If more than one
``OUTPUT`` buffer is queued, then it will return ``-EINVAL``.
:c:func:`MEDIA_REQUEST_IOC_QUEUE` returning non-zero means that no
``CAPTURE`` buffer will be produced for this request.
``CAPTURE`` buffers must not be part of the request, and are queued
independently. They are returned in decode order (i.e. the same order as coded
frames were submitted to the ``OUTPUT`` queue).
Runtime decoding errors are signaled by the dequeued ``CAPTURE`` buffers
carrying the ``V4L2_BUF_FLAG_ERROR`` flag. If a decoded reference frame has an
error, then all following decoded frames that refer to it also have the
``V4L2_BUF_FLAG_ERROR`` flag set, although the decoder will still try to
produce (likely corrupted) frames.
Buffer management while decoding
================================
Contrary to stateful decoders, a stateless decoder does not perform any kind of
buffer management: it only guarantees that dequeued ``CAPTURE`` buffers can be
used by the client for as long as they are not queued again. "Used" here
encompasses using the buffer for compositing or display.
A dequeued capture buffer can also be used as the reference frame of another
buffer.
A frame is specified as reference by converting its timestamp into nanoseconds,
and storing it into the relevant member of a codec-dependent control structure.
The :c:func:`v4l2_timeval_to_ns` function must be used to perform that
conversion. The timestamp of a frame can be used to reference it as soon as all
its units of encoded data are successfully submitted to the ``OUTPUT`` queue.
A decoded buffer containing a reference frame must not be reused as a decoding
target until all the frames referencing it have been decoded. The safest way to
achieve this is to refrain from queueing a reference buffer until all the
decoded frames referencing it have been dequeued. However, if the driver can
guarantee that buffers queued to the ``CAPTURE`` queue are processed in queued
order, then user-space can take advantage of this guarantee and queue a
reference buffer when the following conditions are met:
1. All the requests for frames affected by the reference frame have been
queued, and
2. A sufficient number of ``CAPTURE`` buffers to cover all the decoded
referencing frames have been queued.
When queuing a decoding request, the driver will increase the reference count of
all the resources associated with reference frames. This means that the client
can e.g. close the DMABUF file descriptors of reference frame buffers if it
won't need them afterwards.
Seeking
=======
In order to seek, the client just needs to submit requests using input buffers
corresponding to the new stream position. It must however be aware that
resolution may have changed and follow the dynamic resolution change sequence in
that case. Also depending on the codec used, picture parameters (e.g. SPS/PPS
for H.264) may have changed and the client is responsible for making sure that a
valid state is sent to the decoder.
The client is then free to ignore any returned ``CAPTURE`` buffer that comes
from the pre-seek position.
Pausing
=======
In order to pause, the client can just cease queuing buffers onto the ``OUTPUT``
queue. Without source bytestream data, there is no data to process and the codec
will remain idle.
Dynamic resolution change
=========================
If the client detects a resolution change in the stream, it will need to perform
the initialization sequence again with the new resolution:
1. If the last submitted request resulted in a ``CAPTURE`` buffer being
held by the use of the ``V4L2_BUF_FLAG_M2M_HOLD_CAPTURE_BUF`` flag, then the
last frame is not available on the ``CAPTURE`` queue. In this case, a
``V4L2_DEC_CMD_FLUSH`` command shall be sent. This will make the driver
dequeue the held ``CAPTURE`` buffer.
2. Wait until all submitted requests have completed and dequeue the
corresponding output buffers.
3. Call :c:func:`VIDIOC_STREAMOFF` on both the ``OUTPUT`` and ``CAPTURE``
queues.
4. Free all ``CAPTURE`` buffers by calling :c:func:`VIDIOC_REQBUFS` on the
``CAPTURE`` queue with a buffer count of zero.
5. Perform the initialization sequence again (minus the allocation of
``OUTPUT`` buffers), with the new resolution set on the ``OUTPUT`` queue.
Note that due to resolution constraints, a different format may need to be
picked on the ``CAPTURE`` queue.
Drain
=====
If the last submitted request resulted in a ``CAPTURE`` buffer being
held by the use of the ``V4L2_BUF_FLAG_M2M_HOLD_CAPTURE_BUF`` flag, then the
last frame is not available on the ``CAPTURE`` queue. In this case, a
``V4L2_DEC_CMD_FLUSH`` command shall be sent. This will make the driver
dequeue the held ``CAPTURE`` buffer.
After that, in order to drain the stream on a stateless decoder, the client
just needs to wait until all the submitted requests are completed.

View File

@ -1713,10 +1713,14 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type -
* - __u8
- ``scaling_list_4x4[6][16]``
-
- Scaling matrix after applying the inverse scanning process.
Expected list order is Intra Y, Intra Cb, Intra Cr, Inter Y,
Inter Cb, Inter Cr.
* - __u8
- ``scaling_list_8x8[6][64]``
-
- Scaling matrix after applying the inverse scanning process.
Expected list order is Intra Y, Inter Y, Intra Cb, Inter Cb,
Intra Cr, Inter Cr.
``V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS (struct)``
Specifies the slice parameters (as extracted from the bitstream)
@ -1796,7 +1800,7 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type -
-
* - __u32
- ``dec_ref_pic_marking_bit_size``
-
- Size in bits of the dec_ref_pic_marking() syntax element.
* - __u32
- ``pic_order_cnt_bit_size``
-
@ -1820,10 +1824,12 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type -
-
* - __u8
- ``num_ref_idx_l0_active_minus1``
-
- If num_ref_idx_active_override_flag is not set, this field must be
set to the value of num_ref_idx_l0_default_active_minus1.
* - __u8
- ``num_ref_idx_l1_active_minus1``
-
- If num_ref_idx_active_override_flag is not set, this field must be
set to the value of num_ref_idx_l1_default_active_minus1.
* - __u32
- ``slice_group_change_cycle``
-
@ -3693,3 +3699,550 @@ enum v4l2_mpeg_video_hevc_size_of_length_field -
Indicates whether to generate SPS and PPS at every IDR. Setting it to 0
disables generating SPS and PPS at every IDR. Setting it to one enables
generating SPS and PPS at every IDR.
.. _v4l2-mpeg-hevc:
``V4L2_CID_MPEG_VIDEO_HEVC_SPS (struct)``
Specifies the Sequence Parameter Set fields (as extracted from the
bitstream) for the associated HEVC slice data.
These bitstream parameters are defined according to :ref:`hevc`.
They are described in section 7.4.3.2 "Sequence parameter set RBSP
semantics" of the specification.
.. c:type:: v4l2_ctrl_hevc_sps
.. cssclass:: longtable
.. flat-table:: struct v4l2_ctrl_hevc_sps
:header-rows: 0
:stub-columns: 0
:widths: 1 1 2
* - __u16
- ``pic_width_in_luma_samples``
-
* - __u16
- ``pic_height_in_luma_samples``
-
* - __u8
- ``bit_depth_luma_minus8``
-
* - __u8
- ``bit_depth_chroma_minus8``
-
* - __u8
- ``log2_max_pic_order_cnt_lsb_minus4``
-
* - __u8
- ``sps_max_dec_pic_buffering_minus1``
-
* - __u8
- ``sps_max_num_reorder_pics``
-
* - __u8
- ``sps_max_latency_increase_plus1``
-
* - __u8
- ``log2_min_luma_coding_block_size_minus3``
-
* - __u8
- ``log2_diff_max_min_luma_coding_block_size``
-
* - __u8
- ``log2_min_luma_transform_block_size_minus2``
-
* - __u8
- ``log2_diff_max_min_luma_transform_block_size``
-
* - __u8
- ``max_transform_hierarchy_depth_inter``
-
* - __u8
- ``max_transform_hierarchy_depth_intra``
-
* - __u8
- ``pcm_sample_bit_depth_luma_minus1``
-
* - __u8
- ``pcm_sample_bit_depth_chroma_minus1``
-
* - __u8
- ``log2_min_pcm_luma_coding_block_size_minus3``
-
* - __u8
- ``log2_diff_max_min_pcm_luma_coding_block_size``
-
* - __u8
- ``num_short_term_ref_pic_sets``
-
* - __u8
- ``num_long_term_ref_pics_sps``
-
* - __u8
- ``chroma_format_idc``
-
* - __u64
- ``flags``
- See :ref:`Sequence Parameter Set Flags <hevc_sps_flags>`
.. _hevc_sps_flags:
``Sequence Parameter Set Flags``
.. cssclass:: longtable
.. flat-table::
:header-rows: 0
:stub-columns: 0
:widths: 1 1 2
* - ``V4L2_HEVC_SPS_FLAG_SEPARATE_COLOUR_PLANE``
- 0x00000001
-
* - ``V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED``
- 0x00000002
-
* - ``V4L2_HEVC_SPS_FLAG_AMP_ENABLED``
- 0x00000004
-
* - ``V4L2_HEVC_SPS_FLAG_SAMPLE_ADAPTIVE_OFFSET``
- 0x00000008
-
* - ``V4L2_HEVC_SPS_FLAG_PCM_ENABLED``
- 0x00000010
-
* - ``V4L2_HEVC_SPS_FLAG_PCM_LOOP_FILTER_DISABLED``
- 0x00000020
-
* - ``V4L2_HEVC_SPS_FLAG_LONG_TERM_REF_PICS_PRESENT``
- 0x00000040
-
* - ``V4L2_HEVC_SPS_FLAG_SPS_TEMPORAL_MVP_ENABLED``
- 0x00000080
-
* - ``V4L2_HEVC_SPS_FLAG_STRONG_INTRA_SMOOTHING_ENABLED``
- 0x00000100
-
``V4L2_CID_MPEG_VIDEO_HEVC_PPS (struct)``
Specifies the Picture Parameter Set fields (as extracted from the
bitstream) for the associated HEVC slice data.
These bitstream parameters are defined according to :ref:`hevc`.
They are described in section 7.4.3.3 "Picture parameter set RBSP
semantics" of the specification.
.. c:type:: v4l2_ctrl_hevc_pps
.. cssclass:: longtable
.. flat-table:: struct v4l2_ctrl_hevc_pps
:header-rows: 0
:stub-columns: 0
:widths: 1 1 2
* - __u8
- ``num_extra_slice_header_bits``
-
* - __s8
- ``init_qp_minus26``
-
* - __u8
- ``diff_cu_qp_delta_depth``
-
* - __s8
- ``pps_cb_qp_offset``
-
* - __s8
- ``pps_cr_qp_offset``
-
* - __u8
- ``num_tile_columns_minus1``
-
* - __u8
- ``num_tile_rows_minus1``
-
* - __u8
- ``column_width_minus1[20]``
-
* - __u8
- ``row_height_minus1[22]``
-
* - __s8
- ``pps_beta_offset_div2``
-
* - __s8
- ``pps_tc_offset_div2``
-
* - __u8
- ``log2_parallel_merge_level_minus2``
-
* - __u8
- ``padding[4]``
- Applications and drivers must set this to zero.
* - __u64
- ``flags``
- See :ref:`Picture Parameter Set Flags <hevc_pps_flags>`
.. _hevc_pps_flags:
``Picture Parameter Set Flags``
.. cssclass:: longtable
.. flat-table::
:header-rows: 0
:stub-columns: 0
:widths: 1 1 2
* - ``V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT``
- 0x00000001
-
* - ``V4L2_HEVC_PPS_FLAG_OUTPUT_FLAG_PRESENT``
- 0x00000002
-
* - ``V4L2_HEVC_PPS_FLAG_SIGN_DATA_HIDING_ENABLED``
- 0x00000004
-
* - ``V4L2_HEVC_PPS_FLAG_CABAC_INIT_PRESENT``
- 0x00000008
-
* - ``V4L2_HEVC_PPS_FLAG_CONSTRAINED_INTRA_PRED``
- 0x00000010
-
* - ``V4L2_HEVC_PPS_FLAG_TRANSFORM_SKIP_ENABLED``
- 0x00000020
-
* - ``V4L2_HEVC_PPS_FLAG_CU_QP_DELTA_ENABLED``
- 0x00000040
-
* - ``V4L2_HEVC_PPS_FLAG_PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT``
- 0x00000080
-
* - ``V4L2_HEVC_PPS_FLAG_WEIGHTED_PRED``
- 0x00000100
-
* - ``V4L2_HEVC_PPS_FLAG_WEIGHTED_BIPRED``
- 0x00000200
-
* - ``V4L2_HEVC_PPS_FLAG_TRANSQUANT_BYPASS_ENABLED``
- 0x00000400
-
* - ``V4L2_HEVC_PPS_FLAG_TILES_ENABLED``
- 0x00000800
-
* - ``V4L2_HEVC_PPS_FLAG_ENTROPY_CODING_SYNC_ENABLED``
- 0x00001000
-
* - ``V4L2_HEVC_PPS_FLAG_LOOP_FILTER_ACROSS_TILES_ENABLED``
- 0x00002000
-
* - ``V4L2_HEVC_PPS_FLAG_PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED``
- 0x00004000
-
* - ``V4L2_HEVC_PPS_FLAG_DEBLOCKING_FILTER_OVERRIDE_ENABLED``
- 0x00008000
-
* - ``V4L2_HEVC_PPS_FLAG_PPS_DISABLE_DEBLOCKING_FILTER``
- 0x00010000
-
* - ``V4L2_HEVC_PPS_FLAG_LISTS_MODIFICATION_PRESENT``
- 0x00020000
-
* - ``V4L2_HEVC_PPS_FLAG_SLICE_SEGMENT_HEADER_EXTENSION_PRESENT``
- 0x00040000
-
``V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS (struct)``
Specifies various slice-specific parameters, especially from the NAL unit
header, general slice segment header and weighted prediction parameter
parts of the bitstream.
These bitstream parameters are defined according to :ref:`hevc`.
They are described in section 7.4.7 "General slice segment header
semantics" of the specification.
.. c:type:: v4l2_ctrl_hevc_slice_params
.. cssclass:: longtable
.. flat-table:: struct v4l2_ctrl_hevc_slice_params
:header-rows: 0
:stub-columns: 0
:widths: 1 1 2
* - __u32
- ``bit_size``
- Size (in bits) of the current slice data.
* - __u32
- ``data_bit_offset``
- Offset (in bits) to the video data in the current slice data.
* - __u8
- ``nal_unit_type``
-
* - __u8
- ``nuh_temporal_id_plus1``
-
* - __u8
- ``slice_type``
-
(V4L2_HEVC_SLICE_TYPE_I, V4L2_HEVC_SLICE_TYPE_P or
V4L2_HEVC_SLICE_TYPE_B).
* - __u8
- ``colour_plane_id``
-
* - __u16
- ``slice_pic_order_cnt``
-
* - __u8
- ``num_ref_idx_l0_active_minus1``
-
* - __u8
- ``num_ref_idx_l1_active_minus1``
-
* - __u8
- ``collocated_ref_idx``
-
* - __u8
- ``five_minus_max_num_merge_cand``
-
* - __s8
- ``slice_qp_delta``
-
* - __s8
- ``slice_cb_qp_offset``
-
* - __s8
- ``slice_cr_qp_offset``
-
* - __s8
- ``slice_act_y_qp_offset``
-
* - __s8
- ``slice_act_cb_qp_offset``
-
* - __s8
- ``slice_act_cr_qp_offset``
-
* - __s8
- ``slice_beta_offset_div2``
-
* - __s8
- ``slice_tc_offset_div2``
-
* - __u8
- ``pic_struct``
-
* - __u8
- ``num_active_dpb_entries``
- The number of entries in ``dpb``.
* - __u8
- ``ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
- The list of L0 reference elements as indices in the DPB.
* - __u8
- ``ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
- The list of L1 reference elements as indices in the DPB.
* - __u8
- ``num_rps_poc_st_curr_before``
- The number of reference pictures in the short-term set that come before
the current frame.
* - __u8
- ``num_rps_poc_st_curr_after``
- The number of reference pictures in the short-term set that come after
the current frame.
* - __u8
- ``num_rps_poc_lt_curr``
- The number of reference pictures in the long-term set.
* - __u8
- ``padding[7]``
- Applications and drivers must set this to zero.
* - struct :c:type:`v4l2_hevc_dpb_entry`
- ``dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
- The decoded picture buffer, for meta-data about reference frames.
* - struct :c:type:`v4l2_hevc_pred_weight_table`
- ``pred_weight_table``
- The prediction weight coefficients for inter-picture prediction.
* - __u64
- ``flags``
- See :ref:`Slice Parameters Flags <hevc_slice_params_flags>`
.. _hevc_slice_params_flags:
``Slice Parameters Flags``
.. cssclass:: longtable
.. flat-table::
:header-rows: 0
:stub-columns: 0
:widths: 1 1 2
* - ``V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_SAO_LUMA``
- 0x00000001
-
* - ``V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_SAO_CHROMA``
- 0x00000002
-
* - ``V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_TEMPORAL_MVP_ENABLED``
- 0x00000004
-
* - ``V4L2_HEVC_SLICE_PARAMS_FLAG_MVD_L1_ZERO``
- 0x00000008
-
* - ``V4L2_HEVC_SLICE_PARAMS_FLAG_CABAC_INIT``
- 0x00000010
-
* - ``V4L2_HEVC_SLICE_PARAMS_FLAG_COLLOCATED_FROM_L0``
- 0x00000020
-
* - ``V4L2_HEVC_SLICE_PARAMS_FLAG_USE_INTEGER_MV``
- 0x00000040
-
* - ``V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_DEBLOCKING_FILTER_DISABLED``
- 0x00000080
-
* - ``V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_LOOP_FILTER_ACROSS_SLICES_ENABLED``
- 0x00000100
-
.. c:type:: v4l2_hevc_dpb_entry
.. cssclass:: longtable
.. flat-table:: struct v4l2_hevc_dpb_entry
:header-rows: 0
:stub-columns: 0
:widths: 1 1 2
* - __u64
- ``timestamp``
- Timestamp of the V4L2 capture buffer to use as reference, used
with B-coded and P-coded frames. The timestamp refers to the
``timestamp`` field in struct :c:type:`v4l2_buffer`. Use the
:c:func:`v4l2_timeval_to_ns()` function to convert the struct
:c:type:`timeval` in struct :c:type:`v4l2_buffer` to a __u64.
* - __u8
- ``rps``
- The reference set for the reference frame
(V4L2_HEVC_DPB_ENTRY_RPS_ST_CURR_BEFORE,
V4L2_HEVC_DPB_ENTRY_RPS_ST_CURR_AFTER or
V4L2_HEVC_DPB_ENTRY_RPS_LT_CURR)
* - __u8
- ``field_pic``
- Whether the reference is a field picture or a frame.
* - __u16
- ``pic_order_cnt[2]``
- The picture order count of the reference. Only the first element of the
array is used for frame pictures, while the first element identifies the
top field and the second the bottom field in field-coded pictures.
* - __u8
- ``padding[2]``
- Applications and drivers must set this to zero.
.. c:type:: v4l2_hevc_pred_weight_table
.. cssclass:: longtable
.. flat-table:: struct v4l2_hevc_pred_weight_table
:header-rows: 0
:stub-columns: 0
:widths: 1 1 2
* - __u8
- ``luma_log2_weight_denom``
-
* - __s8
- ``delta_chroma_log2_weight_denom``
-
* - __s8
- ``delta_luma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
-
* - __s8
- ``luma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
-
* - __s8
- ``delta_chroma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2]``
-
* - __s8
- ``chroma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2]``
-
* - __s8
- ``delta_luma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
-
* - __s8
- ``luma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
-
* - __s8
- ``delta_chroma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2]``
-
* - __s8
- ``chroma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2]``
-
* - __u8
- ``padding[6]``
- Applications and drivers must set this to zero.
``V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE (enum)``
Specifies the decoding mode to use. Currently exposes slice-based and
frame-based decoding but new modes might be added later on.
This control is used as a modifier for V4L2_PIX_FMT_HEVC_SLICE
pixel format. Applications that support V4L2_PIX_FMT_HEVC_SLICE
are required to set this control in order to specify the decoding mode
that is expected for the buffer.
Drivers may expose a single or multiple decoding modes, depending
on what they can support.
.. note::
This menu control is not yet part of the public kernel API and
it is expected to change.
.. c:type:: v4l2_mpeg_video_hevc_decode_mode
.. cssclass:: longtable
.. flat-table::
:header-rows: 0
:stub-columns: 0
:widths: 1 1 2
* - ``V4L2_MPEG_VIDEO_HEVC_DECODE_MODE_SLICE_BASED``
- 0
- Decoding is done at the slice granularity.
The OUTPUT buffer must contain a single slice.
* - ``V4L2_MPEG_VIDEO_HEVC_DECODE_MODE_FRAME_BASED``
- 1
- Decoding is done at the frame granularity.
The OUTPUT buffer must contain all slices needed to decode the
frame. The OUTPUT buffer must also contain both fields.
``V4L2_CID_MPEG_VIDEO_HEVC_START_CODE (enum)``
Specifies the HEVC slice start code expected for each slice.
This control is used as a modifier for V4L2_PIX_FMT_HEVC_SLICE
pixel format. Applications that support V4L2_PIX_FMT_HEVC_SLICE
are required to set this control in order to specify the start code
that is expected for the buffer.
Drivers may expose a single or multiple start codes, depending
on what they can support.
.. note::
This menu control is not yet part of the public kernel API and
it is expected to change.
.. c:type:: v4l2_mpeg_video_hevc_start_code
.. cssclass:: longtable
.. flat-table::
:header-rows: 0
:stub-columns: 0
:widths: 1 1 2
* - ``V4L2_MPEG_VIDEO_HEVC_START_CODE_NONE``
- 0
- Selecting this value specifies that HEVC slices are passed
to the driver without any start code.
* - ``V4L2_MPEG_VIDEO_HEVC_START_CODE_ANNEX_B``
- 1
- Selecting this value specifies that HEVC slices are expected
to be prefixed by Annex B start codes. According to :ref:`hevc`
valid start codes can be 3-bytes 0x000001 or 4-bytes 0x00000001.

View File

@ -98,7 +98,7 @@ Flash Control IDs
V4L2_CID_FLASH_STROBE control.
* - ``V4L2_FLASH_STROBE_SOURCE_EXTERNAL``
- The flash strobe is triggered by an external source. Typically
this is a sensor, which makes it possible to synchronises the
this is a sensor, which makes it possible to synchronise the
flash strobe start to exposure start.

View File

@ -55,3 +55,13 @@ Image Source Control IDs
``V4L2_CID_TEST_PATTERN_GREENB (integer)``
Test pattern green (next to blue) colour component.
``V4L2_CID_UNIT_CELL_SIZE (struct)``
This control returns the unit cell size in nanometers. The struct
:c:type:`v4l2_area` provides the width and the height in separate
fields to take into consideration asymmetric pixels.
This control does not take into consideration any possible hardware
binning.
The unit cell consists of the whole area of the pixel, sensitive and
non-sensitive.
This control is required for automatic calibration of sensors/cameras.

View File

@ -24,3 +24,4 @@ These formats are used for the :ref:`metadata` interface only.
pixfmt-meta-uvc
pixfmt-meta-vsp1-hgo
pixfmt-meta-vsp1-hgt
pixfmt-meta-vivid

View File

@ -61,10 +61,10 @@ Compressed Formats
- ``V4L2_PIX_FMT_H264_SLICE``
- 'S264'
- H264 parsed slice data, without the start code and as
extracted from the H264 bitstream. This format is adapted for
stateless video decoders that implement an H264 pipeline
(using the :ref:`mem2mem` and :ref:`media-request-api`).
- H264 parsed slice data, including slice headers, either with or
without the start code, as extracted from the H264 bitstream.
This format is adapted for stateless video decoders that implement an
H264 pipeline (using the :ref:`mem2mem` and :ref:`media-request-api`).
This pixelformat has two modifiers that must be set at least once
through the ``V4L2_CID_MPEG_VIDEO_H264_DECODE_MODE``
and ``V4L2_CID_MPEG_VIDEO_H264_START_CODE`` controls.
@ -80,6 +80,10 @@ Compressed Formats
appropriate number of macroblocks to decode a full
corresponding frame to the matching capture buffer.
The syntax for this format is documented in :ref:`h264`, section
7.3.2.8 "Slice layer without partitioning RBSP syntax" and the following
sections.
.. note::
This format is not yet part of the public kernel API and it
@ -188,6 +192,29 @@ Compressed Formats
If :ref:`VIDIOC_ENUM_FMT` reports ``V4L2_FMT_FLAG_CONTINUOUS_BYTESTREAM``
then the decoder has no requirements since it can parse all the
information from the raw bytestream.
* .. _V4L2-PIX-FMT-HEVC-SLICE:
- ``V4L2_PIX_FMT_HEVC_SLICE``
- 'S265'
- HEVC parsed slice data, as extracted from the HEVC bitstream.
This format is adapted for stateless video decoders that implement a
HEVC pipeline (using the :ref:`mem2mem` and :ref:`media-request-api`).
This pixelformat has two modifiers that must be set at least once
through the ``V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE``
and ``V4L2_CID_MPEG_VIDEO_HEVC_START_CODE`` controls.
Metadata associated with the frame to decode is required to be passed
through the following controls :
* ``V4L2_CID_MPEG_VIDEO_HEVC_SPS``
* ``V4L2_CID_MPEG_VIDEO_HEVC_PPS``
* ``V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS``
See the :ref:`associated Codec Control IDs <v4l2-mpeg-hevc>`.
Buffers associated with this pixel format must contain the appropriate
number of macroblocks to decode a full corresponding frame.
.. note::
This format is not yet part of the public kernel API and it
is expected to change.
* .. _V4L2-PIX-FMT-FWHT:
- ``V4L2_PIX_FMT_FWHT``

View File

@ -0,0 +1,60 @@
.. This file is dual-licensed: you can use it either under the terms
.. of the GPL 2.0 or the GFDL 1.1+ license, at your option. Note that this
.. dual licensing only applies to this file, and not this project as a
.. whole.
..
.. a) This file is free software; you can redistribute it and/or
.. modify it under the terms of the GNU General Public License as
.. published by the Free Software Foundation version 2 of
.. the License.
..
.. This file is distributed in the hope that it will be useful,
.. but WITHOUT ANY WARRANTY; without even the implied warranty of
.. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
.. GNU General Public License for more details.
..
.. Or, alternatively,
..
.. b) Permission is granted to copy, distribute and/or modify this
.. document under the terms of the GNU Free Documentation License,
.. Version 1.1 or any later version published by the Free Software
.. Foundation, with no Invariant Sections, no Front-Cover Texts
.. and no Back-Cover Texts. A copy of the license is included at
.. Documentation/media/uapi/fdl-appendix.rst.
..
.. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
.. _v4l2-meta-fmt-vivid:
*******************************
V4L2_META_FMT_VIVID ('VIVD')
*******************************
VIVID Metadata Format
Description
===========
This describes metadata format used by the vivid driver.
It sets Brightness, Saturation, Contrast and Hue, each of which maps to
corresponding controls of the vivid driver with respect to the range and default values.
It contains the following fields:
.. flat-table:: VIVID Metadata
:widths: 1 4
:header-rows: 1
:stub-columns: 0
* - Field
- Description
* - u16 brightness;
- Image brightness, the value is in the range 0 to 255, with the default value as 128.
* - u16 contrast;
- Image contrast, the value is in the range 0 to 255, with the default value as 128.
* - u16 saturation;
- Image color saturation, the value is in the range 0 to 255, with the default value as 128.
* - s16 hue;
- Image color balance, the value is in the range -128 to 128, with the default value as 0.

View File

@ -38,8 +38,10 @@ of the two interfaces they are used.
* - ``V4L2_SEL_TGT_CROP_DEFAULT``
- 0x0001
- Suggested cropping rectangle that covers the "whole picture".
This includes only active pixels and excludes other non-active
pixels such as black pixels.
- Yes
- Yes
- No
* - ``V4L2_SEL_TGT_CROP_BOUNDS``
- 0x0002
- Bounds of the crop rectangle. All valid crop rectangles fit inside

View File

@ -208,7 +208,15 @@ introduced in Linux 3.3. They are, however, mandatory for stateful mem2mem decod
been started yet, the driver will return an ``EPERM`` error code. When
the decoder is already running, this command does nothing. No
flags are defined for this command.
* - ``V4L2_DEC_CMD_FLUSH``
- 4
- Flush any held capture buffers. Only valid for stateless decoders.
This command is typically used when the application reached the
end of the stream and the last output buffer had the
``V4L2_BUF_FLAG_M2M_HOLD_CAPTURE_BUF`` flag set. This would prevent
dequeueing the capture buffer containing the last decoded frame.
So this command can be used to explicitly flush that final decoded
frame. This command does nothing if there are no held capture buffers.
Return Value
============

View File

@ -198,6 +198,11 @@ still cause this situation.
- ``p_u32``
- A pointer to a matrix control of unsigned 32-bit values. Valid if
this control is of type ``V4L2_CTRL_TYPE_U32``.
* -
- :c:type:`v4l2_area` *
- ``p_area``
- A pointer to a struct :c:type:`v4l2_area`. Valid if this control is
of type ``V4L2_CTRL_TYPE_AREA``.
* -
- void *
- ``ptr``

View File

@ -63,7 +63,7 @@ EINVAL error code when overlays are not supported.
To set the parameters for a *Video Output Overlay*, applications must
initialize the ``flags`` field of a struct
struct :c:type:`v4l2_framebuffer`. Since the framebuffer is
:c:type:`v4l2_framebuffer`. Since the framebuffer is
implemented on the TV card all other parameters are determined by the
driver. When an application calls :ref:`VIDIOC_S_FBUF <VIDIOC_G_FBUF>` with a pointer to
this structure, the driver prepares for the overlay and returns the

View File

@ -443,6 +443,12 @@ See also the examples in :ref:`control`.
- n/a
- A struct :c:type:`v4l2_ctrl_mpeg2_quantization`, containing MPEG-2
quantization matrices for stateless video decoders.
* - ``V4L2_CTRL_TYPE_AREA``
- n/a
- n/a
- n/a
- A struct :c:type:`v4l2_area`, containing the width and the height
of a rectangular area. Units depend on the use case.
* - ``V4L2_CTRL_TYPE_H264_SPS``
- n/a
- n/a
@ -473,6 +479,24 @@ See also the examples in :ref:`control`.
- n/a
- A struct :c:type:`v4l2_ctrl_h264_decode_params`, containing H264
decode parameters for stateless video decoders.
* - ``V4L2_CTRL_TYPE_HEVC_SPS``
- n/a
- n/a
- n/a
- A struct :c:type:`v4l2_ctrl_hevc_sps`, containing HEVC Sequence
Parameter Set for stateless video decoders.
* - ``V4L2_CTRL_TYPE_HEVC_PPS``
- n/a
- n/a
- n/a
- A struct :c:type:`v4l2_ctrl_hevc_pps`, containing HEVC Picture
Parameter Set for stateless video decoders.
* - ``V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS``
- n/a
- n/a
- n/a
- A struct :c:type:`v4l2_ctrl_hevc_slice_params`, containing HEVC
slice parameters for stateless video decoders.
.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}|

View File

@ -125,6 +125,7 @@ aborting or finishing any DMA in progress, an implicit
.. _V4L2-BUF-CAP-SUPPORTS-DMABUF:
.. _V4L2-BUF-CAP-SUPPORTS-REQUESTS:
.. _V4L2-BUF-CAP-SUPPORTS-ORPHANED-BUFS:
.. _V4L2-BUF-CAP-SUPPORTS-M2M-HOLD-CAPTURE-BUF:
.. cssclass:: longtable
@ -150,6 +151,11 @@ aborting or finishing any DMA in progress, an implicit
- The kernel allows calling :ref:`VIDIOC_REQBUFS` while buffers are still
mapped or exported via DMABUF. These orphaned buffers will be freed
when they are unmapped or when the exported DMABUF fds are closed.
* - ``V4L2_BUF_CAP_SUPPORTS_M2M_HOLD_CAPTURE_BUF``
- 0x00000020
- Only valid for stateless decoders. If set, then userspace can set the
``V4L2_BUF_FLAG_M2M_HOLD_CAPTURE_BUF`` flag to hold off on returning the
capture buffer until the OUTPUT timestamp changes.
Return Value
============

View File

@ -515,10 +515,10 @@ Streaming can then begin independently on the capture device nodes
be used to select any supported YUV pixelformat on the capture device
nodes, including planar.
SabreAuto with ADV7180 decoder
------------------------------
i.MX6Q SabreAuto with ADV7180 decoder
-------------------------------------
On the SabreAuto, an on-board ADV7180 SD decoder is connected to the
On the i.MX6Q SabreAuto, an on-board ADV7180 SD decoder is connected to the
parallel bus input on the internal video mux to IPU1 CSI0.
The following example configures a pipeline to capture from the ADV7180
@ -547,8 +547,6 @@ This example configures a pipeline to capture from the ADV7180
video decoder, assuming PAL 720x576 input signals, with Motion
Compensated de-interlacing. The adv7180 must output sequential or
alternating fields (field type 'seq-tb' for PAL, or 'alternate').
$outputfmt can be any format supported by the ipu1_ic_prpvf entity
at its output pad:
.. code-block:: none
@ -565,11 +563,70 @@ at its output pad:
media-ctl -V "'ipu1_csi0':1 [fmt:AYUV32/720x576]"
media-ctl -V "'ipu1_vdic':2 [fmt:AYUV32/720x576 field:none]"
media-ctl -V "'ipu1_ic_prp':2 [fmt:AYUV32/720x576 field:none]"
media-ctl -V "'ipu1_ic_prpvf':1 [fmt:$outputfmt field:none]"
media-ctl -V "'ipu1_ic_prpvf':1 [fmt:AYUV32/720x576 field:none]"
# Configure "ipu1_ic_prpvf capture" interface (assumed at /dev/video2)
v4l2-ctl -d2 --set-fmt-video=field=none
Streaming can then begin on the capture device node at
"ipu1_ic_prpvf capture". The v4l2-ctl tool can be used to select any
supported YUV or RGB pixelformat on the capture device node.
Streaming can then begin on /dev/video2. The v4l2-ctl tool can also be
used to select any supported YUV pixelformat on /dev/video2.
This platform accepts Composite Video analog inputs to the ADV7180 on
Ain1 (connector J42).
i.MX6DL SabreAuto with ADV7180 decoder
--------------------------------------
On the i.MX6DL SabreAuto, an on-board ADV7180 SD decoder is connected to the
parallel bus input on the internal video mux to IPU1 CSI0.
The following example configures a pipeline to capture from the ADV7180
video decoder, assuming NTSC 720x480 input signals, using simple
interweave (unconverted and without motion compensation). The adv7180
must output sequential or alternating fields (field type 'seq-bt' for
NTSC, or 'alternate'):
.. code-block:: none
# Setup links
media-ctl -l "'adv7180 4-0021':0 -> 'ipu1_csi0_mux':4[1]"
media-ctl -l "'ipu1_csi0_mux':5 -> 'ipu1_csi0':0[1]"
media-ctl -l "'ipu1_csi0':2 -> 'ipu1_csi0 capture':0[1]"
# Configure pads
media-ctl -V "'adv7180 4-0021':0 [fmt:UYVY2X8/720x480 field:seq-bt]"
media-ctl -V "'ipu1_csi0_mux':5 [fmt:UYVY2X8/720x480]"
media-ctl -V "'ipu1_csi0':2 [fmt:AYUV32/720x480]"
# Configure "ipu1_csi0 capture" interface (assumed at /dev/video0)
v4l2-ctl -d0 --set-fmt-video=field=interlaced_bt
Streaming can then begin on /dev/video0. The v4l2-ctl tool can also be
used to select any supported YUV pixelformat on /dev/video0.
This example configures a pipeline to capture from the ADV7180
video decoder, assuming PAL 720x576 input signals, with Motion
Compensated de-interlacing. The adv7180 must output sequential or
alternating fields (field type 'seq-tb' for PAL, or 'alternate').
.. code-block:: none
# Setup links
media-ctl -l "'adv7180 4-0021':0 -> 'ipu1_csi0_mux':4[1]"
media-ctl -l "'ipu1_csi0_mux':5 -> 'ipu1_csi0':0[1]"
media-ctl -l "'ipu1_csi0':1 -> 'ipu1_vdic':0[1]"
media-ctl -l "'ipu1_vdic':2 -> 'ipu1_ic_prp':0[1]"
media-ctl -l "'ipu1_ic_prp':2 -> 'ipu1_ic_prpvf':0[1]"
media-ctl -l "'ipu1_ic_prpvf':1 -> 'ipu1_ic_prpvf capture':0[1]"
# Configure pads
media-ctl -V "'adv7180 4-0021':0 [fmt:UYVY2X8/720x576 field:seq-tb]"
media-ctl -V "'ipu1_csi0_mux':5 [fmt:UYVY2X8/720x576]"
media-ctl -V "'ipu1_csi0':1 [fmt:AYUV32/720x576]"
media-ctl -V "'ipu1_vdic':2 [fmt:AYUV32/720x576 field:none]"
media-ctl -V "'ipu1_ic_prp':2 [fmt:AYUV32/720x576 field:none]"
media-ctl -V "'ipu1_ic_prpvf':1 [fmt:AYUV32/720x576 field:none]"
# Configure "ipu1_ic_prpvf capture" interface (assumed at /dev/video2)
v4l2-ctl -d2 --set-fmt-video=field=none
Streaming can then begin on /dev/video2. The v4l2-ctl tool can also be
used to select any supported YUV pixelformat on /dev/video2.
This platform accepts Composite Video analog inputs to the ADV7180 on
Ain1 (connector J42).

View File

@ -265,19 +265,56 @@ below.
yavta -w "0x009819A1 1" /dev/v4l-subdev7
RAW Bayer frames go through the following ImgU pipeline HW blocks to have the
Certain hardware blocks in ImgU pipeline can change the frame resolution by
cropping or scaling, these hardware blocks include Input Feeder(IF), Bayer Down
Scaler (BDS) and Geometric Distortion Correction (GDC).
There is also a block which can change the frame resolution - YUV Scaler, it is
only applicable to the secondary output.
RAW Bayer frames go through these ImgU pipeline hardware blocks and the final
processed image output to the DDR memory.
RAW Bayer frame -> Input Feeder -> Bayer Down Scaling (BDS) -> Geometric
Distortion Correction (GDC) -> DDR
.. kernel-figure:: ipu3_rcb.svg
:alt: ipu3 resolution blocks image
IPU3 resolution change hardware blocks
**Input Feeder**
Input Feeder gets the Bayer frame data from the sensor, it can enable cropping
of lines and columns from the frame and then store pixels into device's internal
pixel buffer which are ready to readout by following blocks.
**Bayer Down Scaler**
Bayer Down Scaler is capable of performing image scaling in Bayer domain, the
downscale factor can be configured from 1X to 1/4X in each axis with
configuration steps of 0.03125 (1/32).
**Geometric Distortion Correction**
Geometric Distortion Correction is used to performe correction of distortions
and image filtering. It needs some extra filter and envelop padding pixels to
work, so the input resolution of GDC should be larger than the output
resolution.
**YUV Scaler**
YUV Scaler which similar with BDS, but it is mainly do image down scaling in
YUV domain, it can support up to 1/12X down scaling, but it can not be applied
to the main output.
The ImgU V4L2 subdev has to be configured with the supported resolutions in all
the above HW blocks, for a given input resolution.
the above hardware blocks, for a given input resolution.
For a given supported resolution for an input frame, the Input Feeder, Bayer
Down Scaling and GDC blocks should be configured with the supported resolutions.
This information can be obtained by looking at the following IPU3 ImgU
configuration table.
Down Scaler and GDC blocks should be configured with the supported resolutions
as each hardware block has its own alignment requirement.
You must configure the output resolution of the hardware blocks smartly to meet
the hardware requirement along with keeping the maximum field of view.
The intermediate resolutions can be generated by specific tool and this
information can be obtained by looking at the following IPU3 ImgU configuration
table.
https://chromium.googlesource.com/chromiumos/overlays/board-overlays/+/master

View File

@ -0,0 +1,331 @@
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After

Width:  |  Height:  |  Size: 76 KiB

View File

@ -76,27 +76,19 @@ vimc-capture:
* 1 Pad sink
* 1 Pad source
Module options
---------------
--------------
Vimc has a few module parameters to configure the driver. You should pass
those arguments to each subdevice, not to the vimc module. For example::
Vimc has a module parameter to configure the driver.
vimc_subdevice.param=value
* ``vimc_scaler.sca_mult=<unsigned int>``
* ``sca_mult=<unsigned int>``
Image size multiplier factor to be used to multiply both width and
height, so the image size will be ``sca_mult^2`` bigger than the
original one. Currently, only supports scaling up (the default value
is 3).
* ``vimc_debayer.deb_mean_win_size=<unsigned int>``
Window size to calculate the mean. Note: the window size needs to be an
odd number, as the main pixel stays in the center of the window,
otherwise the next odd number is considered (the default value is 3).
Source code documentation
-------------------------

View File

@ -141,6 +141,10 @@ replace symbol V4L2_CTRL_TYPE_H264_PPS :c:type:`v4l2_ctrl_type`
replace symbol V4L2_CTRL_TYPE_H264_SCALING_MATRIX :c:type:`v4l2_ctrl_type`
replace symbol V4L2_CTRL_TYPE_H264_SLICE_PARAMS :c:type:`v4l2_ctrl_type`
replace symbol V4L2_CTRL_TYPE_H264_DECODE_PARAMS :c:type:`v4l2_ctrl_type`
replace symbol V4L2_CTRL_TYPE_HEVC_SPS :c:type:`v4l2_ctrl_type`
replace symbol V4L2_CTRL_TYPE_HEVC_PPS :c:type:`v4l2_ctrl_type`
replace symbol V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS :c:type:`v4l2_ctrl_type`
replace symbol V4L2_CTRL_TYPE_AREA :c:type:`v4l2_ctrl_type`
# V4L2 capability defines
replace define V4L2_CAP_VIDEO_CAPTURE device-capabilities
@ -434,6 +438,7 @@ replace define V4L2_DEC_CMD_START decoder-cmds
replace define V4L2_DEC_CMD_STOP decoder-cmds
replace define V4L2_DEC_CMD_PAUSE decoder-cmds
replace define V4L2_DEC_CMD_RESUME decoder-cmds
replace define V4L2_DEC_CMD_FLUSH decoder-cmds
replace define V4L2_DEC_CMD_START_MUTE_AUDIO decoder-cmds
replace define V4L2_DEC_CMD_PAUSE_TO_BLACK decoder-cmds

View File

@ -4650,6 +4650,14 @@ M: "Maciej W. Rozycki" <macro@linux-mips.org>
S: Maintained
F: drivers/net/fddi/defxx.*
DEINTERLACE DRIVERS FOR ALLWINNER H3
M: Jernej Skrabec <jernej.skrabec@siol.net>
L: linux-media@vger.kernel.org
T: git git://linuxtv.org/media_tree.git
S: Maintained
F: drivers/media/platform/sunxi/sun8i-di/
F: Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml
DELL SMBIOS DRIVER
M: Pali Rohár <pali.rohar@gmail.com>
M: Mario Limonciello <mario.limonciello@dell.com>
@ -7588,6 +7596,13 @@ L: linux-kernel@vger.kernel.org
S: Maintained
F: arch/x86/kernel/cpu/hygon.c
HYNIX HI556 SENSOR DRIVER
M: Shawn Tu <shawnx.tu@intel.com>
L: linux-media@vger.kernel.org
T: git git://linuxtv.org/media_tree.git
S: Maintained
F: drivers/media/i2c/hi556.c
Hyper-V CORE AND DRIVERS
M: "K. Y. Srinivasan" <kys@microsoft.com>
M: Haiyang Zhang <haiyangz@microsoft.com>
@ -8378,6 +8393,7 @@ S: Maintained
F: drivers/staging/media/ipu3/
F: Documentation/media/uapi/v4l/pixfmt-meta-intel-ipu3.rst
F: Documentation/media/v4l-drivers/ipu3.rst
F: Documentation/media/v4l-drivers/ipu3_rcb.svg
INTEL IXP4XX QMGR, NPE, ETHERNET and HSS SUPPORT
M: Krzysztof Halasa <khalasa@piap.pl>
@ -9933,7 +9949,7 @@ F: Documentation/hwmon/max16065.rst
F: drivers/hwmon/max16065.c
MAX2175 SDR TUNER DRIVER
M: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
M: Ramesh Shanmugasundaram <rashanmu@gmail.com>
L: linux-media@vger.kernel.org
T: git git://linuxtv.org/media_tree.git
S: Maintained
@ -10195,7 +10211,7 @@ F: drivers/media/platform/renesas-ceu.c
F: include/media/drv-intf/renesas-ceu.h
MEDIA DRIVERS FOR RENESAS - DRIF
M: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
M: Ramesh Shanmugasundaram <rashanmu@gmail.com>
L: linux-media@vger.kernel.org
L: linux-renesas-soc@vger.kernel.org
T: git git://linuxtv.org/media_tree.git
@ -10656,7 +10672,7 @@ W: http://linux-meson.com/
S: Supported
F: drivers/media/platform/meson/ao-cec.c
F: drivers/media/platform/meson/ao-cec-g12a.c
F: Documentation/devicetree/bindings/media/meson-ao-cec.txt
F: Documentation/devicetree/bindings/media/amlogic,meson-gx-ao-cec.yaml
T: git git://linuxtv.org/media_tree.git
MESON NAND CONTROLLER DRIVER FOR AMLOGIC SOCS
@ -15235,6 +15251,14 @@ S: Maintained
F: drivers/media/i2c/imx274.c
F: Documentation/devicetree/bindings/media/i2c/imx274.txt
SONY IMX290 SENSOR DRIVER
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
L: linux-media@vger.kernel.org
T: git git://linuxtv.org/media_tree.git
S: Maintained
F: drivers/media/i2c/imx290.c
F: Documentation/devicetree/bindings/media/i2c/imx290.txt
SONY IMX319 SENSOR DRIVER
M: Bingbu Cao <bingbu.cao@intel.com>
L: linux-media@vger.kernel.org
@ -16397,6 +16421,7 @@ W: http://linuxtv.org/
Q: http://patchwork.linuxtv.org/project/linux-media/list/
S: Maintained
F: drivers/media/platform/ti-vpe/
F: Documentation/devicetree/bindings/media/ti,vpe.yaml
TI WILINK WIRELESS DRIVERS
L: linux-wireless@vger.kernel.org
@ -17286,6 +17311,7 @@ F: include/media/videobuf2-*
VIMC VIRTUAL MEDIA CONTROLLER DRIVER
M: Helen Koike <helen.koike@collabora.com>
R: Shuah Khan <skhan@linuxfoundation.org>
L: linux-media@vger.kernel.org
T: git git://linuxtv.org/media_tree.git
W: https://linuxtv.org

View File

@ -252,6 +252,7 @@
};
&r_ir {
linux,rc-map-name = "rc-beelink-gs1";
status = "okay";
};

View File

@ -319,6 +319,8 @@ static void cec_post_state_event(struct cec_adapter *adap)
ev.state_change.phys_addr = adap->phys_addr;
ev.state_change.log_addr_mask = adap->log_addrs.log_addr_mask;
ev.state_change.have_conn_info =
adap->conn_info.type != CEC_CONNECTOR_TYPE_NO_CONNECTOR;
cec_queue_event(adap, &ev);
}
@ -1976,7 +1978,7 @@ static int cec_receive_notify(struct cec_adapter *adap, struct cec_msg *msg,
* Play function, this message can have variable length
* depending on the specific play function that is used.
*/
case 0x60:
case CEC_OP_UI_CMD_PLAY_FUNCTION:
if (msg->len == 2)
rc_keydown(adap->rc, RC_PROTO_CEC,
msg->msg[2], 0);
@ -1993,8 +1995,12 @@ static int cec_receive_notify(struct cec_adapter *adap, struct cec_msg *msg,
* For the time being these messages are not processed by the
* framework and are simply forwarded to the user space.
*/
case 0x56: case 0x57:
case 0x67: case 0x68: case 0x69: case 0x6a:
case CEC_OP_UI_CMD_SELECT_BROADCAST_TYPE:
case CEC_OP_UI_CMD_SELECT_SOUND_PRESENTATION:
case CEC_OP_UI_CMD_TUNE_FUNCTION:
case CEC_OP_UI_CMD_SELECT_MEDIA_FUNCTION:
case CEC_OP_UI_CMD_SELECT_AV_INPUT_FUNCTION:
case CEC_OP_UI_CMD_SELECT_AUDIO_INPUT_FUNCTION:
break;
default:
rc_keydown(adap->rc, RC_PROTO_CEC, msg->msg[2], 0);

View File

@ -187,6 +187,21 @@ static long cec_adap_s_log_addrs(struct cec_adapter *adap, struct cec_fh *fh,
return 0;
}
static long cec_adap_g_connector_info(struct cec_adapter *adap,
struct cec_log_addrs __user *parg)
{
int ret = 0;
if (!(adap->capabilities & CEC_CAP_CONNECTOR_INFO))
return -ENOTTY;
mutex_lock(&adap->lock);
if (copy_to_user(parg, &adap->conn_info, sizeof(adap->conn_info)))
ret = -EFAULT;
mutex_unlock(&adap->lock);
return ret;
}
static long cec_transmit(struct cec_adapter *adap, struct cec_fh *fh,
bool block, struct cec_msg __user *parg)
{
@ -506,6 +521,9 @@ static long cec_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
case CEC_ADAP_S_LOG_ADDRS:
return cec_adap_s_log_addrs(adap, fh, block, parg);
case CEC_ADAP_G_CONNECTOR_INFO:
return cec_adap_g_connector_info(adap, parg);
case CEC_TRANSMIT:
return cec_transmit(adap, fh, block, parg);
@ -578,6 +596,8 @@ static int cec_open(struct inode *inode, struct file *filp)
/* Queue up initial state events */
ev.state_change.phys_addr = adap->phys_addr;
ev.state_change.log_addr_mask = adap->log_addrs.log_addr_mask;
ev.state_change.have_conn_info =
adap->conn_info.type != CEC_CONNECTOR_TYPE_NO_CONNECTOR;
cec_queue_event_fh(fh, &ev, 0);
#ifdef CONFIG_CEC_PIN
if (adap->pin && adap->pin->ops->read_hpd) {

View File

@ -257,11 +257,6 @@ struct cec_adapter *cec_allocate_adapter(const struct cec_adap_ops *ops,
struct cec_adapter *adap;
int res;
/*
* Disable this capability until the connector info public API
* is ready.
*/
caps &= ~CEC_CAP_CONNECTOR_INFO;
#ifndef CONFIG_MEDIA_CEC_RC
caps &= ~CEC_CAP_RC;
#endif

View File

@ -1279,6 +1279,15 @@ static void cec_pin_adap_free(struct cec_adapter *adap)
kfree(pin);
}
static int cec_pin_received(struct cec_adapter *adap, struct cec_msg *msg)
{
struct cec_pin *pin = adap->pin;
if (pin->ops->received)
return pin->ops->received(adap, msg);
return -ENOMSG;
}
void cec_pin_changed(struct cec_adapter *adap, bool value)
{
struct cec_pin *pin = adap->pin;
@ -1301,6 +1310,7 @@ static const struct cec_adap_ops cec_pin_adap_ops = {
.error_inj_parse_line = cec_pin_error_inj_parse_line,
.error_inj_show = cec_pin_error_inj_show,
#endif
.received = cec_pin_received,
};
struct cec_adapter *cec_pin_allocate_adapter(const struct cec_pin_ops *pin_ops,

View File

@ -230,8 +230,8 @@ static char *siano_msgs[] = {
[MSG_SMS_FLASH_DL_REQ - MSG_TYPE_BASE_VAL] = "MSG_SMS_FLASH_DL_REQ",
[MSG_SMS_EXEC_TEST_1_REQ - MSG_TYPE_BASE_VAL] = "MSG_SMS_EXEC_TEST_1_REQ",
[MSG_SMS_EXEC_TEST_1_RES - MSG_TYPE_BASE_VAL] = "MSG_SMS_EXEC_TEST_1_RES",
[MSG_SMS_ENBALE_TS_INTERFACE_REQ - MSG_TYPE_BASE_VAL] = "MSG_SMS_ENBALE_TS_INTERFACE_REQ",
[MSG_SMS_ENBALE_TS_INTERFACE_RES - MSG_TYPE_BASE_VAL] = "MSG_SMS_ENBALE_TS_INTERFACE_RES",
[MSG_SMS_ENABLE_TS_INTERFACE_REQ - MSG_TYPE_BASE_VAL] = "MSG_SMS_ENABLE_TS_INTERFACE_REQ",
[MSG_SMS_ENABLE_TS_INTERFACE_RES - MSG_TYPE_BASE_VAL] = "MSG_SMS_ENABLE_TS_INTERFACE_RES",
[MSG_SMS_SPI_SET_BUS_WIDTH_REQ - MSG_TYPE_BASE_VAL] = "MSG_SMS_SPI_SET_BUS_WIDTH_REQ",
[MSG_SMS_SPI_SET_BUS_WIDTH_RES - MSG_TYPE_BASE_VAL] = "MSG_SMS_SPI_SET_BUS_WIDTH_RES",
[MSG_SMS_SEND_EMM_REQ - MSG_TYPE_BASE_VAL] = "MSG_SMS_SEND_EMM_REQ",

View File

@ -434,8 +434,8 @@ enum msg_types {
MSG_SMS_FLASH_DL_REQ = 732,
MSG_SMS_EXEC_TEST_1_REQ = 734,
MSG_SMS_EXEC_TEST_1_RES = 735,
MSG_SMS_ENBALE_TS_INTERFACE_REQ = 736,
MSG_SMS_ENBALE_TS_INTERFACE_RES = 737,
MSG_SMS_ENABLE_TS_INTERFACE_REQ = 736,
MSG_SMS_ENABLE_TS_INTERFACE_RES = 737,
MSG_SMS_SPI_SET_BUS_WIDTH_REQ = 738,
MSG_SMS_SPI_SET_BUS_WIDTH_RES = 739,
MSG_SMS_SEND_EMM_REQ = 740,

View File

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* SPDX-License-Identifier: GPL-2.0+
*
* Siano Mobile Silicon, Inc.
* MDTV receiver kernel modules.

View File

@ -49,8 +49,11 @@ module_param(debug, int, 0644);
V4L2_BUF_FLAG_REQUEST_FD | \
V4L2_BUF_FLAG_TIMESTAMP_MASK)
/* Output buffer flags that should be passed on to the driver */
#define V4L2_BUFFER_OUT_FLAGS (V4L2_BUF_FLAG_PFRAME | V4L2_BUF_FLAG_BFRAME | \
V4L2_BUF_FLAG_KEYFRAME | V4L2_BUF_FLAG_TIMECODE)
#define V4L2_BUFFER_OUT_FLAGS (V4L2_BUF_FLAG_PFRAME | \
V4L2_BUF_FLAG_BFRAME | \
V4L2_BUF_FLAG_KEYFRAME | \
V4L2_BUF_FLAG_TIMECODE | \
V4L2_BUF_FLAG_M2M_HOLD_CAPTURE_BUF)
/*
* __verify_planes_array() - verify that the planes array passed in struct
@ -194,6 +197,7 @@ static int vb2_fill_vb2_v4l2_buffer(struct vb2_buffer *vb, struct v4l2_buffer *b
}
vbuf->sequence = 0;
vbuf->request_fd = -1;
vbuf->is_held = false;
if (V4L2_TYPE_IS_MULTIPLANAR(b->type)) {
switch (b->memory) {
@ -321,6 +325,8 @@ static int vb2_fill_vb2_v4l2_buffer(struct vb2_buffer *vb, struct v4l2_buffer *b
*/
vbuf->flags &= ~V4L2_BUF_FLAG_TIMECODE;
vbuf->field = b->field;
if (!(q->subsystem_flags & VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF))
vbuf->flags &= ~V4L2_BUF_FLAG_M2M_HOLD_CAPTURE_BUF;
} else {
/* Zero any output buffer flags as this is a capture buffer */
vbuf->flags &= ~V4L2_BUFFER_OUT_FLAGS;
@ -654,6 +660,8 @@ static void fill_buf_caps(struct vb2_queue *q, u32 *caps)
*caps |= V4L2_BUF_CAP_SUPPORTS_USERPTR;
if (q->io_modes & VB2_DMABUF)
*caps |= V4L2_BUF_CAP_SUPPORTS_DMABUF;
if (q->subsystem_flags & VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF)
*caps |= V4L2_BUF_CAP_SUPPORTS_M2M_HOLD_CAPTURE_BUF;
#ifdef CONFIG_MEDIA_CONTROLLER_REQUEST_API
if (q->supports_requests)
*caps |= V4L2_BUF_CAP_SUPPORTS_REQUESTS;

View File

@ -298,7 +298,7 @@ int cxd2820r_sleep_c(struct dvb_frontend *fe)
struct cxd2820r_priv *priv = fe->demodulator_priv;
struct i2c_client *client = priv->client[0];
int ret;
struct reg_val_mask tab[] = {
static const struct reg_val_mask tab[] = {
{ 0x000ff, 0x1f, 0xff },
{ 0x00085, 0x00, 0xff },
{ 0x00088, 0x01, 0xff },

View File

@ -392,7 +392,7 @@ int cxd2820r_sleep_t(struct dvb_frontend *fe)
struct cxd2820r_priv *priv = fe->demodulator_priv;
struct i2c_client *client = priv->client[0];
int ret;
struct reg_val_mask tab[] = {
static struct reg_val_mask tab[] = {
{ 0x000ff, 0x1f, 0xff },
{ 0x00085, 0x00, 0xff },
{ 0x00088, 0x01, 0xff },

View File

@ -386,7 +386,7 @@ int cxd2820r_sleep_t2(struct dvb_frontend *fe)
struct cxd2820r_priv *priv = fe->demodulator_priv;
struct i2c_client *client = priv->client[0];
int ret;
struct reg_val_mask tab[] = {
static const struct reg_val_mask tab[] = {
{ 0x000ff, 0x1f, 0xff },
{ 0x00085, 0x00, 0xff },
{ 0x00088, 0x01, 0xff },

View File

@ -60,6 +60,7 @@ struct cxd2841er_priv {
enum cxd2841er_xtal xtal;
enum fe_caps caps;
u32 flags;
unsigned long stats_time;
};
static const struct cxd2841er_cnr_data s_cn_data[] = {
@ -3279,9 +3280,15 @@ static int cxd2841er_get_frontend(struct dvb_frontend *fe,
p->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
if (status & FE_HAS_LOCK) {
if (priv->stats_time &&
(!time_after(jiffies, priv->stats_time)))
return 0;
/* Prevent retrieving stats faster than once per second */
priv->stats_time = jiffies + msecs_to_jiffies(1000);
cxd2841er_read_snr(fe);
cxd2841er_read_ucblocks(fe);
cxd2841er_read_ber(fe);
} else {
p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
@ -3360,6 +3367,9 @@ done:
p->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
p->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
/* Reset the wait for jiffies logic */
priv->stats_time = 0;
return ret;
}

View File

@ -4201,7 +4201,7 @@ int drxj_dap_scu_atomic_read_reg16(struct i2c_device_addr *dev_addr,
u16 *data, u32 flags)
{
u8 buf[2] = { 0 };
int rc = -EIO;
int rc;
u16 word = 0;
if (!data)

View File

@ -517,7 +517,7 @@ static void mb86a20s_reset_frontend_cache(struct dvb_frontend *fe)
* Estimates the bit rate using the per-segment bit rate given by
* ABNT/NBR 15601 spec (table 4).
*/
static u32 isdbt_rate[3][5][4] = {
static const u32 isdbt_rate[3][5][4] = {
{ /* DQPSK/QPSK */
{ 280850, 312060, 330420, 340430 }, /* 1/2 */
{ 374470, 416080, 440560, 453910 }, /* 2/3 */
@ -539,13 +539,9 @@ static u32 isdbt_rate[3][5][4] = {
}
};
static void mb86a20s_layer_bitrate(struct dvb_frontend *fe, u32 layer,
u32 modulation, u32 forward_error_correction,
u32 guard_interval,
u32 segment)
static u32 isdbt_layer_min_bitrate(struct dtv_frontend_properties *c,
u32 layer)
{
struct mb86a20s_state *state = fe->demodulator_priv;
u32 rate;
int mod, fec, guard;
/*
@ -553,7 +549,7 @@ static void mb86a20s_layer_bitrate(struct dvb_frontend *fe, u32 layer,
* to consider the lowest bit rate, to avoid taking too long time
* to get BER.
*/
switch (modulation) {
switch (c->layer[layer].modulation) {
case DQPSK:
case QPSK:
default:
@ -567,7 +563,7 @@ static void mb86a20s_layer_bitrate(struct dvb_frontend *fe, u32 layer,
break;
}
switch (forward_error_correction) {
switch (c->layer[layer].fec) {
default:
case FEC_1_2:
case FEC_AUTO:
@ -587,7 +583,7 @@ static void mb86a20s_layer_bitrate(struct dvb_frontend *fe, u32 layer,
break;
}
switch (guard_interval) {
switch (c->guard_interval) {
default:
case GUARD_INTERVAL_1_4:
guard = 0;
@ -603,29 +599,14 @@ static void mb86a20s_layer_bitrate(struct dvb_frontend *fe, u32 layer,
break;
}
/* Samples BER at BER_SAMPLING_RATE seconds */
rate = isdbt_rate[mod][fec][guard] * segment * BER_SAMPLING_RATE;
/* Avoids sampling too quickly or to overflow the register */
if (rate < 256)
rate = 256;
else if (rate > (1 << 24) - 1)
rate = (1 << 24) - 1;
dev_dbg(&state->i2c->dev,
"%s: layer %c bitrate: %d kbps; counter = %d (0x%06x)\n",
__func__, 'A' + layer,
segment * isdbt_rate[mod][fec][guard]/1000,
rate, rate);
state->estimated_rate[layer] = rate;
return isdbt_rate[mod][fec][guard] * c->layer[layer].segment_count;
}
static int mb86a20s_get_frontend(struct dvb_frontend *fe)
{
struct mb86a20s_state *state = fe->demodulator_priv;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int layer, rc;
int layer, rc, rate, counter;
dev_dbg(&state->i2c->dev, "%s called.\n", __func__);
@ -676,10 +657,21 @@ static int mb86a20s_get_frontend(struct dvb_frontend *fe)
dev_dbg(&state->i2c->dev, "%s: interleaving %d.\n",
__func__, rc);
c->layer[layer].interleaving = rc;
mb86a20s_layer_bitrate(fe, layer, c->layer[layer].modulation,
c->layer[layer].fec,
c->guard_interval,
c->layer[layer].segment_count);
rate = isdbt_layer_min_bitrate(c, layer);
counter = rate * BER_SAMPLING_RATE;
/* Avoids sampling too quickly or to overflow the register */
if (counter < 256)
counter = 256;
else if (counter > (1 << 24) - 1)
counter = (1 << 24) - 1;
dev_dbg(&state->i2c->dev,
"%s: layer %c bitrate: %d kbps; counter = %d (0x%06x)\n",
__func__, 'A' + layer, rate / 1000, counter, counter);
state->estimated_rate[layer] = counter;
}
rc = mb86a20s_writereg(state, 0x6d, 0x84);

View File

@ -135,11 +135,6 @@ static inline int mt312_writereg(struct mt312_state *state,
return mt312_write(state, reg, &tmp, 1);
}
static inline u32 mt312_div(u32 a, u32 b)
{
return (a + (b / 2)) / b;
}
static int mt312_reset(struct mt312_state *state, const u8 full)
{
return mt312_writereg(state, RESET, full ? 0x80 : 0x40);
@ -187,7 +182,7 @@ static int mt312_get_symbol_rate(struct mt312_state *state, u32 *sr)
monitor = (buf[0] << 8) | buf[1];
dprintk("sr(auto) = %u\n",
mt312_div(monitor * 15625, 4));
DIV_ROUND_CLOSEST(monitor * 15625, 4));
} else {
ret = mt312_writereg(state, MON_CTRL, 0x05);
if (ret < 0)
@ -291,10 +286,10 @@ static int mt312_initfe(struct dvb_frontend *fe)
}
/* SYS_CLK */
buf[0] = mt312_div(state->xtal * state->freq_mult * 2, 1000000);
buf[0] = DIV_ROUND_CLOSEST(state->xtal * state->freq_mult * 2, 1000000);
/* DISEQC_RATIO */
buf[1] = mt312_div(state->xtal, 22000 * 4);
buf[1] = DIV_ROUND_CLOSEST(state->xtal, 22000 * 4);
ret = mt312_write(state, SYS_CLK, buf, sizeof(buf));
if (ret < 0)
@ -610,7 +605,7 @@ static int mt312_set_frontend(struct dvb_frontend *fe)
}
/* sr = (u16)(sr * 256.0 / 1000000.0) */
sr = mt312_div(p->symbol_rate * 4, 15625);
sr = DIV_ROUND_CLOSEST(p->symbol_rate * 4, 15625);
/* SYM_RATE */
buf[0] = (sr >> 8) & 0x3f;

View File

@ -9,38 +9,43 @@
#define SI2168_H
#include <linux/dvb/frontend.h>
/*
* I2C address
* 0x64
/**
* struct si2168_config - configuration parameters for si2168
*
* @fe:
* frontend returned by driver
* @i2c_adapter:
* tuner I2C adapter returned by driver
* @ts_mode:
* Transport Stream mode. Can be:
* - %SI2168_TS_PARALLEL
* - %SI2168_TS_SERIAL
* - %SI2168_TS_TRISTATE
* - %SI2168_TS_CLK_MANUAL
* @ts_clock_inv:
* TS clock inverted
* @ts_clock_gapped:
* TS clock gapped
* @spectral_inversion:
* Inverted spectrum
*
* Note:
* The I2C address of this demod is 0x64.
*/
struct si2168_config {
/*
* frontend
* returned by driver
*/
struct dvb_frontend **fe;
/*
* tuner I2C adapter
* returned by driver
*/
struct i2c_adapter **i2c_adapter;
/* TS mode */
#define SI2168_TS_PARALLEL 0x06
#define SI2168_TS_SERIAL 0x03
#define SI2168_TS_TRISTATE 0x00
#define SI2168_TS_CLK_MANUAL 0x20
u8 ts_mode;
/* TS clock inverted */
bool ts_clock_inv;
/* TS clock gapped */
bool ts_clock_gapped;
/* Inverted spectrum */
bool spectral_inversion;
/* Flags */
unsigned int ts_clock_inv:1;
unsigned int ts_clock_gapped:1;
unsigned int spectral_inversion:1;
};
#endif

View File

@ -34,12 +34,12 @@ struct si2168_dev {
unsigned int chip_id;
unsigned int version;
const char *firmware_name;
bool active;
bool warm;
u8 ts_mode;
bool ts_clock_inv;
bool ts_clock_gapped;
bool spectral_inversion;
unsigned int active:1;
unsigned int warm:1;
unsigned int ts_clock_inv:1;
unsigned int ts_clock_gapped:1;
unsigned int spectral_inversion:1;
};
/* firmware command struct */

View File

@ -685,10 +685,33 @@ tc90522_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
p += new_msgs[j].len;
}
if (i < num)
if (i < num) {
ret = -ENOMEM;
else
} else if (!state->cfg.split_tuner_read_i2c || rd_num == 0) {
ret = i2c_transfer(state->i2c_client->adapter, new_msgs, j);
} else {
/*
* Split transactions at each I2C_M_RD message.
* Some of the parent device require this,
* such as Friio (see. dvb-usb-gl861).
*/
int from, to;
ret = 0;
from = 0;
do {
int r;
to = from + 1;
while (to < j && !(new_msgs[to].flags & I2C_M_RD))
to++;
r = i2c_transfer(state->i2c_client->adapter,
&new_msgs[from], to - from);
ret = (r <= 0) ? r : ret + r;
from = to;
} while (from < j && ret > 0);
}
if (ret >= 0 && ret < j)
ret = -EIO;
kfree(new_msgs);

View File

@ -28,6 +28,9 @@ struct tc90522_config {
/* [OUT] tuner I2C adapter returned by driver */
struct i2c_adapter *tuner_i2c;
/* [IN] use two separate I2C transactions for one tuner read */
bool split_tuner_read_i2c;
};
#endif /* TC90522_H */

View File

@ -566,10 +566,23 @@ config VIDEO_APTINA_PLL
config VIDEO_SMIAPP_PLL
tristate
if MEDIA_CAMERA_SUPPORT
config VIDEO_HI556
tristate "Hynix Hi-556 sensor support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CONTROLLER
select V4L2_FWNODE
help
This is a Video4Linux2 sensor driver for the Hynix
Hi-556 camera.
To compile this driver as a module, choose M here: the
module will be called hi556.
config VIDEO_IMX214
tristate "Sony IMX214 sensor support"
depends on GPIOLIB && I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CAMERA_SUPPORT
depends on V4L2_FWNODE
help
This is a Video4Linux2 sensor driver for the Sony
@ -581,7 +594,6 @@ config VIDEO_IMX214
config VIDEO_IMX258
tristate "Sony IMX258 sensor support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CAMERA_SUPPORT
help
This is a Video4Linux2 sensor driver for the Sony
IMX258 camera.
@ -592,16 +604,25 @@ config VIDEO_IMX258
config VIDEO_IMX274
tristate "Sony IMX274 sensor support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CAMERA_SUPPORT
select REGMAP_I2C
help
This is a V4L2 sensor driver for the Sony IMX274
CMOS image sensor.
config VIDEO_IMX290
tristate "Sony IMX290 sensor support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
select V4L2_FWNODE
help
This is a Video4Linux2 sensor driver for the Sony
IMX290 camera sensor.
To compile this driver as a module, choose M here: the
module will be called imx290.
config VIDEO_IMX319
tristate "Sony IMX319 sensor support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CAMERA_SUPPORT
help
This is a Video4Linux2 sensor driver for the Sony
IMX319 camera.
@ -612,7 +633,6 @@ config VIDEO_IMX319
config VIDEO_IMX355
tristate "Sony IMX355 sensor support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CAMERA_SUPPORT
help
This is a Video4Linux2 sensor driver for the Sony
IMX355 camera.
@ -623,7 +643,6 @@ config VIDEO_IMX355
config VIDEO_OV2640
tristate "OmniVision OV2640 sensor support"
depends on VIDEO_V4L2 && I2C
depends on MEDIA_CAMERA_SUPPORT
help
This is a Video4Linux2 sensor driver for the OmniVision
OV2640 camera.
@ -633,8 +652,7 @@ config VIDEO_OV2640
config VIDEO_OV2659
tristate "OmniVision OV2659 sensor support"
depends on VIDEO_V4L2 && I2C
depends on MEDIA_CAMERA_SUPPORT
depends on VIDEO_V4L2 && I2C && GPIOLIB
select V4L2_FWNODE
help
This is a Video4Linux2 sensor driver for the OmniVision
@ -646,7 +664,6 @@ config VIDEO_OV2659
config VIDEO_OV2680
tristate "OmniVision OV2680 sensor support"
depends on VIDEO_V4L2 && I2C && MEDIA_CONTROLLER
depends on MEDIA_CAMERA_SUPPORT
select V4L2_FWNODE
help
This is a Video4Linux2 sensor driver for the OmniVision
@ -658,7 +675,6 @@ config VIDEO_OV2680
config VIDEO_OV2685
tristate "OmniVision OV2685 sensor support"
depends on VIDEO_V4L2 && I2C && MEDIA_CONTROLLER
depends on MEDIA_CAMERA_SUPPORT
select V4L2_FWNODE
help
This is a Video4Linux2 sensor driver for the OmniVision
@ -671,7 +687,6 @@ config VIDEO_OV5640
tristate "OmniVision OV5640 sensor support"
depends on OF
depends on GPIOLIB && VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CAMERA_SUPPORT
select V4L2_FWNODE
help
This is a Video4Linux2 sensor driver for the Omnivision
@ -681,7 +696,6 @@ config VIDEO_OV5645
tristate "OmniVision OV5645 sensor support"
depends on OF
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CAMERA_SUPPORT
select V4L2_FWNODE
help
This is a Video4Linux2 sensor driver for the OmniVision
@ -693,7 +707,6 @@ config VIDEO_OV5645
config VIDEO_OV5647
tristate "OmniVision OV5647 sensor support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CAMERA_SUPPORT
select V4L2_FWNODE
help
This is a Video4Linux2 sensor driver for the OmniVision
@ -705,7 +718,6 @@ config VIDEO_OV5647
config VIDEO_OV6650
tristate "OmniVision OV6650 sensor support"
depends on I2C && VIDEO_V4L2
depends on MEDIA_CAMERA_SUPPORT
help
This is a Video4Linux2 sensor driver for the OmniVision
OV6650 camera.
@ -716,7 +728,6 @@ config VIDEO_OV6650
config VIDEO_OV5670
tristate "OmniVision OV5670 sensor support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CAMERA_SUPPORT
depends on MEDIA_CONTROLLER
select V4L2_FWNODE
help
@ -729,7 +740,6 @@ config VIDEO_OV5670
config VIDEO_OV5675
tristate "OmniVision OV5675 sensor support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CAMERA_SUPPORT
depends on MEDIA_CONTROLLER
select V4L2_FWNODE
help
@ -742,7 +752,7 @@ config VIDEO_OV5675
config VIDEO_OV5695
tristate "OmniVision OV5695 sensor support"
depends on I2C && VIDEO_V4L2
depends on MEDIA_CAMERA_SUPPORT
select V4L2_FWNODE
help
This is a Video4Linux2 sensor driver for the OmniVision
OV5695 camera.
@ -753,7 +763,6 @@ config VIDEO_OV5695
config VIDEO_OV7251
tristate "OmniVision OV7251 sensor support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CAMERA_SUPPORT
select V4L2_FWNODE
help
This is a Video4Linux2 sensor driver for the OmniVision
@ -765,7 +774,6 @@ config VIDEO_OV7251
config VIDEO_OV772X
tristate "OmniVision OV772x sensor support"
depends on I2C && VIDEO_V4L2
depends on MEDIA_CAMERA_SUPPORT
select REGMAP_SCCB
help
This is a Video4Linux2 sensor driver for the OmniVision
@ -777,7 +785,6 @@ config VIDEO_OV772X
config VIDEO_OV7640
tristate "OmniVision OV7640 sensor support"
depends on I2C && VIDEO_V4L2
depends on MEDIA_CAMERA_SUPPORT
help
This is a Video4Linux2 sensor driver for the OmniVision
OV7640 camera.
@ -788,7 +795,6 @@ config VIDEO_OV7640
config VIDEO_OV7670
tristate "OmniVision OV7670 sensor support"
depends on I2C && VIDEO_V4L2
depends on MEDIA_CAMERA_SUPPORT
select V4L2_FWNODE
help
This is a Video4Linux2 sensor driver for the OmniVision
@ -798,7 +804,6 @@ config VIDEO_OV7670
config VIDEO_OV7740
tristate "OmniVision OV7740 sensor support"
depends on I2C && VIDEO_V4L2
depends on MEDIA_CAMERA_SUPPORT
help
This is a Video4Linux2 sensor driver for the OmniVision
OV7740 VGA camera sensor.
@ -806,7 +811,6 @@ config VIDEO_OV7740
config VIDEO_OV8856
tristate "OmniVision OV8856 sensor support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CAMERA_SUPPORT
select V4L2_FWNODE
help
This is a Video4Linux2 sensor driver for the OmniVision
@ -833,7 +837,6 @@ config VIDEO_OV9650
config VIDEO_OV13858
tristate "OmniVision OV13858 sensor support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CAMERA_SUPPORT
select V4L2_FWNODE
help
This is a Video4Linux2 sensor driver for the OmniVision
@ -842,7 +845,6 @@ config VIDEO_OV13858
config VIDEO_VS6624
tristate "ST VS6624 sensor support"
depends on VIDEO_V4L2 && I2C
depends on MEDIA_CAMERA_SUPPORT
help
This is a Video4Linux2 sensor driver for the ST VS6624
camera.
@ -853,7 +855,6 @@ config VIDEO_VS6624
config VIDEO_MT9M001
tristate "mt9m001 support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CAMERA_SUPPORT
help
This driver supports MT9M001 cameras from Micron, monochrome
and colour models.
@ -861,7 +862,6 @@ config VIDEO_MT9M001
config VIDEO_MT9M032
tristate "MT9M032 camera sensor support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CAMERA_SUPPORT
select VIDEO_APTINA_PLL
help
This driver supports MT9M032 camera sensors from Aptina, monochrome
@ -878,7 +878,6 @@ config VIDEO_MT9M111
config VIDEO_MT9P031
tristate "Aptina MT9P031 support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CAMERA_SUPPORT
select VIDEO_APTINA_PLL
help
This is a Video4Linux2 sensor driver for the Aptina
@ -887,7 +886,6 @@ config VIDEO_MT9P031
config VIDEO_MT9T001
tristate "Aptina MT9T001 support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CAMERA_SUPPORT
help
This is a Video4Linux2 sensor driver for the Aptina
(Micron) mt0t001 3 Mpixel camera.
@ -895,7 +893,6 @@ config VIDEO_MT9T001
config VIDEO_MT9T112
tristate "Aptina MT9T111/MT9T112 support"
depends on I2C && VIDEO_V4L2
depends on MEDIA_CAMERA_SUPPORT
help
This is a Video4Linux2 sensor driver for the Aptina
(Micron) MT9T111 and MT9T112 3 Mpixel camera.
@ -906,7 +903,6 @@ config VIDEO_MT9T112
config VIDEO_MT9V011
tristate "Micron mt9v011 sensor support"
depends on I2C && VIDEO_V4L2
depends on MEDIA_CAMERA_SUPPORT
help
This is a Video4Linux2 sensor driver for the Micron
mt0v011 1.3 Mpixel camera. It currently only works with the
@ -915,7 +911,6 @@ config VIDEO_MT9V011
config VIDEO_MT9V032
tristate "Micron MT9V032 sensor support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CAMERA_SUPPORT
select REGMAP_I2C
select V4L2_FWNODE
help
@ -925,7 +920,6 @@ config VIDEO_MT9V032
config VIDEO_MT9V111
tristate "Aptina MT9V111 sensor support"
depends on I2C && VIDEO_V4L2
depends on MEDIA_CAMERA_SUPPORT
help
This is a Video4Linux2 sensor driver for the Aptina/Micron
MT9V111 sensor.
@ -936,14 +930,12 @@ config VIDEO_MT9V111
config VIDEO_SR030PC30
tristate "Siliconfile SR030PC30 sensor support"
depends on I2C && VIDEO_V4L2
depends on MEDIA_CAMERA_SUPPORT
help
This driver supports SR030PC30 VGA camera from Siliconfile
config VIDEO_NOON010PC30
tristate "Siliconfile NOON010PC30 sensor support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on MEDIA_CAMERA_SUPPORT
help
This driver supports NOON010PC30 CIF camera from Siliconfile
@ -952,7 +944,6 @@ source "drivers/media/i2c/m5mols/Kconfig"
config VIDEO_RJ54N1
tristate "Sharp RJ54N1CB0C sensor support"
depends on I2C && VIDEO_V4L2
depends on MEDIA_CAMERA_SUPPORT
help
This is a V4L2 sensor driver for Sharp RJ54N1CB0C CMOS image
sensor.
@ -962,7 +953,6 @@ config VIDEO_RJ54N1
config VIDEO_S5K6AA
tristate "Samsung S5K6AAFX sensor support"
depends on MEDIA_CAMERA_SUPPORT
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
help
This is a V4L2 sensor driver for Samsung S5K6AA(FX) 1.3M
@ -970,7 +960,6 @@ config VIDEO_S5K6AA
config VIDEO_S5K6A3
tristate "Samsung S5K6A3 sensor support"
depends on MEDIA_CAMERA_SUPPORT
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
help
This is a V4L2 sensor driver for Samsung S5K6A3 raw
@ -1002,12 +991,15 @@ config VIDEO_S5C73M3
help
This is a V4L2 sensor driver for Samsung S5C73M3
8 Mpixel camera.
endif
comment "Lens drivers"
if MEDIA_CAMERA_SUPPORT
config VIDEO_AD5820
tristate "AD5820 lens voice coil support"
depends on I2C && VIDEO_V4L2 && MEDIA_CONTROLLER
depends on GPIOLIB && I2C && VIDEO_V4L2 && MEDIA_CONTROLLER
help
This is a driver for the AD5820 camera lens voice coil.
It is used for example in Nokia N900 (RX-51).
@ -1042,12 +1034,15 @@ config VIDEO_DW9807_VCM
capability. This is designed for linear control of
voice coil motors, controlled via I2C serial interface.
endif
comment "Flash devices"
if MEDIA_CAMERA_SUPPORT
config VIDEO_ADP1653
tristate "ADP1653 flash support"
depends on I2C && VIDEO_V4L2 && MEDIA_CONTROLLER
depends on MEDIA_CAMERA_SUPPORT
help
This is a driver for the ADP1653 flash controller. It is used for
example in Nokia N900.
@ -1055,7 +1050,6 @@ config VIDEO_ADP1653
config VIDEO_LM3560
tristate "LM3560 dual flash driver support"
depends on I2C && VIDEO_V4L2 && MEDIA_CONTROLLER
depends on MEDIA_CAMERA_SUPPORT
select REGMAP_I2C
help
This is a driver for the lm3560 dual flash controllers. It controls
@ -1064,12 +1058,13 @@ config VIDEO_LM3560
config VIDEO_LM3646
tristate "LM3646 dual flash driver support"
depends on I2C && VIDEO_V4L2 && MEDIA_CONTROLLER
depends on MEDIA_CAMERA_SUPPORT
select REGMAP_I2C
help
This is a driver for the lm3646 dual flash controllers. It controls
flash, torch LEDs.
endif
comment "Video improvement chips"
config VIDEO_UPD64031A
@ -1113,6 +1108,7 @@ comment "SDR tuner chips"
config SDR_MAX2175
tristate "Maxim 2175 RF to Bits tuner"
depends on VIDEO_V4L2 && MEDIA_SDR_SUPPORT && I2C
select REGMAP_I2C
help
Support for Maxim 2175 tuner. It is an advanced analog/digital
radio receiver with RF-to-Bits front-end designed for SDR solutions.

View File

@ -109,9 +109,11 @@ obj-$(CONFIG_VIDEO_I2C) += video-i2c.o
obj-$(CONFIG_VIDEO_ML86V7667) += ml86v7667.o
obj-$(CONFIG_VIDEO_OV2659) += ov2659.o
obj-$(CONFIG_VIDEO_TC358743) += tc358743.o
obj-$(CONFIG_VIDEO_HI556) += hi556.o
obj-$(CONFIG_VIDEO_IMX214) += imx214.o
obj-$(CONFIG_VIDEO_IMX258) += imx258.o
obj-$(CONFIG_VIDEO_IMX274) += imx274.o
obj-$(CONFIG_VIDEO_IMX290) += imx290.o
obj-$(CONFIG_VIDEO_IMX319) += imx319.o
obj-$(CONFIG_VIDEO_IMX355) += imx355.o
obj-$(CONFIG_VIDEO_ST_MIPID02) += st-mipid02.o

View File

@ -19,13 +19,12 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/regulator/consumer.h>
#include <linux/gpio/consumer.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/v4l2-subdev.h>
#define AD5820_NAME "ad5820"
/* Register definitions */
#define AD5820_POWER_DOWN (1 << 15)
#define AD5820_DAC_SHIFT 4
@ -47,6 +46,8 @@ struct ad5820_device {
u32 focus_ramp_time;
u32 focus_ramp_mode;
struct gpio_desc *enable_gpio;
struct mutex power_lock;
int power_count;
@ -114,6 +115,8 @@ static int ad5820_power_off(struct ad5820_device *coil, bool standby)
ret = ad5820_update_hw(coil);
}
gpiod_set_value_cansleep(coil->enable_gpio, 0);
ret2 = regulator_disable(coil->vana);
if (ret)
return ret;
@ -128,6 +131,8 @@ static int ad5820_power_on(struct ad5820_device *coil, bool restore)
if (ret < 0)
return ret;
gpiod_set_value_cansleep(coil->enable_gpio, 1);
if (restore) {
/* Restore the hardware settings. */
coil->standby = false;
@ -138,6 +143,7 @@ static int ad5820_power_on(struct ad5820_device *coil, bool restore)
return 0;
fail:
gpiod_set_value_cansleep(coil->enable_gpio, 0);
coil->standby = true;
regulator_disable(coil->vana);
@ -304,11 +310,21 @@ static int ad5820_probe(struct i2c_client *client,
return ret;
}
coil->enable_gpio = devm_gpiod_get_optional(&client->dev, "enable",
GPIOD_OUT_LOW);
if (IS_ERR(coil->enable_gpio)) {
ret = PTR_ERR(coil->enable_gpio);
if (ret != -EPROBE_DEFER)
dev_err(&client->dev, "could not get enable gpio\n");
return ret;
}
mutex_init(&coil->power_lock);
v4l2_i2c_subdev_init(&coil->subdev, client, &ad5820_ops);
coil->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
coil->subdev.internal_ops = &ad5820_internal_ops;
coil->subdev.entity.function = MEDIA_ENT_F_LENS;
strscpy(coil->subdev.name, "ad5820 focus", sizeof(coil->subdev.name));
ret = media_entity_pads_init(&coil->subdev.entity, 0, NULL);
@ -341,17 +357,28 @@ static int ad5820_remove(struct i2c_client *client)
}
static const struct i2c_device_id ad5820_id_table[] = {
{ AD5820_NAME, 0 },
{ "ad5820", 0 },
{ "ad5821", 0 },
{ "ad5823", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, ad5820_id_table);
static const struct of_device_id ad5820_of_table[] = {
{ .compatible = "adi,ad5820" },
{ .compatible = "adi,ad5821" },
{ .compatible = "adi,ad5823" },
{ }
};
MODULE_DEVICE_TABLE(of, ad5820_of_table);
static SIMPLE_DEV_PM_OPS(ad5820_pm, ad5820_suspend, ad5820_resume);
static struct i2c_driver ad5820_i2c_driver = {
.driver = {
.name = AD5820_NAME,
.name = "ad5820",
.pm = &ad5820_pm,
.of_match_table = ad5820_of_table,
},
.probe = ad5820_probe,
.remove = ad5820_remove,

View File

@ -1309,9 +1309,6 @@ static int adv7180_probe(struct i2c_client *client,
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
return -EIO;
v4l_info(client, "chip found @ 0x%02x (%s)\n",
client->addr, client->adapter->name);
state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
if (state == NULL)
return -ENOMEM;
@ -1382,6 +1379,9 @@ static int adv7180_probe(struct i2c_client *client,
if (ret)
goto err_free_irq;
v4l_info(client, "chip found @ 0x%02x (%s)\n",
client->addr, client->adapter->name);
return 0;
err_free_irq:

View File

@ -2547,7 +2547,7 @@ struct adv7842_cfg_read_infoframe {
u8 payload_addr;
};
static void log_infoframe(struct v4l2_subdev *sd, struct adv7842_cfg_read_infoframe *cri)
static void log_infoframe(struct v4l2_subdev *sd, const struct adv7842_cfg_read_infoframe *cri)
{
int i;
u8 buffer[32];
@ -2585,7 +2585,7 @@ static void log_infoframe(struct v4l2_subdev *sd, struct adv7842_cfg_read_infofr
static void adv7842_log_infoframes(struct v4l2_subdev *sd)
{
int i;
struct adv7842_cfg_read_infoframe cri[] = {
static const struct adv7842_cfg_read_infoframe cri[] = {
{ "AVI", 0x01, 0xe0, 0x00 },
{ "Audio", 0x02, 0xe3, 0x1c },
{ "SDP", 0x04, 0xe6, 0x2a },

View File

@ -157,7 +157,7 @@ static int bt819_init(struct v4l2_subdev *sd)
0x12, 0x04, /* 0x12 Output Format */
0x13, 0x20, /* 0x13 Vertical Scaling msb 0x00
chroma comb OFF, line drop scaling, interlace scaling
BUG? Why does turning the chroma comb on fuck up color?
BUG? Why does turning the chroma comb on screw up color?
Bug in the bt819 stepping on my board?
*/
0x14, 0x00, /* 0x14 Vertical Scaling lsb */

1200
drivers/media/i2c/hi556.c Normal file

File diff suppressed because it is too large Load Diff

View File

@ -47,6 +47,7 @@ struct imx214 {
struct v4l2_ctrl *pixel_rate;
struct v4l2_ctrl *link_freq;
struct v4l2_ctrl *exposure;
struct v4l2_ctrl *unit_size;
struct regulator_bulk_data supplies[IMX214_NUM_SUPPLIES];
@ -948,6 +949,10 @@ static int imx214_probe(struct i2c_client *client)
static const s64 link_freq[] = {
IMX214_DEFAULT_LINK_FREQ,
};
static const struct v4l2_area unit_size = {
.width = 1120,
.height = 1120,
};
int ret;
ret = imx214_parse_fwnode(dev);
@ -1029,6 +1034,10 @@ static int imx214_probe(struct i2c_client *client)
V4L2_CID_EXPOSURE,
0, 3184, 1, 0x0c70);
imx214->unit_size = v4l2_ctrl_new_std_compound(&imx214->ctrls,
NULL,
V4L2_CID_UNIT_CELL_SIZE,
v4l2_ctrl_ptr_create((void *)&unit_size));
ret = imx214->ctrls.error;
if (ret) {
dev_err(&client->dev, "%s control init failed (%d)\n",

884
drivers/media/i2c/imx290.c Normal file
View File

@ -0,0 +1,884 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Sony IMX290 CMOS Image Sensor Driver
*
* Copyright (C) 2019 FRAMOS GmbH.
*
* Copyright (C) 2019 Linaro Ltd.
* Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
*/
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <media/media-entity.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/v4l2-fwnode.h>
#include <media/v4l2-subdev.h>
#define IMX290_STANDBY 0x3000
#define IMX290_REGHOLD 0x3001
#define IMX290_XMSTA 0x3002
#define IMX290_GAIN 0x3014
#define IMX290_DEFAULT_LINK_FREQ 445500000
static const char * const imx290_supply_name[] = {
"vdda",
"vddd",
"vdddo",
};
#define IMX290_NUM_SUPPLIES ARRAY_SIZE(imx290_supply_name)
struct imx290_regval {
u16 reg;
u8 val;
};
struct imx290_mode {
u32 width;
u32 height;
u32 pixel_rate;
u32 link_freq_index;
const struct imx290_regval *data;
u32 data_size;
};
struct imx290 {
struct device *dev;
struct clk *xclk;
struct regmap *regmap;
struct v4l2_subdev sd;
struct v4l2_fwnode_endpoint ep;
struct media_pad pad;
struct v4l2_mbus_framefmt current_format;
const struct imx290_mode *current_mode;
struct regulator_bulk_data supplies[IMX290_NUM_SUPPLIES];
struct gpio_desc *rst_gpio;
struct v4l2_ctrl_handler ctrls;
struct v4l2_ctrl *link_freq;
struct v4l2_ctrl *pixel_rate;
struct mutex lock;
};
struct imx290_pixfmt {
u32 code;
};
static const struct imx290_pixfmt imx290_formats[] = {
{ MEDIA_BUS_FMT_SRGGB10_1X10 },
};
static const struct regmap_config imx290_regmap_config = {
.reg_bits = 16,
.val_bits = 8,
.cache_type = REGCACHE_RBTREE,
};
static const struct imx290_regval imx290_global_init_settings[] = {
{ 0x3007, 0x00 },
{ 0x3009, 0x00 },
{ 0x3018, 0x65 },
{ 0x3019, 0x04 },
{ 0x301a, 0x00 },
{ 0x3443, 0x03 },
{ 0x3444, 0x20 },
{ 0x3445, 0x25 },
{ 0x3407, 0x03 },
{ 0x303a, 0x0c },
{ 0x3040, 0x00 },
{ 0x3041, 0x00 },
{ 0x303c, 0x00 },
{ 0x303d, 0x00 },
{ 0x3042, 0x9c },
{ 0x3043, 0x07 },
{ 0x303e, 0x49 },
{ 0x303f, 0x04 },
{ 0x304b, 0x0a },
{ 0x300f, 0x00 },
{ 0x3010, 0x21 },
{ 0x3012, 0x64 },
{ 0x3016, 0x09 },
{ 0x3070, 0x02 },
{ 0x3071, 0x11 },
{ 0x309b, 0x10 },
{ 0x309c, 0x22 },
{ 0x30a2, 0x02 },
{ 0x30a6, 0x20 },
{ 0x30a8, 0x20 },
{ 0x30aa, 0x20 },
{ 0x30ac, 0x20 },
{ 0x30b0, 0x43 },
{ 0x3119, 0x9e },
{ 0x311c, 0x1e },
{ 0x311e, 0x08 },
{ 0x3128, 0x05 },
{ 0x313d, 0x83 },
{ 0x3150, 0x03 },
{ 0x317e, 0x00 },
{ 0x32b8, 0x50 },
{ 0x32b9, 0x10 },
{ 0x32ba, 0x00 },
{ 0x32bb, 0x04 },
{ 0x32c8, 0x50 },
{ 0x32c9, 0x10 },
{ 0x32ca, 0x00 },
{ 0x32cb, 0x04 },
{ 0x332c, 0xd3 },
{ 0x332d, 0x10 },
{ 0x332e, 0x0d },
{ 0x3358, 0x06 },
{ 0x3359, 0xe1 },
{ 0x335a, 0x11 },
{ 0x3360, 0x1e },
{ 0x3361, 0x61 },
{ 0x3362, 0x10 },
{ 0x33b0, 0x50 },
{ 0x33b2, 0x1a },
{ 0x33b3, 0x04 },
};
static const struct imx290_regval imx290_1080p_settings[] = {
/* mode settings */
{ 0x3007, 0x00 },
{ 0x303a, 0x0c },
{ 0x3414, 0x0a },
{ 0x3472, 0x80 },
{ 0x3473, 0x07 },
{ 0x3418, 0x38 },
{ 0x3419, 0x04 },
{ 0x3012, 0x64 },
{ 0x3013, 0x00 },
{ 0x305c, 0x18 },
{ 0x305d, 0x03 },
{ 0x305e, 0x20 },
{ 0x305f, 0x01 },
{ 0x315e, 0x1a },
{ 0x3164, 0x1a },
{ 0x3480, 0x49 },
/* data rate settings */
{ 0x3009, 0x01 },
{ 0x3405, 0x10 },
{ 0x3446, 0x57 },
{ 0x3447, 0x00 },
{ 0x3448, 0x37 },
{ 0x3449, 0x00 },
{ 0x344a, 0x1f },
{ 0x344b, 0x00 },
{ 0x344c, 0x1f },
{ 0x344d, 0x00 },
{ 0x344e, 0x1f },
{ 0x344f, 0x00 },
{ 0x3450, 0x77 },
{ 0x3451, 0x00 },
{ 0x3452, 0x1f },
{ 0x3453, 0x00 },
{ 0x3454, 0x17 },
{ 0x3455, 0x00 },
{ 0x301c, 0x98 },
{ 0x301d, 0x08 },
};
static const struct imx290_regval imx290_720p_settings[] = {
/* mode settings */
{ 0x3007, 0x10 },
{ 0x303a, 0x06 },
{ 0x3414, 0x04 },
{ 0x3472, 0x00 },
{ 0x3473, 0x05 },
{ 0x3418, 0xd0 },
{ 0x3419, 0x02 },
{ 0x3012, 0x64 },
{ 0x3013, 0x00 },
{ 0x305c, 0x20 },
{ 0x305d, 0x00 },
{ 0x305e, 0x20 },
{ 0x305f, 0x01 },
{ 0x315e, 0x1a },
{ 0x3164, 0x1a },
{ 0x3480, 0x49 },
/* data rate settings */
{ 0x3009, 0x01 },
{ 0x3405, 0x10 },
{ 0x3446, 0x4f },
{ 0x3447, 0x00 },
{ 0x3448, 0x2f },
{ 0x3449, 0x00 },
{ 0x344a, 0x17 },
{ 0x344b, 0x00 },
{ 0x344c, 0x17 },
{ 0x344d, 0x00 },
{ 0x344e, 0x17 },
{ 0x344f, 0x00 },
{ 0x3450, 0x57 },
{ 0x3451, 0x00 },
{ 0x3452, 0x17 },
{ 0x3453, 0x00 },
{ 0x3454, 0x17 },
{ 0x3455, 0x00 },
{ 0x301c, 0xe4 },
{ 0x301d, 0x0c },
};
static const struct imx290_regval imx290_10bit_settings[] = {
{ 0x3005, 0x00},
{ 0x3046, 0x00},
{ 0x3129, 0x1d},
{ 0x317c, 0x12},
{ 0x31ec, 0x37},
{ 0x3441, 0x0a},
{ 0x3442, 0x0a},
{ 0x300a, 0x3c},
{ 0x300b, 0x00},
};
/* supported link frequencies */
static const s64 imx290_link_freq[] = {
IMX290_DEFAULT_LINK_FREQ,
};
/* Mode configs */
static const struct imx290_mode imx290_modes[] = {
{
.width = 1920,
.height = 1080,
.data = imx290_1080p_settings,
.data_size = ARRAY_SIZE(imx290_1080p_settings),
.pixel_rate = 178200000,
.link_freq_index = 0,
},
{
.width = 1280,
.height = 720,
.data = imx290_720p_settings,
.data_size = ARRAY_SIZE(imx290_720p_settings),
.pixel_rate = 178200000,
.link_freq_index = 0,
},
};
static inline struct imx290 *to_imx290(struct v4l2_subdev *_sd)
{
return container_of(_sd, struct imx290, sd);
}
static inline int imx290_read_reg(struct imx290 *imx290, u16 addr, u8 *value)
{
unsigned int regval;
int ret;
ret = regmap_read(imx290->regmap, addr, &regval);
if (ret) {
dev_err(imx290->dev, "I2C read failed for addr: %x\n", addr);
return ret;
}
*value = regval & 0xff;
return 0;
}
static int imx290_write_reg(struct imx290 *imx290, u16 addr, u8 value)
{
int ret;
ret = regmap_write(imx290->regmap, addr, value);
if (ret) {
dev_err(imx290->dev, "I2C write failed for addr: %x\n", addr);
return ret;
}
return ret;
}
static int imx290_set_register_array(struct imx290 *imx290,
const struct imx290_regval *settings,
unsigned int num_settings)
{
unsigned int i;
int ret;
for (i = 0; i < num_settings; ++i, ++settings) {
ret = imx290_write_reg(imx290, settings->reg, settings->val);
if (ret < 0)
return ret;
/* Settle time is 10ms for all registers */
msleep(10);
}
return 0;
}
static int imx290_write_buffered_reg(struct imx290 *imx290, u16 address_low,
u8 nr_regs, u32 value)
{
unsigned int i;
int ret;
ret = imx290_write_reg(imx290, IMX290_REGHOLD, 0x01);
if (ret) {
dev_err(imx290->dev, "Error setting hold register\n");
return ret;
}
for (i = 0; i < nr_regs; i++) {
ret = imx290_write_reg(imx290, address_low + i,
(u8)(value >> (i * 8)));
if (ret) {
dev_err(imx290->dev, "Error writing buffered registers\n");
return ret;
}
}
ret = imx290_write_reg(imx290, IMX290_REGHOLD, 0x00);
if (ret) {
dev_err(imx290->dev, "Error setting hold register\n");
return ret;
}
return ret;
}
static int imx290_set_gain(struct imx290 *imx290, u32 value)
{
int ret;
ret = imx290_write_buffered_reg(imx290, IMX290_GAIN, 1, value);
if (ret)
dev_err(imx290->dev, "Unable to write gain\n");
return ret;
}
/* Stop streaming */
static int imx290_stop_streaming(struct imx290 *imx290)
{
int ret;
ret = imx290_write_reg(imx290, IMX290_STANDBY, 0x01);
if (ret < 0)
return ret;
msleep(30);
return imx290_write_reg(imx290, IMX290_XMSTA, 0x01);
}
static int imx290_set_ctrl(struct v4l2_ctrl *ctrl)
{
struct imx290 *imx290 = container_of(ctrl->handler,
struct imx290, ctrls);
int ret = 0;
/* V4L2 controls values will be applied only when power is already up */
if (!pm_runtime_get_if_in_use(imx290->dev))
return 0;
switch (ctrl->id) {
case V4L2_CID_GAIN:
ret = imx290_set_gain(imx290, ctrl->val);
break;
default:
ret = -EINVAL;
break;
}
pm_runtime_put(imx290->dev);
return ret;
}
static const struct v4l2_ctrl_ops imx290_ctrl_ops = {
.s_ctrl = imx290_set_ctrl,
};
static int imx290_enum_mbus_code(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_mbus_code_enum *code)
{
if (code->index >= ARRAY_SIZE(imx290_formats))
return -EINVAL;
code->code = imx290_formats[code->index].code;
return 0;
}
static int imx290_get_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *fmt)
{
struct imx290 *imx290 = to_imx290(sd);
struct v4l2_mbus_framefmt *framefmt;
mutex_lock(&imx290->lock);
if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
framefmt = v4l2_subdev_get_try_format(&imx290->sd, cfg,
fmt->pad);
else
framefmt = &imx290->current_format;
fmt->format = *framefmt;
mutex_unlock(&imx290->lock);
return 0;
}
static int imx290_set_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *fmt)
{
struct imx290 *imx290 = to_imx290(sd);
const struct imx290_mode *mode;
struct v4l2_mbus_framefmt *format;
unsigned int i;
mutex_lock(&imx290->lock);
mode = v4l2_find_nearest_size(imx290_modes,
ARRAY_SIZE(imx290_modes),
width, height,
fmt->format.width, fmt->format.height);
fmt->format.width = mode->width;
fmt->format.height = mode->height;
for (i = 0; i < ARRAY_SIZE(imx290_formats); i++)
if (imx290_formats[i].code == fmt->format.code)
break;
if (i >= ARRAY_SIZE(imx290_formats))
i = 0;
fmt->format.code = imx290_formats[i].code;
fmt->format.field = V4L2_FIELD_NONE;
if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
format = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
} else {
format = &imx290->current_format;
__v4l2_ctrl_s_ctrl(imx290->link_freq, mode->link_freq_index);
__v4l2_ctrl_s_ctrl_int64(imx290->pixel_rate, mode->pixel_rate);
imx290->current_mode = mode;
}
*format = fmt->format;
mutex_unlock(&imx290->lock);
return 0;
}
static int imx290_entity_init_cfg(struct v4l2_subdev *subdev,
struct v4l2_subdev_pad_config *cfg)
{
struct v4l2_subdev_format fmt = { 0 };
fmt.which = cfg ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
fmt.format.width = 1920;
fmt.format.height = 1080;
imx290_set_fmt(subdev, cfg, &fmt);
return 0;
}
static int imx290_write_current_format(struct imx290 *imx290,
struct v4l2_mbus_framefmt *format)
{
int ret;
switch (format->code) {
case MEDIA_BUS_FMT_SRGGB10_1X10:
ret = imx290_set_register_array(imx290, imx290_10bit_settings,
ARRAY_SIZE(
imx290_10bit_settings));
if (ret < 0) {
dev_err(imx290->dev, "Could not set format registers\n");
return ret;
}
break;
default:
dev_err(imx290->dev, "Unknown pixel format\n");
return -EINVAL;
}
return 0;
}
/* Start streaming */
static int imx290_start_streaming(struct imx290 *imx290)
{
int ret;
/* Set init register settings */
ret = imx290_set_register_array(imx290, imx290_global_init_settings,
ARRAY_SIZE(
imx290_global_init_settings));
if (ret < 0) {
dev_err(imx290->dev, "Could not set init registers\n");
return ret;
}
/* Set current frame format */
ret = imx290_write_current_format(imx290, &imx290->current_format);
if (ret < 0) {
dev_err(imx290->dev, "Could not set frame format\n");
return ret;
}
/* Apply default values of current mode */
ret = imx290_set_register_array(imx290, imx290->current_mode->data,
imx290->current_mode->data_size);
if (ret < 0) {
dev_err(imx290->dev, "Could not set current mode\n");
return ret;
}
/* Apply customized values from user */
ret = v4l2_ctrl_handler_setup(imx290->sd.ctrl_handler);
if (ret) {
dev_err(imx290->dev, "Could not sync v4l2 controls\n");
return ret;
}
ret = imx290_write_reg(imx290, IMX290_STANDBY, 0x00);
if (ret < 0)
return ret;
msleep(30);
/* Start streaming */
return imx290_write_reg(imx290, IMX290_XMSTA, 0x00);
}
static int imx290_set_stream(struct v4l2_subdev *sd, int enable)
{
struct imx290 *imx290 = to_imx290(sd);
int ret = 0;
if (enable) {
ret = pm_runtime_get_sync(imx290->dev);
if (ret < 0) {
pm_runtime_put_noidle(imx290->dev);
goto unlock_and_return;
}
ret = imx290_start_streaming(imx290);
if (ret) {
dev_err(imx290->dev, "Start stream failed\n");
pm_runtime_put(imx290->dev);
goto unlock_and_return;
}
} else {
imx290_stop_streaming(imx290);
pm_runtime_put(imx290->dev);
}
unlock_and_return:
return ret;
}
static int imx290_get_regulators(struct device *dev, struct imx290 *imx290)
{
unsigned int i;
for (i = 0; i < IMX290_NUM_SUPPLIES; i++)
imx290->supplies[i].supply = imx290_supply_name[i];
return devm_regulator_bulk_get(dev, IMX290_NUM_SUPPLIES,
imx290->supplies);
}
static int imx290_power_on(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct v4l2_subdev *sd = i2c_get_clientdata(client);
struct imx290 *imx290 = to_imx290(sd);
int ret;
ret = clk_prepare_enable(imx290->xclk);
if (ret) {
dev_err(imx290->dev, "Failed to enable clock\n");
return ret;
}
ret = regulator_bulk_enable(IMX290_NUM_SUPPLIES, imx290->supplies);
if (ret) {
dev_err(imx290->dev, "Failed to enable regulators\n");
clk_disable_unprepare(imx290->xclk);
return ret;
}
usleep_range(1, 2);
gpiod_set_value_cansleep(imx290->rst_gpio, 1);
usleep_range(30000, 31000);
return 0;
}
static int imx290_power_off(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct v4l2_subdev *sd = i2c_get_clientdata(client);
struct imx290 *imx290 = to_imx290(sd);
clk_disable_unprepare(imx290->xclk);
gpiod_set_value_cansleep(imx290->rst_gpio, 0);
regulator_bulk_disable(IMX290_NUM_SUPPLIES, imx290->supplies);
return 0;
}
static const struct dev_pm_ops imx290_pm_ops = {
SET_RUNTIME_PM_OPS(imx290_power_on, imx290_power_off, NULL)
};
static const struct v4l2_subdev_video_ops imx290_video_ops = {
.s_stream = imx290_set_stream,
};
static const struct v4l2_subdev_pad_ops imx290_pad_ops = {
.init_cfg = imx290_entity_init_cfg,
.enum_mbus_code = imx290_enum_mbus_code,
.get_fmt = imx290_get_fmt,
.set_fmt = imx290_set_fmt,
};
static const struct v4l2_subdev_ops imx290_subdev_ops = {
.video = &imx290_video_ops,
.pad = &imx290_pad_ops,
};
static const struct media_entity_operations imx290_subdev_entity_ops = {
.link_validate = v4l2_subdev_link_validate,
};
static int imx290_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct fwnode_handle *endpoint;
struct imx290 *imx290;
u32 xclk_freq;
int ret;
imx290 = devm_kzalloc(dev, sizeof(*imx290), GFP_KERNEL);
if (!imx290)
return -ENOMEM;
imx290->dev = dev;
imx290->regmap = devm_regmap_init_i2c(client, &imx290_regmap_config);
if (IS_ERR(imx290->regmap)) {
dev_err(dev, "Unable to initialize I2C\n");
return -ENODEV;
}
endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL);
if (!endpoint) {
dev_err(dev, "Endpoint node not found\n");
return -EINVAL;
}
ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &imx290->ep);
fwnode_handle_put(endpoint);
if (ret) {
dev_err(dev, "Parsing endpoint node failed\n");
goto free_err;
}
if (!imx290->ep.nr_of_link_frequencies) {
dev_err(dev, "link-frequency property not found in DT\n");
ret = -EINVAL;
goto free_err;
}
if (imx290->ep.link_frequencies[0] != IMX290_DEFAULT_LINK_FREQ) {
dev_err(dev, "Unsupported link frequency\n");
ret = -EINVAL;
goto free_err;
}
/* Only CSI2 is supported for now */
if (imx290->ep.bus_type != V4L2_MBUS_CSI2_DPHY) {
dev_err(dev, "Unsupported bus type, should be CSI2\n");
ret = -EINVAL;
goto free_err;
}
/* Set default mode to max resolution */
imx290->current_mode = &imx290_modes[0];
/* get system clock (xclk) */
imx290->xclk = devm_clk_get(dev, "xclk");
if (IS_ERR(imx290->xclk)) {
dev_err(dev, "Could not get xclk");
ret = PTR_ERR(imx290->xclk);
goto free_err;
}
ret = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency",
&xclk_freq);
if (ret) {
dev_err(dev, "Could not get xclk frequency\n");
goto free_err;
}
/* external clock must be 37.125 MHz */
if (xclk_freq != 37125000) {
dev_err(dev, "External clock frequency %u is not supported\n",
xclk_freq);
ret = -EINVAL;
goto free_err;
}
ret = clk_set_rate(imx290->xclk, xclk_freq);
if (ret) {
dev_err(dev, "Could not set xclk frequency\n");
goto free_err;
}
ret = imx290_get_regulators(dev, imx290);
if (ret < 0) {
dev_err(dev, "Cannot get regulators\n");
goto free_err;
}
imx290->rst_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_ASIS);
if (IS_ERR(imx290->rst_gpio)) {
dev_err(dev, "Cannot get reset gpio\n");
ret = PTR_ERR(imx290->rst_gpio);
goto free_err;
}
mutex_init(&imx290->lock);
v4l2_ctrl_handler_init(&imx290->ctrls, 3);
v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
V4L2_CID_GAIN, 0, 72, 1, 0);
imx290->link_freq =
v4l2_ctrl_new_int_menu(&imx290->ctrls,
&imx290_ctrl_ops,
V4L2_CID_LINK_FREQ,
ARRAY_SIZE(imx290_link_freq) - 1,
0, imx290_link_freq);
if (imx290->link_freq)
imx290->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
imx290->pixel_rate = v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
V4L2_CID_PIXEL_RATE, 1,
INT_MAX, 1,
imx290_modes[0].pixel_rate);
imx290->sd.ctrl_handler = &imx290->ctrls;
if (imx290->ctrls.error) {
dev_err(dev, "Control initialization error %d\n",
imx290->ctrls.error);
ret = imx290->ctrls.error;
goto free_ctrl;
}
v4l2_i2c_subdev_init(&imx290->sd, client, &imx290_subdev_ops);
imx290->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
imx290->sd.dev = &client->dev;
imx290->sd.entity.ops = &imx290_subdev_entity_ops;
imx290->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
imx290->pad.flags = MEDIA_PAD_FL_SOURCE;
ret = media_entity_pads_init(&imx290->sd.entity, 1, &imx290->pad);
if (ret < 0) {
dev_err(dev, "Could not register media entity\n");
goto free_ctrl;
}
ret = v4l2_async_register_subdev(&imx290->sd);
if (ret < 0) {
dev_err(dev, "Could not register v4l2 device\n");
goto free_entity;
}
/* Power on the device to match runtime PM state below */
ret = imx290_power_on(dev);
if (ret < 0) {
dev_err(dev, "Could not power on the device\n");
goto free_entity;
}
pm_runtime_set_active(dev);
pm_runtime_enable(dev);
pm_runtime_idle(dev);
v4l2_fwnode_endpoint_free(&imx290->ep);
return 0;
free_entity:
media_entity_cleanup(&imx290->sd.entity);
free_ctrl:
v4l2_ctrl_handler_free(&imx290->ctrls);
mutex_destroy(&imx290->lock);
free_err:
v4l2_fwnode_endpoint_free(&imx290->ep);
return ret;
}
static int imx290_remove(struct i2c_client *client)
{
struct v4l2_subdev *sd = i2c_get_clientdata(client);
struct imx290 *imx290 = to_imx290(sd);
v4l2_async_unregister_subdev(sd);
media_entity_cleanup(&sd->entity);
v4l2_ctrl_handler_free(sd->ctrl_handler);
mutex_destroy(&imx290->lock);
pm_runtime_disable(imx290->dev);
if (!pm_runtime_status_suspended(imx290->dev))
imx290_power_off(imx290->dev);
pm_runtime_set_suspended(imx290->dev);
return 0;
}
static const struct of_device_id imx290_of_match[] = {
{ .compatible = "sony,imx290" },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, imx290_of_match);
static struct i2c_driver imx290_i2c_driver = {
.probe_new = imx290_probe,
.remove = imx290_remove,
.driver = {
.name = "imx290",
.pm = &imx290_pm_ops,
.of_match_table = of_match_ptr(imx290_of_match),
},
};
module_i2c_driver(imx290_i2c_driver);
MODULE_DESCRIPTION("Sony IMX290 CMOS Image Sensor Driver");
MODULE_AUTHOR("FRAMOS GmbH");
MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>");
MODULE_LICENSE("GPL v2");

View File

@ -134,7 +134,7 @@ static int lm3646_set_ctrl(struct v4l2_ctrl *ctrl)
{
struct lm3646_flash *flash = to_lm3646_flash(ctrl);
unsigned int reg_val;
int rval = -EINVAL;
int rval;
switch (ctrl->id) {
case V4L2_CID_FLASH_LED_MODE:

View File

@ -591,7 +591,7 @@ static int max2175_set_lo_freq(struct max2175 *ctx, u32 lo_freq)
lo_freq *= lo_mult;
int_desired = lo_freq / ctx->xtal_freq;
frac_desired = div_u64((u64)(lo_freq % ctx->xtal_freq) << 20,
frac_desired = div64_ul((u64)(lo_freq % ctx->xtal_freq) << 20,
ctx->xtal_freq);
/* Check CSM is not busy */

View File

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0
*
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Maxim Integrated MAX2175 RF to Bits tuner driver
*
* This driver & most of the hard coded values are based on the reference

View File

@ -167,7 +167,7 @@ static int multi_reg_write(struct i2c_client *client,
static int mt9m001_init(struct i2c_client *client)
{
const struct mt9m001_reg init_regs[] = {
static const struct mt9m001_reg init_regs[] = {
/*
* Issue a soft reset. This returns all registers to their
* default values.

View File

@ -1,3 +1,4 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Omnivision OV2659 CMOS Image Sensor driver
*
@ -5,46 +6,21 @@
*
* Benoit Parrot <bparrot@ti.com>
* Lad, Prabhakar <prabhakar.csengg@gmail.com>
*
* This program is free software; you may redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/kernel.h>
#include <linux/media.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_graph.h>
#include <linux/slab.h>
#include <linux/uaccess.h>
#include <linux/videodev2.h>
#include <linux/pm_runtime.h>
#include <media/media-entity.h>
#include <media/i2c/ov2659.h>
#include <media/v4l2-common.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/v4l2-event.h>
#include <media/v4l2-fwnode.h>
#include <media/v4l2-image-sizes.h>
#include <media/v4l2-mediabus.h>
#include <media/v4l2-subdev.h>
#define DRIVER_NAME "ov2659"
@ -232,6 +208,10 @@ struct ov2659 {
struct sensor_register *format_ctrl_regs;
struct ov2659_pll_ctrl pll;
int streaming;
/* used to control the sensor PWDN pin */
struct gpio_desc *pwdn_gpio;
/* used to control the sensor RESETB pin */
struct gpio_desc *resetb_gpio;
};
static const struct sensor_register ov2659_init_regs[] = {
@ -419,10 +399,14 @@ static struct sensor_register ov2659_720p[] = {
{ REG_TIMING_YINC, 0x11 },
{ REG_TIMING_VERT_FORMAT, 0x80 },
{ REG_TIMING_HORIZ_FORMAT, 0x00 },
{ 0x370a, 0x12 },
{ 0x3a03, 0xe8 },
{ 0x3a09, 0x6f },
{ 0x3a0b, 0x5d },
{ 0x3a15, 0x9a },
{ REG_VFIFO_READ_START_H, 0x00 },
{ REG_VFIFO_READ_START_L, 0x80 },
{ REG_ISP_CTRL02, 0x00 },
{ REG_NULL, 0x00 },
};
@ -661,7 +645,7 @@ static struct sensor_register ov2659_vga[] = {
{ REG_TIMING_HORIZ_FORMAT, 0x01 },
{ 0x370a, 0x52 },
{ REG_VFIFO_READ_START_H, 0x00 },
{ REG_VFIFO_READ_START_L, 0x80 },
{ REG_VFIFO_READ_START_L, 0xa0 },
{ REG_ISP_CTRL02, 0x10 },
{ REG_NULL, 0x00 },
};
@ -709,7 +693,7 @@ static struct sensor_register ov2659_qvga[] = {
{ REG_TIMING_HORIZ_FORMAT, 0x01 },
{ 0x370a, 0x52 },
{ REG_VFIFO_READ_START_H, 0x00 },
{ REG_VFIFO_READ_START_L, 0x80 },
{ REG_VFIFO_READ_START_L, 0xa0 },
{ REG_ISP_CTRL02, 0x10 },
{ REG_NULL, 0x00 },
};
@ -1198,14 +1182,27 @@ static int ov2659_s_stream(struct v4l2_subdev *sd, int on)
/* Stop Streaming Sequence */
ov2659_set_streaming(ov2659, 0);
ov2659->streaming = on;
pm_runtime_put(&client->dev);
goto unlock;
}
ov2659_set_pixel_clock(ov2659);
ov2659_set_frame_size(ov2659);
ov2659_set_format(ov2659);
ret = pm_runtime_get_sync(&client->dev);
if (ret < 0) {
pm_runtime_put_noidle(&client->dev);
goto unlock;
}
ret = ov2659_init(sd, 0);
if (!ret)
ret = ov2659_set_pixel_clock(ov2659);
if (!ret)
ret = ov2659_set_frame_size(ov2659);
if (!ret)
ret = ov2659_set_format(ov2659);
if (!ret) {
ov2659_set_streaming(ov2659, 1);
ov2659->streaming = on;
}
unlock:
mutex_unlock(&ov2659->lock);
@ -1239,12 +1236,18 @@ static int ov2659_s_ctrl(struct v4l2_ctrl *ctrl)
{
struct ov2659 *ov2659 =
container_of(ctrl->handler, struct ov2659, ctrls);
struct i2c_client *client = ov2659->client;
/* V4L2 controls values will be applied only when power is already up */
if (!pm_runtime_get_if_in_use(&client->dev))
return 0;
switch (ctrl->id) {
case V4L2_CID_TEST_PATTERN:
return ov2659_set_test_pattern(ov2659, ctrl->val);
}
pm_runtime_put(&client->dev);
return 0;
}
@ -1257,6 +1260,39 @@ static const char * const ov2659_test_pattern_menu[] = {
"Vertical Color Bars",
};
static int ov2659_power_off(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct v4l2_subdev *sd = i2c_get_clientdata(client);
struct ov2659 *ov2659 = to_ov2659(sd);
dev_dbg(&client->dev, "%s:\n", __func__);
gpiod_set_value(ov2659->pwdn_gpio, 1);
return 0;
}
static int ov2659_power_on(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
struct v4l2_subdev *sd = i2c_get_clientdata(client);
struct ov2659 *ov2659 = to_ov2659(sd);
dev_dbg(&client->dev, "%s:\n", __func__);
gpiod_set_value(ov2659->pwdn_gpio, 0);
if (ov2659->resetb_gpio) {
gpiod_set_value(ov2659->resetb_gpio, 1);
usleep_range(500, 1000);
gpiod_set_value(ov2659->resetb_gpio, 0);
usleep_range(3000, 5000);
}
return 0;
}
/* -----------------------------------------------------------------------------
* V4L2 subdev internal operations
*/
@ -1330,13 +1366,13 @@ static int ov2659_detect(struct v4l2_subdev *sd)
unsigned short id;
id = OV265X_ID(pid, ver);
if (id != OV2659_ID)
if (id != OV2659_ID) {
dev_err(&client->dev,
"Sensor detection failed (%04X, %d)\n",
id, ret);
else {
ret = -ENODEV;
} else {
dev_info(&client->dev, "Found OV%04X sensor\n", id);
ret = ov2659_init(sd, 0);
}
}
@ -1413,6 +1449,18 @@ static int ov2659_probe(struct i2c_client *client)
ov2659->xvclk_frequency > 27000000)
return -EINVAL;
/* Optional gpio don't fail if not present */
ov2659->pwdn_gpio = devm_gpiod_get_optional(&client->dev, "powerdown",
GPIOD_OUT_LOW);
if (IS_ERR(ov2659->pwdn_gpio))
return PTR_ERR(ov2659->pwdn_gpio);
/* Optional gpio don't fail if not present */
ov2659->resetb_gpio = devm_gpiod_get_optional(&client->dev, "reset",
GPIOD_OUT_HIGH);
if (IS_ERR(ov2659->resetb_gpio))
return PTR_ERR(ov2659->resetb_gpio);
v4l2_ctrl_handler_init(&ov2659->ctrls, 2);
ov2659->link_frequency =
v4l2_ctrl_new_std(&ov2659->ctrls, &ov2659_ctrl_ops,
@ -1458,6 +1506,8 @@ static int ov2659_probe(struct i2c_client *client)
ov2659->frame_size = &ov2659_framesizes[2];
ov2659->format_ctrl_regs = ov2659_formats[0].format_ctrl_regs;
ov2659_power_on(&client->dev);
ret = ov2659_detect(sd);
if (ret < 0)
goto error;
@ -1471,10 +1521,15 @@ static int ov2659_probe(struct i2c_client *client)
dev_info(&client->dev, "%s sensor driver registered !!\n", sd->name);
pm_runtime_set_active(&client->dev);
pm_runtime_enable(&client->dev);
pm_runtime_idle(&client->dev);
return 0;
error:
v4l2_ctrl_handler_free(&ov2659->ctrls);
ov2659_power_off(&client->dev);
media_entity_cleanup(&sd->entity);
mutex_destroy(&ov2659->lock);
return ret;
@ -1490,9 +1545,18 @@ static int ov2659_remove(struct i2c_client *client)
media_entity_cleanup(&sd->entity);
mutex_destroy(&ov2659->lock);
pm_runtime_disable(&client->dev);
if (!pm_runtime_status_suspended(&client->dev))
ov2659_power_off(&client->dev);
pm_runtime_set_suspended(&client->dev);
return 0;
}
static const struct dev_pm_ops ov2659_pm_ops = {
SET_RUNTIME_PM_OPS(ov2659_power_off, ov2659_power_on, NULL)
};
static const struct i2c_device_id ov2659_id[] = {
{ "ov2659", 0 },
{ /* sentinel */ },
@ -1510,6 +1574,7 @@ MODULE_DEVICE_TABLE(of, ov2659_of_match);
static struct i2c_driver ov2659_i2c_driver = {
.driver = {
.name = DRIVER_NAME,
.pm = &ov2659_pm_ops,
.of_match_table = of_match_ptr(ov2659_of_match),
},
.probe_new = ov2659_probe,

View File

@ -193,6 +193,7 @@ struct ov5640_mode_info {
struct ov5640_ctrls {
struct v4l2_ctrl_handler handler;
struct v4l2_ctrl *pixel_rate;
struct {
struct v4l2_ctrl *auto_exp;
struct v4l2_ctrl *exposure;
@ -489,7 +490,6 @@ static const struct reg_value ov5640_setting_720P_1280_720[] = {
};
static const struct reg_value ov5640_setting_1080P_1920_1080[] = {
{0x3008, 0x42, 0, 0},
{0x3c07, 0x08, 0, 0},
{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
{0x3814, 0x11, 0, 0},
@ -517,7 +517,7 @@ static const struct reg_value ov5640_setting_1080P_1920_1080[] = {
{0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0},
{0x3a15, 0x60, 0, 0}, {0x4407, 0x04, 0, 0},
{0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0},
{0x4005, 0x1a, 0, 0}, {0x3008, 0x02, 0, 0},
{0x4005, 0x1a, 0, 0},
};
static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = {
@ -1611,9 +1611,24 @@ ov5640_find_mode(struct ov5640_dev *sensor, enum ov5640_frame_rate fr,
!(mode->hact == 640 && mode->vact == 480))
return NULL;
/* 2592x1944 only works at 15fps max */
if ((mode->hact == 2592 && mode->vact == 1944) &&
fr > OV5640_15_FPS)
return NULL;
return mode;
}
static u64 ov5640_calc_pixel_rate(struct ov5640_dev *sensor)
{
u64 rate;
rate = sensor->current_mode->vtot * sensor->current_mode->htot;
rate *= ov5640_framerates[sensor->current_fr];
return rate;
}
/*
* sensor changes between scaling and subsampling, go through
* exposure calculation
@ -1818,8 +1833,7 @@ static int ov5640_set_mode(struct ov5640_dev *sensor)
* All the formats we support have 16 bits per pixel, seems to require
* the same rate than YUV, so we can just use 16 bpp all the time.
*/
rate = mode->vtot * mode->htot * 16;
rate *= ov5640_framerates[sensor->current_fr];
rate = ov5640_calc_pixel_rate(sensor) * 16;
if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
rate = rate / sensor->ep.bus.mipi_csi2.num_data_lanes;
ret = ov5640_set_mipi_pclk(sensor, rate);
@ -2233,6 +2247,8 @@ static int ov5640_set_fmt(struct v4l2_subdev *sd,
if (mbus_fmt->code != sensor->fmt.code)
sensor->pending_fmt_change = true;
__v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate,
ov5640_calc_pixel_rate(sensor));
out:
mutex_unlock(&sensor->lock);
return ret;
@ -2657,6 +2673,11 @@ static int ov5640_init_controls(struct ov5640_dev *sensor)
/* we can use our own mutex for the ctrl lock */
hdl->lock = &sensor->lock;
/* Clock related controls */
ctrls->pixel_rate = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_PIXEL_RATE,
0, INT_MAX, 1,
ov5640_calc_pixel_rate(sensor));
/* Auto/manual white balance */
ctrls->auto_wb = v4l2_ctrl_new_std(hdl, ops,
V4L2_CID_AUTO_WHITE_BALANCE,
@ -2704,6 +2725,7 @@ static int ov5640_init_controls(struct ov5640_dev *sensor)
goto free_ctrls;
}
ctrls->pixel_rate->flags |= V4L2_CTRL_FLAG_READ_ONLY;
ctrls->gain->flags |= V4L2_CTRL_FLAG_VOLATILE;
ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE;
@ -2816,6 +2838,9 @@ static int ov5640_s_frame_interval(struct v4l2_subdev *sd,
sensor->frame_interval = fi->interval;
sensor->current_mode = mode;
sensor->pending_mode_change = true;
__v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate,
ov5640_calc_pixel_rate(sensor));
}
out:
mutex_unlock(&sensor->lock);

View File

@ -1325,7 +1325,7 @@ static int ov5695_probe(struct i2c_client *client,
goto err_power_off;
#endif
ret = v4l2_async_register_subdev(sd);
ret = v4l2_async_register_subdev_sensor_common(sd);
if (ret) {
dev_err(dev, "v4l2 async register subdev failed\n");
goto err_clean_entity;

View File

@ -124,12 +124,13 @@
#define DEF_AECH 0x4D
#define CLKRC_6MHz 0x00
#define CLKRC_8MHz 0x00
#define CLKRC_12MHz 0x40
#define CLKRC_16MHz 0x80
#define CLKRC_24MHz 0xc0
#define CLKRC_DIV_MASK 0x3f
#define GET_CLKRC_DIV(x) (((x) & CLKRC_DIV_MASK) + 1)
#define DEF_CLKRC 0x00
#define COMA_RESET BIT(7)
#define COMA_QCIF BIT(5)
@ -196,13 +197,33 @@ struct ov6650 {
struct v4l2_clk *clk;
bool half_scale; /* scale down output by 2 */
struct v4l2_rect rect; /* sensor cropping window */
unsigned long pclk_limit; /* from host */
unsigned long pclk_max; /* from resolution and format */
struct v4l2_fract tpf; /* as requested with s_frame_interval */
u32 code;
enum v4l2_colorspace colorspace;
};
struct ov6650_xclk {
unsigned long rate;
u8 clkrc;
};
static const struct ov6650_xclk ov6650_xclk[] = {
{
.rate = 8000000,
.clkrc = CLKRC_8MHz,
},
{
.rate = 12000000,
.clkrc = CLKRC_12MHz,
},
{
.rate = 16000000,
.clkrc = CLKRC_16MHz,
},
{
.rate = 24000000,
.clkrc = CLKRC_24MHz,
},
};
static u32 ov6650_codes[] = {
MEDIA_BUS_FMT_YUYV8_2X8,
@ -213,6 +234,17 @@ static u32 ov6650_codes[] = {
MEDIA_BUS_FMT_Y8_1X8,
};
static const struct v4l2_mbus_framefmt ov6650_def_fmt = {
.width = W_CIF,
.height = H_CIF,
.code = MEDIA_BUS_FMT_SBGGR8_1X8,
.colorspace = V4L2_COLORSPACE_SRGB,
.field = V4L2_FIELD_NONE,
.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT,
.quantization = V4L2_QUANTIZATION_DEFAULT,
.xfer_func = V4L2_XFER_FUNC_DEFAULT,
};
/* read a register */
static int ov6650_reg_read(struct i2c_client *client, u8 reg, u8 *val)
{
@ -465,38 +497,39 @@ static int ov6650_set_selection(struct v4l2_subdev *sd,
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct ov6650 *priv = to_ov6650(client);
struct v4l2_rect rect = sel->r;
int ret;
if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE ||
sel->target != V4L2_SEL_TGT_CROP)
return -EINVAL;
v4l_bound_align_image(&rect.width, 2, W_CIF, 1,
&rect.height, 2, H_CIF, 1, 0);
v4l_bound_align_image(&rect.left, DEF_HSTRT << 1,
(DEF_HSTRT << 1) + W_CIF - (__s32)rect.width, 1,
&rect.top, DEF_VSTRT << 1,
(DEF_VSTRT << 1) + H_CIF - (__s32)rect.height, 1,
0);
v4l_bound_align_image(&sel->r.width, 2, W_CIF, 1,
&sel->r.height, 2, H_CIF, 1, 0);
v4l_bound_align_image(&sel->r.left, DEF_HSTRT << 1,
(DEF_HSTRT << 1) + W_CIF - (__s32)sel->r.width, 1,
&sel->r.top, DEF_VSTRT << 1,
(DEF_VSTRT << 1) + H_CIF - (__s32)sel->r.height,
1, 0);
ret = ov6650_reg_write(client, REG_HSTRT, rect.left >> 1);
ret = ov6650_reg_write(client, REG_HSTRT, sel->r.left >> 1);
if (!ret) {
priv->rect.left = rect.left;
priv->rect.width += priv->rect.left - sel->r.left;
priv->rect.left = sel->r.left;
ret = ov6650_reg_write(client, REG_HSTOP,
(rect.left + rect.width) >> 1);
(sel->r.left + sel->r.width) >> 1);
}
if (!ret) {
priv->rect.width = rect.width;
ret = ov6650_reg_write(client, REG_VSTRT, rect.top >> 1);
priv->rect.width = sel->r.width;
ret = ov6650_reg_write(client, REG_VSTRT, sel->r.top >> 1);
}
if (!ret) {
priv->rect.top = rect.top;
priv->rect.height += priv->rect.top - sel->r.top;
priv->rect.top = sel->r.top;
ret = ov6650_reg_write(client, REG_VSTOP,
(rect.top + rect.height) >> 1);
(sel->r.top + sel->r.height) >> 1);
}
if (!ret)
priv->rect.height = rect.height;
priv->rect.height = sel->r.height;
return ret;
}
@ -512,12 +545,20 @@ static int ov6650_get_fmt(struct v4l2_subdev *sd,
if (format->pad)
return -EINVAL;
/* initialize response with default media bus frame format */
*mf = ov6650_def_fmt;
/* update media bus format code and frame size */
if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
mf->width = cfg->try_fmt.width;
mf->height = cfg->try_fmt.height;
mf->code = cfg->try_fmt.code;
} else {
mf->width = priv->rect.width >> priv->half_scale;
mf->height = priv->rect.height >> priv->half_scale;
mf->code = priv->code;
mf->colorspace = priv->colorspace;
mf->field = V4L2_FIELD_NONE;
}
return 0;
}
@ -526,22 +567,7 @@ static bool is_unscaled_ok(int width, int height, struct v4l2_rect *rect)
return width > rect->width >> 1 || height > rect->height >> 1;
}
static u8 to_clkrc(struct v4l2_fract *timeperframe,
unsigned long pclk_limit, unsigned long pclk_max)
{
unsigned long pclk;
if (timeperframe->numerator && timeperframe->denominator)
pclk = pclk_max * timeperframe->denominator /
(FRAME_RATE_MAX * timeperframe->numerator);
else
pclk = pclk_max;
if (pclk_limit && pclk_limit < pclk)
pclk = pclk_limit;
return (pclk_max - 1) / pclk;
}
#define to_clkrc(div) ((div) - 1)
/* set the format we will capture in */
static int ov6650_s_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *mf)
@ -560,8 +586,7 @@ static int ov6650_s_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *mf)
.r.height = mf->height << half_scale,
};
u32 code = mf->code;
unsigned long mclk, pclk;
u8 coma_set = 0, coma_mask = 0, coml_set, coml_mask, clkrc;
u8 coma_set = 0, coma_mask = 0, coml_set, coml_mask;
int ret;
/* select color matrix configuration for given color encoding */
@ -610,58 +635,35 @@ static int ov6650_s_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *mf)
dev_err(&client->dev, "Pixel format not handled: 0x%x\n", code);
return -EINVAL;
}
priv->code = code;
if (code == MEDIA_BUS_FMT_Y8_1X8 ||
code == MEDIA_BUS_FMT_SBGGR8_1X8) {
coml_mask = COML_ONE_CHANNEL;
coml_set = 0;
priv->pclk_max = 4000000;
} else {
coml_mask = 0;
coml_set = COML_ONE_CHANNEL;
priv->pclk_max = 8000000;
}
if (code == MEDIA_BUS_FMT_SBGGR8_1X8)
priv->colorspace = V4L2_COLORSPACE_SRGB;
else if (code != 0)
priv->colorspace = V4L2_COLORSPACE_JPEG;
if (half_scale) {
dev_dbg(&client->dev, "max resolution: QCIF\n");
coma_set |= COMA_QCIF;
priv->pclk_max /= 2;
} else {
dev_dbg(&client->dev, "max resolution: CIF\n");
coma_mask |= COMA_QCIF;
}
priv->half_scale = half_scale;
clkrc = CLKRC_12MHz;
mclk = 12000000;
priv->pclk_limit = 1334000;
dev_dbg(&client->dev, "using 12MHz input clock\n");
clkrc |= to_clkrc(&priv->tpf, priv->pclk_limit, priv->pclk_max);
pclk = priv->pclk_max / GET_CLKRC_DIV(clkrc);
dev_dbg(&client->dev, "pixel clock divider: %ld.%ld\n",
mclk / pclk, 10 * mclk % pclk / pclk);
ret = ov6650_set_selection(sd, NULL, &sel);
if (!ret)
ret = ov6650_reg_rmw(client, REG_COMA, coma_set, coma_mask);
if (!ret)
ret = ov6650_reg_write(client, REG_CLKRC, clkrc);
if (!ret)
ret = ov6650_reg_rmw(client, REG_COML, coml_set, coml_mask);
if (!ret) {
mf->colorspace = priv->colorspace;
mf->width = priv->rect.width >> half_scale;
mf->height = priv->rect.height >> half_scale;
priv->half_scale = half_scale;
ret = ov6650_reg_rmw(client, REG_COML, coml_set, coml_mask);
}
if (!ret)
priv->code = code;
return ret;
}
@ -680,8 +682,6 @@ static int ov6650_set_fmt(struct v4l2_subdev *sd,
v4l_bound_align_image(&mf->width, 2, W_CIF, 1,
&mf->height, 2, H_CIF, 1, 0);
mf->field = V4L2_FIELD_NONE;
switch (mf->code) {
case MEDIA_BUS_FMT_Y10_1X10:
mf->code = MEDIA_BUS_FMT_Y8_1X8;
@ -691,20 +691,39 @@ static int ov6650_set_fmt(struct v4l2_subdev *sd,
case MEDIA_BUS_FMT_YUYV8_2X8:
case MEDIA_BUS_FMT_VYUY8_2X8:
case MEDIA_BUS_FMT_UYVY8_2X8:
mf->colorspace = V4L2_COLORSPACE_JPEG;
break;
default:
mf->code = MEDIA_BUS_FMT_SBGGR8_1X8;
/* fall through */
case MEDIA_BUS_FMT_SBGGR8_1X8:
mf->colorspace = V4L2_COLORSPACE_SRGB;
break;
}
if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE)
return ov6650_s_fmt(sd, mf);
cfg->try_fmt = *mf;
if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
/* store media bus format code and frame size in pad config */
cfg->try_fmt.width = mf->width;
cfg->try_fmt.height = mf->height;
cfg->try_fmt.code = mf->code;
/* return default mbus frame format updated with pad config */
*mf = ov6650_def_fmt;
mf->width = cfg->try_fmt.width;
mf->height = cfg->try_fmt.height;
mf->code = cfg->try_fmt.code;
} else {
/* apply new media bus format code and frame size */
int ret = ov6650_s_fmt(sd, mf);
if (ret)
return ret;
/* return default format updated with active size and code */
*mf = ov6650_def_fmt;
mf->width = priv->rect.width >> priv->half_scale;
mf->height = priv->rect.height >> priv->half_scale;
mf->code = priv->code;
}
return 0;
}
@ -725,9 +744,7 @@ static int ov6650_g_frame_interval(struct v4l2_subdev *sd,
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct ov6650 *priv = to_ov6650(client);
ival->interval.numerator = GET_CLKRC_DIV(to_clkrc(&priv->tpf,
priv->pclk_limit, priv->pclk_max));
ival->interval.denominator = FRAME_RATE_MAX;
ival->interval = priv->tpf;
dev_dbg(&client->dev, "Frame interval: %u/%u s\n",
ival->interval.numerator, ival->interval.denominator);
@ -742,7 +759,6 @@ static int ov6650_s_frame_interval(struct v4l2_subdev *sd,
struct ov6650 *priv = to_ov6650(client);
struct v4l2_fract *tpf = &ival->interval;
int div, ret;
u8 clkrc;
if (tpf->numerator == 0 || tpf->denominator == 0)
div = 1; /* Reset to full rate */
@ -754,19 +770,12 @@ static int ov6650_s_frame_interval(struct v4l2_subdev *sd,
else if (div > GET_CLKRC_DIV(CLKRC_DIV_MASK))
div = GET_CLKRC_DIV(CLKRC_DIV_MASK);
/*
* Keep result to be used as tpf limit
* for subsequent clock divider calculations
*/
ret = ov6650_reg_rmw(client, REG_CLKRC, to_clkrc(div), CLKRC_DIV_MASK);
if (!ret) {
priv->tpf.numerator = div;
priv->tpf.denominator = FRAME_RATE_MAX;
clkrc = to_clkrc(&priv->tpf, priv->pclk_limit, priv->pclk_max);
ret = ov6650_reg_rmw(client, REG_CLKRC, clkrc, CLKRC_DIV_MASK);
if (!ret) {
tpf->numerator = GET_CLKRC_DIV(clkrc);
tpf->denominator = FRAME_RATE_MAX;
*tpf = priv->tpf;
}
return ret;
@ -788,13 +797,15 @@ static int ov6650_reset(struct i2c_client *client)
}
/* program default register values */
static int ov6650_prog_dflt(struct i2c_client *client)
static int ov6650_prog_dflt(struct i2c_client *client, u8 clkrc)
{
int ret;
dev_dbg(&client->dev, "initializing\n");
ret = ov6650_reg_write(client, REG_COMA, 0); /* ~COMA_RESET */
if (!ret)
ret = ov6650_reg_write(client, REG_CLKRC, clkrc);
if (!ret)
ret = ov6650_reg_rmw(client, REG_COMB, 0, COMB_BAND_FILTER);
@ -805,8 +816,10 @@ static int ov6650_video_probe(struct v4l2_subdev *sd)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct ov6650 *priv = to_ov6650(client);
const struct ov6650_xclk *xclk = NULL;
unsigned long rate;
u8 pidh, pidl, midh, midl;
int ret;
int i, ret = 0;
priv->clk = v4l2_clk_get(&client->dev, NULL);
if (IS_ERR(priv->clk)) {
@ -815,6 +828,33 @@ static int ov6650_video_probe(struct v4l2_subdev *sd)
return ret;
}
rate = v4l2_clk_get_rate(priv->clk);
for (i = 0; rate && i < ARRAY_SIZE(ov6650_xclk); i++) {
if (rate != ov6650_xclk[i].rate)
continue;
xclk = &ov6650_xclk[i];
dev_info(&client->dev, "using host default clock rate %lukHz\n",
rate / 1000);
break;
}
for (i = 0; !xclk && i < ARRAY_SIZE(ov6650_xclk); i++) {
ret = v4l2_clk_set_rate(priv->clk, ov6650_xclk[i].rate);
if (ret || v4l2_clk_get_rate(priv->clk) != ov6650_xclk[i].rate)
continue;
xclk = &ov6650_xclk[i];
dev_info(&client->dev, "using negotiated clock rate %lukHz\n",
xclk->rate / 1000);
break;
}
if (!xclk) {
dev_err(&client->dev, "unable to get supported clock rate\n");
if (!ret)
ret = -EINVAL;
goto eclkput;
}
ret = ov6650_s_power(sd, 1);
if (ret < 0)
goto eclkput;
@ -848,7 +888,12 @@ static int ov6650_video_probe(struct v4l2_subdev *sd)
ret = ov6650_reset(client);
if (!ret)
ret = ov6650_prog_dflt(client);
ret = ov6650_prog_dflt(client, xclk->clkrc);
if (!ret) {
struct v4l2_mbus_framefmt mf = ov6650_def_fmt;
ret = ov6650_s_fmt(sd, &mf);
}
if (!ret)
ret = v4l2_ctrl_handler_setup(&priv->hdl);
@ -989,8 +1034,10 @@ static int ov6650_probe(struct i2c_client *client,
V4L2_CID_GAMMA, 0, 0xff, 1, 0x12);
priv->subdev.ctrl_handler = &priv->hdl;
if (priv->hdl.error)
return priv->hdl.error;
if (priv->hdl.error) {
ret = priv->hdl.error;
goto ectlhdlfree;
}
v4l2_ctrl_auto_cluster(2, &priv->autogain, 0, true);
v4l2_ctrl_auto_cluster(3, &priv->autowb, 0, true);
@ -1001,14 +1048,17 @@ static int ov6650_probe(struct i2c_client *client,
priv->rect.top = DEF_VSTRT << 1;
priv->rect.width = W_CIF;
priv->rect.height = H_CIF;
priv->half_scale = false;
priv->code = MEDIA_BUS_FMT_YUYV8_2X8;
priv->colorspace = V4L2_COLORSPACE_JPEG;
/* Hardware default frame interval */
priv->tpf.numerator = GET_CLKRC_DIV(DEF_CLKRC);
priv->tpf.denominator = FRAME_RATE_MAX;
priv->subdev.internal_ops = &ov6650_internal_ops;
ret = v4l2_async_register_subdev(&priv->subdev);
if (ret)
if (!ret)
return 0;
ectlhdlfree:
v4l2_ctrl_handler_free(&priv->hdl);
return ret;
@ -1041,6 +1091,6 @@ static struct i2c_driver ov6650_i2c_driver = {
module_i2c_driver(ov6650_i2c_driver);
MODULE_DESCRIPTION("SoC Camera driver for OmniVision OV6650");
MODULE_AUTHOR("Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>");
MODULE_DESCRIPTION("V4L2 subdevice driver for OmniVision OV6650 camera sensor");
MODULE_AUTHOR("Janusz Krzysztofik <jmkrzyszt@gmail.com");
MODULE_LICENSE("GPL v2");

View File

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* SPDX-License-Identifier: GPL-2.0+
* saa711x - Philips SAA711x video decoder register specifications
*
* Copyright (c) 2006 Mauro Carvalho Chehab <mchehab@kernel.org>

View File

@ -682,66 +682,6 @@ static int smiapp_get_all_limits(struct smiapp_sensor *sensor)
return 0;
}
static int smiapp_get_limits_binning(struct smiapp_sensor *sensor)
{
struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
static u32 const limits[] = {
SMIAPP_LIMIT_MIN_FRAME_LENGTH_LINES_BIN,
SMIAPP_LIMIT_MAX_FRAME_LENGTH_LINES_BIN,
SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK_BIN,
SMIAPP_LIMIT_MAX_LINE_LENGTH_PCK_BIN,
SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK_BIN,
SMIAPP_LIMIT_FINE_INTEGRATION_TIME_MIN_BIN,
SMIAPP_LIMIT_FINE_INTEGRATION_TIME_MAX_MARGIN_BIN,
};
static u32 const limits_replace[] = {
SMIAPP_LIMIT_MIN_FRAME_LENGTH_LINES,
SMIAPP_LIMIT_MAX_FRAME_LENGTH_LINES,
SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK,
SMIAPP_LIMIT_MAX_LINE_LENGTH_PCK,
SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK,
SMIAPP_LIMIT_FINE_INTEGRATION_TIME_MIN,
SMIAPP_LIMIT_FINE_INTEGRATION_TIME_MAX_MARGIN,
};
unsigned int i;
int rval;
if (sensor->limits[SMIAPP_LIMIT_BINNING_CAPABILITY] ==
SMIAPP_BINNING_CAPABILITY_NO) {
for (i = 0; i < ARRAY_SIZE(limits); i++)
sensor->limits[limits[i]] =
sensor->limits[limits_replace[i]];
return 0;
}
rval = smiapp_get_limits(sensor, limits, ARRAY_SIZE(limits));
if (rval < 0)
return rval;
/*
* Sanity check whether the binning limits are valid. If not,
* use the non-binning ones.
*/
if (sensor->limits[SMIAPP_LIMIT_MIN_FRAME_LENGTH_LINES_BIN]
&& sensor->limits[SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK_BIN]
&& sensor->limits[SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK_BIN])
return 0;
for (i = 0; i < ARRAY_SIZE(limits); i++) {
dev_dbg(&client->dev,
"replace limit 0x%8.8x \"%s\" = %d, 0x%x\n",
smiapp_reg_limits[limits[i]].addr,
smiapp_reg_limits[limits[i]].what,
sensor->limits[limits_replace[i]],
sensor->limits[limits_replace[i]]);
sensor->limits[limits[i]] =
sensor->limits[limits_replace[i]];
}
return 0;
}
static int smiapp_get_mbus_formats(struct smiapp_sensor *sensor)
{
struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
@ -891,60 +831,47 @@ static void smiapp_update_blanking(struct smiapp_sensor *sensor)
{
struct v4l2_ctrl *vblank = sensor->vblank;
struct v4l2_ctrl *hblank = sensor->hblank;
uint16_t min_fll, max_fll, min_llp, max_llp, min_lbp;
int min, max;
if (sensor->binning_vertical > 1 || sensor->binning_horizontal > 1) {
min_fll = sensor->limits[SMIAPP_LIMIT_MIN_FRAME_LENGTH_LINES_BIN];
max_fll = sensor->limits[SMIAPP_LIMIT_MAX_FRAME_LENGTH_LINES_BIN];
min_llp = sensor->limits[SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK_BIN];
max_llp = sensor->limits[SMIAPP_LIMIT_MAX_LINE_LENGTH_PCK_BIN];
min_lbp = sensor->limits[SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK_BIN];
} else {
min_fll = sensor->limits[SMIAPP_LIMIT_MIN_FRAME_LENGTH_LINES];
max_fll = sensor->limits[SMIAPP_LIMIT_MAX_FRAME_LENGTH_LINES];
min_llp = sensor->limits[SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK];
max_llp = sensor->limits[SMIAPP_LIMIT_MAX_LINE_LENGTH_PCK];
min_lbp = sensor->limits[SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK];
}
min = max_t(int,
sensor->limits[SMIAPP_LIMIT_MIN_FRAME_BLANKING_LINES],
sensor->limits[SMIAPP_LIMIT_MIN_FRAME_LENGTH_LINES_BIN] -
min_fll -
sensor->pixel_array->crop[SMIAPP_PA_PAD_SRC].height);
max = sensor->limits[SMIAPP_LIMIT_MAX_FRAME_LENGTH_LINES_BIN] -
sensor->pixel_array->crop[SMIAPP_PA_PAD_SRC].height;
max = max_fll - sensor->pixel_array->crop[SMIAPP_PA_PAD_SRC].height;
__v4l2_ctrl_modify_range(vblank, min, max, vblank->step, min);
min = max_t(int,
sensor->limits[SMIAPP_LIMIT_MIN_LINE_LENGTH_PCK_BIN] -
min_llp -
sensor->pixel_array->crop[SMIAPP_PA_PAD_SRC].width,
sensor->limits[SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK_BIN]);
max = sensor->limits[SMIAPP_LIMIT_MAX_LINE_LENGTH_PCK_BIN] -
sensor->pixel_array->crop[SMIAPP_PA_PAD_SRC].width;
min_lbp);
max = max_llp - sensor->pixel_array->crop[SMIAPP_PA_PAD_SRC].width;
__v4l2_ctrl_modify_range(hblank, min, max, hblank->step, min);
__smiapp_update_exposure_limits(sensor);
}
static int smiapp_update_mode(struct smiapp_sensor *sensor)
static int smiapp_pll_blanking_update(struct smiapp_sensor *sensor)
{
struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
unsigned int binning_mode;
int rval;
/* Binning has to be set up here; it affects limits */
if (sensor->binning_horizontal == 1 &&
sensor->binning_vertical == 1) {
binning_mode = 0;
} else {
u8 binning_type =
(sensor->binning_horizontal << 4)
| sensor->binning_vertical;
rval = smiapp_write(
sensor, SMIAPP_REG_U8_BINNING_TYPE, binning_type);
if (rval < 0)
return rval;
binning_mode = 1;
}
rval = smiapp_write(sensor, SMIAPP_REG_U8_BINNING_MODE, binning_mode);
if (rval < 0)
return rval;
/* Get updated limits due to binning */
rval = smiapp_get_limits_binning(sensor);
if (rval < 0)
return rval;
rval = smiapp_pll_update(sensor);
if (rval < 0)
return rval;
@ -970,62 +897,91 @@ static int smiapp_update_mode(struct smiapp_sensor *sensor)
* SMIA++ NVM handling
*
*/
static int smiapp_read_nvm(struct smiapp_sensor *sensor,
unsigned char *nvm)
{
u32 i, s, p, np, v;
int rval = 0, rval2;
np = sensor->nvm_size / SMIAPP_NVM_PAGE_SIZE;
for (p = 0; p < np; p++) {
rval = smiapp_write(
sensor,
SMIAPP_REG_U8_DATA_TRANSFER_IF_1_PAGE_SELECT, p);
if (rval)
goto out;
static int smiapp_read_nvm_page(struct smiapp_sensor *sensor, u32 p, u8 *nvm,
u8 *status)
{
unsigned int i;
int rval;
u32 s;
*status = 0;
rval = smiapp_write(sensor,
SMIAPP_REG_U8_DATA_TRANSFER_IF_1_CTRL,
SMIAPP_DATA_TRANSFER_IF_1_CTRL_EN |
SMIAPP_DATA_TRANSFER_IF_1_CTRL_RD_EN);
SMIAPP_REG_U8_DATA_TRANSFER_IF_1_PAGE_SELECT, p);
if (rval)
goto out;
return rval;
rval = smiapp_write(sensor, SMIAPP_REG_U8_DATA_TRANSFER_IF_1_CTRL,
SMIAPP_DATA_TRANSFER_IF_1_CTRL_EN);
if (rval)
return rval;
rval = smiapp_read(sensor, SMIAPP_REG_U8_DATA_TRANSFER_IF_1_STATUS,
&s);
if (rval)
return rval;
if (s & SMIAPP_DATA_TRANSFER_IF_1_STATUS_EUSAGE) {
*status = s;
return -ENODATA;
}
if (sensor->limits[SMIAPP_LIMIT_DATA_TRANSFER_IF_CAPABILITY] &
SMIAPP_DATA_TRANSFER_IF_CAPABILITY_POLL) {
for (i = 1000; i > 0; i--) {
rval = smiapp_read(
sensor,
SMIAPP_REG_U8_DATA_TRANSFER_IF_1_STATUS, &s);
if (rval)
goto out;
if (s & SMIAPP_DATA_TRANSFER_IF_1_STATUS_RD_READY)
break;
rval = smiapp_read(
sensor,
SMIAPP_REG_U8_DATA_TRANSFER_IF_1_STATUS,
&s);
if (rval)
return rval;
}
if (!i) {
rval = -ETIMEDOUT;
goto out;
if (!i)
return -ETIMEDOUT;
}
for (i = 0; i < SMIAPP_NVM_PAGE_SIZE; i++) {
rval = smiapp_read(
sensor,
u32 v;
rval = smiapp_read(sensor,
SMIAPP_REG_U8_DATA_TRANSFER_IF_1_DATA_0 + i,
&v);
if (rval)
goto out;
return rval;
*nvm++ = v;
}
return 0;
}
static int smiapp_read_nvm(struct smiapp_sensor *sensor, unsigned char *nvm,
size_t nvm_size)
{
u8 status = 0;
u32 p;
int rval = 0, rval2;
for (p = 0; p < nvm_size / SMIAPP_NVM_PAGE_SIZE && !rval; p++) {
rval = smiapp_read_nvm_page(sensor, p, nvm, &status);
nvm += SMIAPP_NVM_PAGE_SIZE;
}
out:
if (rval == -ENODATA &&
status & SMIAPP_DATA_TRANSFER_IF_1_STATUS_EUSAGE)
rval = 0;
rval2 = smiapp_write(sensor, SMIAPP_REG_U8_DATA_TRANSFER_IF_1_CTRL, 0);
if (rval < 0)
return rval;
else
return rval2;
return rval2 ?: p * SMIAPP_NVM_PAGE_SIZE;
}
/*
@ -1324,10 +1280,6 @@ static int smiapp_power_on(struct device *dev)
rval = __v4l2_ctrl_handler_setup(&sensor->src->ctrl_handler);
if (rval)
goto out_cci_addr_fail;
rval = smiapp_update_mode(sensor);
if (rval < 0)
goto out_cci_addr_fail;
}
mutex_unlock(&sensor->mutex);
@ -1387,6 +1339,7 @@ static int smiapp_power_off(struct device *dev)
static int smiapp_start_streaming(struct smiapp_sensor *sensor)
{
struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
unsigned int binning_mode;
int rval;
mutex_lock(&sensor->mutex);
@ -1397,6 +1350,27 @@ static int smiapp_start_streaming(struct smiapp_sensor *sensor)
if (rval)
goto out;
/* Binning configuration */
if (sensor->binning_horizontal == 1 &&
sensor->binning_vertical == 1) {
binning_mode = 0;
} else {
u8 binning_type =
(sensor->binning_horizontal << 4)
| sensor->binning_vertical;
rval = smiapp_write(
sensor, SMIAPP_REG_U8_BINNING_TYPE, binning_type);
if (rval < 0)
goto out;
binning_mode = 1;
}
rval = smiapp_write(sensor, SMIAPP_REG_U8_BINNING_MODE, binning_mode);
if (rval < 0)
goto out;
/* Set up PLL */
rval = smiapp_pll_configure(sensor);
if (rval)
goto out;
@ -2073,7 +2047,7 @@ static int smiapp_set_compose(struct v4l2_subdev *subdev,
smiapp_propagate(subdev, cfg, sel->which, V4L2_SEL_TGT_COMPOSE);
if (sel->which == V4L2_SUBDEV_FORMAT_ACTIVE)
return smiapp_update_mode(sensor);
return smiapp_pll_blanking_update(sensor);
return 0;
}
@ -2312,41 +2286,34 @@ smiapp_sysfs_nvm_read(struct device *dev, struct device_attribute *attr,
struct v4l2_subdev *subdev = i2c_get_clientdata(to_i2c_client(dev));
struct i2c_client *client = v4l2_get_subdevdata(subdev);
struct smiapp_sensor *sensor = to_smiapp_sensor(subdev);
unsigned int nbytes;
int rval;
if (!sensor->dev_init_done)
return -EBUSY;
if (!sensor->nvm_size) {
int rval;
/* NVM not read yet - read it now */
sensor->nvm_size = sensor->hwcfg->nvm_size;
rval = pm_runtime_get_sync(&client->dev);
if (rval < 0) {
if (rval != -EBUSY && rval != -EAGAIN)
pm_runtime_set_active(&client->dev);
pm_runtime_put(&client->dev);
pm_runtime_put_noidle(&client->dev);
return -ENODEV;
}
if (smiapp_read_nvm(sensor, sensor->nvm)) {
rval = smiapp_read_nvm(sensor, buf, PAGE_SIZE);
if (rval < 0) {
pm_runtime_put(&client->dev);
dev_err(&client->dev, "nvm read failed\n");
return -ENODEV;
}
pm_runtime_mark_last_busy(&client->dev);
pm_runtime_put_autosuspend(&client->dev);
}
/*
* NVM is still way below a PAGE_SIZE, so we can safely
* assume this for now.
*/
nbytes = min_t(unsigned int, sensor->nvm_size, PAGE_SIZE);
memcpy(buf, sensor->nvm, nbytes);
return nbytes;
return rval;
}
static DEVICE_ATTR(nvm, S_IRUGO, smiapp_sysfs_nvm_read, NULL);
@ -2810,16 +2777,13 @@ static struct smiapp_hwconfig *smiapp_get_hwconfig(struct device *dev)
}
}
/* NVM size is not mandatory */
fwnode_property_read_u32(fwnode, "nokia,nvm-size", &hwcfg->nvm_size);
rval = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency",
&hwcfg->ext_clk);
if (rval)
dev_info(dev, "can't get clock-frequency\n");
dev_dbg(dev, "nvm %d, clk %d, mode %d\n",
hwcfg->nvm_size, hwcfg->ext_clk, hwcfg->csi_signalling_mode);
dev_dbg(dev, "clk %d, mode %d\n", hwcfg->ext_clk,
hwcfg->csi_signalling_mode);
if (!bus_cfg.nr_of_link_frequencies) {
dev_warn(dev, "no link frequencies defined\n");
@ -2862,7 +2826,6 @@ static int smiapp_probe(struct i2c_client *client)
return -ENOMEM;
sensor->hwcfg = hwcfg;
mutex_init(&sensor->mutex);
sensor->src = &sensor->ssds[sensor->ssds_used];
v4l2_i2c_subdev_init(&sensor->src->sd, client, &smiapp_ops);
@ -2926,6 +2889,8 @@ static int smiapp_probe(struct i2c_client *client)
if (rval < 0)
return rval;
mutex_init(&sensor->mutex);
rval = smiapp_identify_module(sensor);
if (rval) {
rval = -ENODEV;
@ -3003,17 +2968,10 @@ static int smiapp_probe(struct i2c_client *client)
rval = -ENOENT;
goto out_power_off;
}
/* SMIA++ NVM initialization - it will be read from the sensor
* when it is first requested by userspace.
*/
if (sensor->minfo.smiapp_version && sensor->hwcfg->nvm_size) {
sensor->nvm = devm_kzalloc(&client->dev,
sensor->hwcfg->nvm_size, GFP_KERNEL);
if (sensor->nvm == NULL) {
rval = -ENOMEM;
goto out_cleanup;
}
if (sensor->minfo.smiapp_version &&
sensor->limits[SMIAPP_LIMIT_DATA_TRANSFER_IF_CAPABILITY] &
SMIAPP_DATA_TRANSFER_IF_CAPABILITY_SUPPORTED) {
if (device_create_file(&client->dev, &dev_attr_nvm) != 0) {
dev_err(&client->dev, "sysfs nvm entry failed\n");
rval = -EBUSY;
@ -3086,7 +3044,7 @@ static int smiapp_probe(struct i2c_client *client)
}
mutex_lock(&sensor->mutex);
rval = smiapp_update_mode(sensor);
rval = smiapp_pll_blanking_update(sensor);
mutex_unlock(&sensor->mutex);
if (rval) {
dev_err(&client->dev, "update mode failed\n");
@ -3101,19 +3059,23 @@ static int smiapp_probe(struct i2c_client *client)
if (rval < 0)
goto out_media_entity_cleanup;
rval = v4l2_async_register_subdev_sensor_common(&sensor->src->sd);
if (rval < 0)
goto out_media_entity_cleanup;
pm_runtime_set_active(&client->dev);
pm_runtime_get_noresume(&client->dev);
pm_runtime_enable(&client->dev);
rval = v4l2_async_register_subdev_sensor_common(&sensor->src->sd);
if (rval < 0)
goto out_disable_runtime_pm;
pm_runtime_set_autosuspend_delay(&client->dev, 1000);
pm_runtime_use_autosuspend(&client->dev);
pm_runtime_put_autosuspend(&client->dev);
return 0;
out_disable_runtime_pm:
pm_runtime_disable(&client->dev);
out_media_entity_cleanup:
media_entity_cleanup(&sensor->src->sd.entity);
@ -3122,6 +3084,7 @@ out_cleanup:
out_power_off:
smiapp_power_off(&client->dev);
mutex_destroy(&sensor->mutex);
return rval;
}
@ -3144,6 +3107,7 @@ static int smiapp_remove(struct i2c_client *client)
media_entity_cleanup(&sensor->ssds[i].sd.entity);
}
smiapp_cleanup(sensor);
mutex_destroy(&sensor->mutex);
return 0;
}

View File

@ -11,25 +11,29 @@
#ifndef __SMIAPP_REG_H_
#define __SMIAPP_REG_H_
#include <linux/bits.h>
#include "smiapp-reg-defs.h"
/* Bits for above register */
#define SMIAPP_IMAGE_ORIENTATION_HFLIP (1 << 0)
#define SMIAPP_IMAGE_ORIENTATION_VFLIP (1 << 1)
#define SMIAPP_IMAGE_ORIENTATION_HFLIP BIT(0)
#define SMIAPP_IMAGE_ORIENTATION_VFLIP BIT(1)
#define SMIAPP_DATA_TRANSFER_IF_1_CTRL_EN (1 << 0)
#define SMIAPP_DATA_TRANSFER_IF_1_CTRL_RD_EN (0 << 1)
#define SMIAPP_DATA_TRANSFER_IF_1_CTRL_WR_EN (1 << 1)
#define SMIAPP_DATA_TRANSFER_IF_1_CTRL_ERR_CLEAR (1 << 2)
#define SMIAPP_DATA_TRANSFER_IF_1_STATUS_RD_READY (1 << 0)
#define SMIAPP_DATA_TRANSFER_IF_1_STATUS_WR_READY (1 << 1)
#define SMIAPP_DATA_TRANSFER_IF_1_STATUS_EDATA (1 << 2)
#define SMIAPP_DATA_TRANSFER_IF_1_STATUS_EUSAGE (1 << 3)
#define SMIAPP_DATA_TRANSFER_IF_1_CTRL_EN BIT(0)
#define SMIAPP_DATA_TRANSFER_IF_1_CTRL_WR_EN BIT(1)
#define SMIAPP_DATA_TRANSFER_IF_1_CTRL_ERR_CLEAR BIT(2)
#define SMIAPP_DATA_TRANSFER_IF_1_STATUS_RD_READY BIT(0)
#define SMIAPP_DATA_TRANSFER_IF_1_STATUS_WR_READY BIT(1)
#define SMIAPP_DATA_TRANSFER_IF_1_STATUS_EDATA BIT(2)
#define SMIAPP_DATA_TRANSFER_IF_1_STATUS_EUSAGE BIT(3)
#define SMIAPP_SOFTWARE_RESET (1 << 0)
#define SMIAPP_DATA_TRANSFER_IF_CAPABILITY_SUPPORTED BIT(0)
#define SMIAPP_DATA_TRANSFER_IF_CAPABILITY_POLL BIT(2)
#define SMIAPP_FLASH_MODE_CAPABILITY_SINGLE_STROBE (1 << 0)
#define SMIAPP_FLASH_MODE_CAPABILITY_MULTIPLE_STROBE (1 << 1)
#define SMIAPP_SOFTWARE_RESET BIT(0)
#define SMIAPP_FLASH_MODE_CAPABILITY_SINGLE_STROBE BIT(0)
#define SMIAPP_FLASH_MODE_CAPABILITY_MULTIPLE_STROBE BIT(1)
#define SMIAPP_DPHY_CTRL_AUTOMATIC 0
/* DPHY control based on REQUESTED_LINK_BIT_RATE_MBPS */

View File

@ -208,9 +208,6 @@ struct smiapp_sensor {
bool dev_init_done;
u8 compressed_min_bpp;
u8 *nvm; /* nvm memory buffer */
unsigned int nvm_size; /* bytes */
struct smiapp_module_info minfo;
struct smiapp_pll pll;

View File

@ -971,6 +971,11 @@ static int mipid02_probe(struct i2c_client *client)
bridge->reset_gpio = devm_gpiod_get_optional(dev, "reset",
GPIOD_OUT_HIGH);
if (IS_ERR(bridge->reset_gpio)) {
dev_err(dev, "failed to get reset GPIO\n");
return PTR_ERR(bridge->reset_gpio);
}
ret = mipid02_get_regulators(bridge);
if (ret) {
dev_err(dev, "failed to get regulators %d", ret);

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: GPL-2.0
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2018 Gateworks Corporation
*/

View File

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* SPDX-License-Identifier: GPL-2.0
*
* tvp5150 - Texas Instruments TVP5150A/AM1 video decoder registers
*

View File

@ -375,7 +375,7 @@ static int vpx3220_s_routing(struct v4l2_subdev *sd,
input = 1: COMPOSITE input
input = 2: SVHS input */
const int input_vals[3][2] = {
static const int input_vals[3][2] = {
{0x0c, 0},
{0x0d, 0},
{0x0e, 1}

View File

@ -575,6 +575,38 @@ static void media_device_release(struct media_devnode *devnode)
dev_dbg(devnode->parent, "Media device released\n");
}
static void __media_device_unregister_entity(struct media_entity *entity)
{
struct media_device *mdev = entity->graph_obj.mdev;
struct media_link *link, *tmp;
struct media_interface *intf;
unsigned int i;
ida_free(&mdev->entity_internal_idx, entity->internal_idx);
/* Remove all interface links pointing to this entity */
list_for_each_entry(intf, &mdev->interfaces, graph_obj.list) {
list_for_each_entry_safe(link, tmp, &intf->links, list) {
if (link->entity == entity)
__media_remove_intf_link(link);
}
}
/* Remove all data links that belong to this entity */
__media_entity_remove_links(entity);
/* Remove all pads that belong to this entity */
for (i = 0; i < entity->num_pads; i++)
media_gobj_destroy(&entity->pads[i].graph_obj);
/* Remove the entity */
media_gobj_destroy(&entity->graph_obj);
/* invoke entity_notify callbacks to handle entity removal?? */
entity->graph_obj.mdev = NULL;
}
/**
* media_device_register_entity - Register an entity with a media device
* @mdev: The media device
@ -632,6 +664,7 @@ int __must_check media_device_register_entity(struct media_device *mdev,
*/
ret = media_graph_walk_init(&new, mdev);
if (ret) {
__media_device_unregister_entity(entity);
mutex_unlock(&mdev->graph_mutex);
return ret;
}
@ -644,38 +677,6 @@ int __must_check media_device_register_entity(struct media_device *mdev,
}
EXPORT_SYMBOL_GPL(media_device_register_entity);
static void __media_device_unregister_entity(struct media_entity *entity)
{
struct media_device *mdev = entity->graph_obj.mdev;
struct media_link *link, *tmp;
struct media_interface *intf;
unsigned int i;
ida_free(&mdev->entity_internal_idx, entity->internal_idx);
/* Remove all interface links pointing to this entity */
list_for_each_entry(intf, &mdev->interfaces, graph_obj.list) {
list_for_each_entry_safe(link, tmp, &intf->links, list) {
if (link->entity == entity)
__media_remove_intf_link(link);
}
}
/* Remove all data links that belong to this entity */
__media_entity_remove_links(entity);
/* Remove all pads that belong to this entity */
for (i = 0; i < entity->num_pads; i++)
media_gobj_destroy(&entity->pads[i].graph_obj);
/* Remove the entity */
media_gobj_destroy(&entity->graph_obj);
/* invoke entity_notify callbacks to handle entity removal?? */
entity->graph_obj.mdev = NULL;
}
void media_device_unregister_entity(struct media_entity *entity)
{
struct media_device *mdev = entity->graph_obj.mdev;

View File

@ -664,7 +664,7 @@ static int _cx18_process_idx_data(struct cx18_buffer *buf,
struct cx18_enc_idx_entry *e_buf;
/* Frame type lookup: 1=I, 2=P, 4=B */
const int mapping[8] = {
static const int mapping[8] = {
-1, V4L2_ENC_IDX_FRAME_I, V4L2_ENC_IDX_FRAME_P,
-1, V4L2_ENC_IDX_FRAME_B, -1, -1, -1
};

View File

@ -1167,8 +1167,11 @@ int cx23888_ir_probe(struct cx23885_dev *dev)
return -ENOMEM;
spin_lock_init(&state->rx_kfifo_lock);
if (kfifo_alloc(&state->rx_kfifo, CX23888_IR_RX_KFIFO_SIZE, GFP_KERNEL))
if (kfifo_alloc(&state->rx_kfifo, CX23888_IR_RX_KFIFO_SIZE,
GFP_KERNEL)) {
kfree(state);
return -ENOMEM;
}
state->dev = dev;
sd = &state->sd;

View File

@ -1781,6 +1781,41 @@ static const struct cx88_board cx88_boards[] = {
},
.mpeg = CX88_MPEG_DVB,
},
[CX88_BOARD_NOTONLYTV_LV3H] = {
.name = "NotOnlyTV LV3H",
.tuner_type = TUNER_XC2028,
.radio_type = UNSET,
.tuner_addr = 0x61,
.radio_addr = ADDR_UNSET,
/* if gpio1:bit9 is enabled, DVB-T won't work */
.input = { {
.type = CX88_VMUX_TELEVISION,
.vmux = 0,
.gpio0 = 0x0000,
.gpio1 = 0xa141,
.gpio2 = 0x0000,
}, {
.type = CX88_VMUX_COMPOSITE1,
.vmux = 1,
.gpio0 = 0x0000,
.gpio1 = 0xa161,
.gpio2 = 0x0000,
}, {
.type = CX88_VMUX_SVIDEO,
.vmux = 2,
.gpio0 = 0x0000,
.gpio1 = 0xa161,
.gpio2 = 0x0000,
} },
.radio = {
.type = CX88_RADIO,
.gpio0 = 0x0000,
.gpio1 = 0xa141,
.gpio2 = 0x0000,
},
.mpeg = CX88_MPEG_DVB,
},
[CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO] = {
.name = "DViCO FusionHDTV DVB-T PRO",
.tuner_type = TUNER_XC2028,
@ -2654,6 +2689,7 @@ static const struct cx88_subid cx88_subids[] = {
.subdevice = 0x6f18,
.card = CX88_BOARD_WINFAST_TV2000_XP_GLOBAL,
}, {
/* Also NotOnlyTV LV3H (version 1.11 is silkscreened on the board) */
.subvendor = 0x14f1,
.subdevice = 0x8852,
.card = CX88_BOARD_GENIATECH_X8000_MT,
@ -3121,6 +3157,7 @@ static int cx88_xc2028_tuner_callback(struct cx88_core *core,
case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
return cx88_dvico_xc2028_callback(core, command, arg);
case CX88_BOARD_NOTONLYTV_LV3H:
case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL:
case CX88_BOARD_WINFAST_DTV1800H:
return cx88_xc3028_winfast1800h_callback(core, command, arg);
@ -3322,6 +3359,7 @@ static void cx88_card_setup_pre_i2c(struct cx88_core *core)
udelay(1000);
break;
case CX88_BOARD_NOTONLYTV_LV3H:
case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL:
case CX88_BOARD_WINFAST_DTV1800H:
cx88_xc3028_winfast1800h_callback(core, XC2028_TUNER_RESET, 0);
@ -3378,6 +3416,11 @@ void cx88_setup_xc3028(struct cx88_core *core, struct xc2028_ctrl *ctl)
*/
ctl->disable_power_mgmt = 1;
break;
case CX88_BOARD_NOTONLYTV_LV3H:
ctl->demod = XC3028_FE_ZARLINK456;
ctl->fname = XC3028L_DEFAULT_FIRMWARE;
ctl->read_not_reliable = 1;
break;
case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL:
case CX88_BOARD_PROLINK_PV_GLOBAL_XTREME:
case CX88_BOARD_PROLINK_PV_8000GT:

View File

@ -1378,6 +1378,7 @@ static int dvb_register(struct cx8802_dev *dev)
fe->ops.tuner_ops.set_config(fe, &ctl);
}
break;
case CX88_BOARD_NOTONLYTV_LV3H:
case CX88_BOARD_PINNACLE_HYBRID_PCTV:
case CX88_BOARD_WINFAST_DTV1800H:
fe0->dvb.frontend = dvb_attach(zl10353_attach,

View File

@ -1277,7 +1277,7 @@ static int cx8800_initdev(struct pci_dev *pci_dev,
core = cx88_core_get(dev->pci);
if (!core) {
err = -EINVAL;
goto fail_free;
goto fail_disable;
}
dev->core = core;
@ -1323,7 +1323,7 @@ static int cx8800_initdev(struct pci_dev *pci_dev,
cc->step, cc->default_value);
if (!vc) {
err = core->audio_hdl.error;
goto fail_core;
goto fail_irq;
}
vc->priv = (void *)cc;
}
@ -1337,7 +1337,7 @@ static int cx8800_initdev(struct pci_dev *pci_dev,
cc->step, cc->default_value);
if (!vc) {
err = core->video_hdl.error;
goto fail_core;
goto fail_irq;
}
vc->priv = (void *)cc;
if (vc->id == V4L2_CID_CHROMA_AGC)
@ -1509,11 +1509,14 @@ static int cx8800_initdev(struct pci_dev *pci_dev,
fail_unreg:
cx8800_unregister_video(dev);
free_irq(pci_dev->irq, dev);
mutex_unlock(&core->lock);
fail_irq:
free_irq(pci_dev->irq, dev);
fail_core:
core->v4ldev = NULL;
cx88_core_put(core, dev->pci);
fail_disable:
pci_disable_device(pci_dev);
fail_free:
kfree(dev);
return err;

View File

@ -228,6 +228,7 @@ extern const struct sram_channel cx88_sram_channels[];
#define CX88_BOARD_WINFAST_DTV1800H_XC4000 88
#define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36 89
#define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43 90
#define CX88_BOARD_NOTONLYTV_LV3H 91
enum cx88_itype {
CX88_VMUX_COMPOSITE1 = 1,

View File

@ -11,7 +11,6 @@
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/proc_fs.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>

View File

@ -325,7 +325,7 @@ static u32 compress_raw_buf(struct ivtv *itv, u8 *buf, u32 size)
static u32 compress_sliced_buf(struct ivtv *itv, u32 line, u8 *buf, u32 size, u8 sav)
{
u32 line_size = itv->vbi.sliced_decoder_line_size;
struct v4l2_decode_vbi_line vbi;
struct v4l2_decode_vbi_line vbi = {};
int i;
unsigned lines = 0;

View File

@ -60,10 +60,8 @@ static irqreturn_t hopper_irq_handler(int irq, void *dev_id)
struct mantis_ca *ca;
mantis = (struct mantis_pci *) dev_id;
if (unlikely(!mantis)) {
dprintk(MANTIS_ERROR, 1, "Mantis == NULL");
if (unlikely(!mantis))
return IRQ_NONE;
}
ca = mantis->mantis_ca;
stat = mmread(MANTIS_INT_STAT);

View File

@ -69,10 +69,8 @@ static irqreturn_t mantis_irq_handler(int irq, void *dev_id)
struct mantis_ca *ca;
mantis = (struct mantis_pci *) dev_id;
if (unlikely(mantis == NULL)) {
dprintk(MANTIS_ERROR, 1, "Mantis == NULL");
if (unlikely(!mantis))
return IRQ_NONE;
}
ca = mantis->mantis_ca;
stat = mmread(MANTIS_INT_STAT);

View File

@ -13,12 +13,10 @@
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/debugfs.h>
#include <linux/delay.h>
#include <asm/div64.h>
#ifdef CONFIG_PROC_FS
#include <linux/proc_fs.h>
#endif
#include "saa7164.h"
MODULE_DESCRIPTION("Driver for NXP SAA7164 based TV cards");
@ -1045,19 +1043,51 @@ static void saa7164_dev_unregister(struct saa7164_dev *dev)
return;
}
#ifdef CONFIG_PROC_FS
static int saa7164_proc_show(struct seq_file *m, void *v)
#ifdef CONFIG_DEBUG_FS
static void *saa7164_seq_start(struct seq_file *s, loff_t *pos)
{
struct saa7164_dev *dev;
loff_t index = *pos;
mutex_lock(&devlist);
list_for_each_entry(dev, &saa7164_devlist, devlist) {
if (index-- == 0) {
mutex_unlock(&devlist);
return dev;
}
}
mutex_unlock(&devlist);
return NULL;
}
static void *saa7164_seq_next(struct seq_file *s, void *v, loff_t *pos)
{
struct saa7164_dev *dev = v;
void *ret;
mutex_lock(&devlist);
if (list_is_last(&dev->devlist, &saa7164_devlist))
ret = NULL;
else
ret = list_next_entry(dev, devlist);
mutex_unlock(&devlist);
++*pos;
return ret;
}
static void saa7164_seq_stop(struct seq_file *s, void *v)
{
}
static int saa7164_seq_show(struct seq_file *m, void *v)
{
struct saa7164_dev *dev = v;
struct tmComResBusInfo *b;
struct list_head *list;
int i, c;
if (saa7164_devcount == 0)
return 0;
list_for_each(list, &saa7164_devlist) {
dev = list_entry(list, struct saa7164_dev, devlist);
seq_printf(m, "%s = %p\n", dev->name, dev);
/* Lock the bus from any other access */
@ -1076,8 +1106,8 @@ static int saa7164_proc_show(struct seq_file *m, void *v)
seq_printf(m, " .m_pdwGetReadPos = 0x%x (0x%08x)\n",
b->m_dwGetWritePos, saa7164_readl(b->m_dwGetWritePos));
c = 0;
seq_printf(m, "\n Set Ring:\n");
seq_printf(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
seq_puts(m, "\n Set Ring:\n");
seq_puts(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
for (i = 0; i < b->m_dwSizeSetRing; i++) {
if (c == 0)
seq_printf(m, " %04x:", i);
@ -1085,14 +1115,14 @@ static int saa7164_proc_show(struct seq_file *m, void *v)
seq_printf(m, " %02x", readb(b->m_pdwSetRing + i));
if (++c == 16) {
seq_printf(m, "\n");
seq_puts(m, "\n");
c = 0;
}
}
c = 0;
seq_printf(m, "\n Get Ring:\n");
seq_printf(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
seq_puts(m, "\n Get Ring:\n");
seq_puts(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
for (i = 0; i < b->m_dwSizeGetRing; i++) {
if (c == 0)
seq_printf(m, " %04x:", i);
@ -1100,37 +1130,51 @@ static int saa7164_proc_show(struct seq_file *m, void *v)
seq_printf(m, " %02x", readb(b->m_pdwGetRing + i));
if (++c == 16) {
seq_printf(m, "\n");
seq_puts(m, "\n");
c = 0;
}
}
mutex_unlock(&b->lock);
}
return 0;
}
static struct proc_dir_entry *saa7164_pe;
static const struct seq_operations saa7164_seq_ops = {
.start = saa7164_seq_start,
.next = saa7164_seq_next,
.stop = saa7164_seq_stop,
.show = saa7164_seq_show,
};
static int saa7164_proc_create(void)
static int saa7164_open(struct inode *inode, struct file *file)
{
saa7164_pe = proc_create_single("saa7164", 0444, NULL, saa7164_proc_show);
if (!saa7164_pe)
return -ENOMEM;
return 0;
return seq_open(file, &saa7164_seq_ops);
}
static void saa7164_proc_destroy(void)
static const struct file_operations saa7164_operations = {
.owner = THIS_MODULE,
.open = saa7164_open,
.read = seq_read,
.llseek = seq_lseek,
.release = seq_release,
};
static struct dentry *saa7614_dentry;
static void __init saa7164_debugfs_create(void)
{
if (saa7164_pe)
remove_proc_entry("saa7164", NULL);
saa7614_dentry = debugfs_create_file("saa7164", 0444, NULL, NULL,
&saa7164_operations);
}
static void __exit saa7164_debugfs_remove(void)
{
debugfs_remove(saa7614_dentry);
}
#else
static int saa7164_proc_create(void) { return 0; }
static void saa7164_proc_destroy(void) {}
static void saa7164_debugfs_create(void) { }
static void saa7164_debugfs_remove(void) { }
#endif
static int saa7164_thread_function(void *data)
@ -1507,7 +1551,7 @@ static int __init saa7164_init(void)
if (ret)
return ret;
saa7164_proc_create();
saa7164_debugfs_create();
pr_info("saa7164 driver loaded\n");
@ -1516,7 +1560,7 @@ static int __init saa7164_init(void)
static void __exit saa7164_fini(void)
{
saa7164_proc_destroy();
saa7164_debugfs_remove();
pci_unregister_driver(&saa7164_pci_driver);
}

View File

@ -14,7 +14,6 @@
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/proc_fs.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>

View File

@ -483,6 +483,7 @@ config VIDEO_QCOM_VENUS
tristate "Qualcomm Venus V4L2 encoder/decoder driver"
depends on VIDEO_DEV && VIDEO_V4L2
depends on (ARCH_QCOM && IOMMU_DMA) || COMPILE_TEST
depends on INTERCONNECT || !INTERCONNECT
select QCOM_MDT_LOADER if ARCH_QCOM
select QCOM_SCM if ARCH_QCOM
select VIDEOBUF2_DMA_SG
@ -493,6 +494,19 @@ config VIDEO_QCOM_VENUS
on various Qualcomm SoCs.
To compile this driver as a module choose m here.
config VIDEO_SUN8I_DEINTERLACE
tristate "Allwinner Deinterlace driver"
depends on VIDEO_DEV && VIDEO_V4L2
depends on ARCH_SUNXI || COMPILE_TEST
depends on COMMON_CLK && OF
depends on PM
select VIDEOBUF2_DMA_CONTIG
select V4L2_MEM2MEM_DEV
help
Support for the Allwinner deinterlace unit with scaling
capability found on some SoCs, like H3.
To compile this driver as a module choose m here.
endif # V4L_MEM2MEM_DRIVERS
# TI VIDEO PORT Helper Modules
@ -585,9 +599,10 @@ config VIDEO_MESON_G12A_AO_CEC
config CEC_GPIO
tristate "Generic GPIO-based CEC driver"
depends on PREEMPT || COMPILE_TEST
depends on PREEMPTION || COMPILE_TEST
select CEC_CORE
select CEC_PIN
select CEC_NOTIFIER
select GPIOLIB
help
This is a generic GPIO-based CEC driver.

View File

@ -19,9 +19,7 @@ obj-$(CONFIG_VIDEO_VIVID) += vivid/
obj-$(CONFIG_VIDEO_VIM2M) += vim2m.o
obj-$(CONFIG_VIDEO_VICODEC) += vicodec/
obj-$(CONFIG_VIDEO_TI_VPE) += ti-vpe/
obj-$(CONFIG_VIDEO_TI_CAL) += ti-vpe/
obj-y += ti-vpe/
obj-$(CONFIG_VIDEO_MX2_EMMAPRP) += mx2_emmaprp.o
obj-$(CONFIG_VIDEO_CODA) += coda/

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