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Merge remote-tracking branches 'spi/topic/coldfire' and 'spi/topic/dw' into spi-next

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This commit is contained in:
Mark Brown 2015-11-04 11:02:09 +00:00
commit 8a9e77653f
5 changed files with 53 additions and 100 deletions
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3
drivers/spi/spi-coldfire-qspi.c
View File

@ -420,19 +420,20 @@ static int mcfqspi_probe(struct platform_device *pdev)
master->auto_runtime_pm = true;
platform_set_drvdata(pdev, master);
pm_runtime_enable(&pdev->dev);
status = devm_spi_register_master(&pdev->dev, master);
if (status) {
dev_dbg(&pdev->dev, "spi_register_master failed\n");
goto fail2;
}
pm_runtime_enable(&pdev->dev);
dev_info(&pdev->dev, "Coldfire QSPI bus driver\n");
return 0;
fail2:
pm_runtime_disable(&pdev->dev);
mcfqspi_cs_teardown(mcfqspi);
fail1:
clk_disable(mcfqspi->clk);

7
drivers/spi/spi-dw-mmio.c
View File

@ -19,6 +19,7 @@
#include <linux/of.h>
#include <linux/of_gpio.h>
#include <linux/of_platform.h>
#include <linux/property.h>
#include "spi-dw.h"
@ -74,13 +75,11 @@ static int dw_spi_mmio_probe(struct platform_device *pdev)
dws->max_freq = clk_get_rate(dwsmmio->clk);
of_property_read_u32(pdev->dev.of_node, "reg-io-width",
&dws->reg_io_width);
device_property_read_u32(&pdev->dev, "reg-io-width", &dws->reg_io_width);
num_cs = 4;
if (pdev->dev.of_node)
of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs);
device_property_read_u32(&pdev->dev, "num-cs", &num_cs);
dws->num_cs = num_cs;

29
drivers/spi/spi-dw-pci.c
View File

@ -23,11 +23,6 @@
#define DRIVER_NAME "dw_spi_pci"
struct dw_spi_pci {
struct pci_dev *pdev;
struct dw_spi dws;
};
struct spi_pci_desc {
int (*setup)(struct dw_spi *);
u16 num_cs;
@ -48,7 +43,6 @@ static struct spi_pci_desc spi_pci_mid_desc_2 = {
static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
struct dw_spi_pci *dwpci;
struct dw_spi *dws;
struct spi_pci_desc *desc = (struct spi_pci_desc *)ent->driver_data;
int pci_bar = 0;
@ -58,14 +52,10 @@ static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
if (ret)
return ret;
dwpci = devm_kzalloc(&pdev->dev, sizeof(struct dw_spi_pci),
GFP_KERNEL);
if (!dwpci)
dws = devm_kzalloc(&pdev->dev, sizeof(*dws), GFP_KERNEL);
if (!dws)
return -ENOMEM;
dwpci->pdev = pdev;
dws = &dwpci->dws;
/* Get basic io resource and map it */
dws->paddr = pci_resource_start(pdev, pci_bar);
@ -74,7 +64,6 @@ static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
return ret;
dws->regs = pcim_iomap_table(pdev)[pci_bar];
dws->irq = pdev->irq;
/*
@ -99,7 +88,7 @@ static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
return ret;
/* PCI hook and SPI hook use the same drv data */
pci_set_drvdata(pdev, dwpci);
pci_set_drvdata(pdev, dws);
dev_info(&pdev->dev, "found PCI SPI controller(ID: %04x:%04x)\n",
pdev->vendor, pdev->device);
@ -109,26 +98,26 @@ static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
static void spi_pci_remove(struct pci_dev *pdev)
{
struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
struct dw_spi *dws = pci_get_drvdata(pdev);
dw_spi_remove_host(&dwpci->dws);
dw_spi_remove_host(dws);
}
#ifdef CONFIG_PM_SLEEP
static int spi_suspend(struct device *dev)
{
struct pci_dev *pdev = to_pci_dev(dev);
struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
struct dw_spi *dws = pci_get_drvdata(pdev);
return dw_spi_suspend_host(&dwpci->dws);
return dw_spi_suspend_host(dws);
}
static int spi_resume(struct device *dev)
{
struct pci_dev *pdev = to_pci_dev(dev);
struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
struct dw_spi *dws = pci_get_drvdata(pdev);
return dw_spi_resume_host(&dwpci->dws);
return dw_spi_resume_host(dws);
}
#endif

108
drivers/spi/spi-dw.c
View File

@ -30,19 +30,13 @@
/* Slave spi_dev related */
struct chip_data {
u16 cr0;
u8 cs; /* chip select pin */
u8 n_bytes; /* current is a 1/2/4 byte op */
u8 tmode; /* TR/TO/RO/EEPROM */
u8 type; /* SPI/SSP/MicroWire */
u8 poll_mode; /* 1 means use poll mode */
u32 dma_width;
u32 rx_threshold;
u32 tx_threshold;
u8 enable_dma;
u8 bits_per_word;
u16 clk_div; /* baud rate divider */
u32 speed_hz; /* baud rate */
void (*cs_control)(u32 command);
@ -289,14 +283,11 @@ static int dw_spi_transfer_one(struct spi_master *master,
struct chip_data *chip = spi_get_ctldata(spi);
u8 imask = 0;
u16 txlevel = 0;
u16 clk_div = 0;
u32 speed = 0;
u32 cr0 = 0;
u16 clk_div;
u32 cr0;
int ret;
dws->dma_mapped = 0;
dws->n_bytes = chip->n_bytes;
dws->dma_width = chip->dma_width;
dws->tx = (void *)transfer->tx_buf;
dws->tx_end = dws->tx + transfer->len;
@ -306,37 +297,30 @@ static int dw_spi_transfer_one(struct spi_master *master,
spi_enable_chip(dws, 0);
cr0 = chip->cr0;
/* Handle per transfer options for bpw and speed */
if (transfer->speed_hz) {
speed = chip->speed_hz;
if (transfer->speed_hz != chip->speed_hz) {
/* clk_div doesn't support odd number */
clk_div = (dws->max_freq / transfer->speed_hz + 1) & 0xfffe;
if ((transfer->speed_hz != speed) || !chip->clk_div) {
speed = transfer->speed_hz;
chip->speed_hz = transfer->speed_hz;
chip->clk_div = clk_div;
/* clk_div doesn't support odd number */
clk_div = (dws->max_freq / speed + 1) & 0xfffe;
chip->speed_hz = speed;
chip->clk_div = clk_div;
spi_set_clk(dws, chip->clk_div);
}
spi_set_clk(dws, chip->clk_div);
}
if (transfer->bits_per_word) {
if (transfer->bits_per_word == 8) {
dws->n_bytes = 1;
dws->dma_width = 1;
} else if (transfer->bits_per_word == 16) {
dws->n_bytes = 2;
dws->dma_width = 2;
}
cr0 = (transfer->bits_per_word - 1)
| (chip->type << SPI_FRF_OFFSET)
| (spi->mode << SPI_MODE_OFFSET)
| (chip->tmode << SPI_TMOD_OFFSET);
if (transfer->bits_per_word == 8) {
dws->n_bytes = 1;
dws->dma_width = 1;
} else if (transfer->bits_per_word == 16) {
dws->n_bytes = 2;
dws->dma_width = 2;
} else {
return -EINVAL;
}
/* Default SPI mode is SCPOL = 0, SCPH = 0 */
cr0 = (transfer->bits_per_word - 1)
| (chip->type << SPI_FRF_OFFSET)
| (spi->mode << SPI_MODE_OFFSET)
| (chip->tmode << SPI_TMOD_OFFSET);
/*
* Adjust transfer mode if necessary. Requires platform dependent
@ -439,34 +423,9 @@ static int dw_spi_setup(struct spi_device *spi)
chip->poll_mode = chip_info->poll_mode;
chip->type = chip_info->type;
chip->rx_threshold = 0;
chip->tx_threshold = 0;
}
if (spi->bits_per_word == 8) {
chip->n_bytes = 1;
chip->dma_width = 1;
} else if (spi->bits_per_word == 16) {
chip->n_bytes = 2;
chip->dma_width = 2;
}
chip->bits_per_word = spi->bits_per_word;
if (!spi->max_speed_hz) {
dev_err(&spi->dev, "No max speed HZ parameter\n");
return -EINVAL;
}
chip->tmode = 0; /* Tx & Rx */
/* Default SPI mode is SCPOL = 0, SCPH = 0 */
chip->cr0 = (chip->bits_per_word - 1)
| (chip->type << SPI_FRF_OFFSET)
| (spi->mode << SPI_MODE_OFFSET)
| (chip->tmode << SPI_TMOD_OFFSET);
if (spi->mode & SPI_LOOP)
chip->cr0 |= 1 << SPI_SRL_OFFSET;
if (gpio_is_valid(spi->cs_gpio)) {
ret = gpio_direction_output(spi->cs_gpio,
@ -524,13 +483,12 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
dws->master = master;
dws->type = SSI_MOTO_SPI;
dws->dma_inited = 0;
dws->dma_addr = (dma_addr_t)(dws->paddr + 0x60);
dws->dma_addr = (dma_addr_t)(dws->paddr + DW_SPI_DR);
snprintf(dws->name, sizeof(dws->name), "dw_spi%d", dws->bus_num);
ret = devm_request_irq(dev, dws->irq, dw_spi_irq, IRQF_SHARED,
dws->name, master);
ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED, dws->name, master);
if (ret < 0) {
dev_err(&master->dev, "can not get IRQ\n");
dev_err(dev, "can not get IRQ\n");
goto err_free_master;
}
@ -573,6 +531,7 @@ err_dma_exit:
if (dws->dma_ops && dws->dma_ops->dma_exit)
dws->dma_ops->dma_exit(dws);
spi_enable_chip(dws, 0);
free_irq(dws->irq, master);
err_free_master:
spi_master_put(master);
return ret;
@ -581,28 +540,27 @@ EXPORT_SYMBOL_GPL(dw_spi_add_host);
void dw_spi_remove_host(struct dw_spi *dws)
{
if (!dws)
return;
dw_spi_debugfs_remove(dws);
if (dws->dma_ops && dws->dma_ops->dma_exit)
dws->dma_ops->dma_exit(dws);
spi_enable_chip(dws, 0);
/* Disable clk */
spi_set_clk(dws, 0);
spi_shutdown_chip(dws);
free_irq(dws->irq, dws->master);
}
EXPORT_SYMBOL_GPL(dw_spi_remove_host);
int dw_spi_suspend_host(struct dw_spi *dws)
{
int ret = 0;
int ret;
ret = spi_master_suspend(dws->master);
if (ret)
return ret;
spi_enable_chip(dws, 0);
spi_set_clk(dws, 0);
return ret;
spi_shutdown_chip(dws);
return 0;
}
EXPORT_SYMBOL_GPL(dw_spi_suspend_host);

6
drivers/spi/spi-dw.h
View File

@ -225,6 +225,12 @@ static inline void spi_reset_chip(struct dw_spi *dws)
spi_enable_chip(dws, 1);
}
static inline void spi_shutdown_chip(struct dw_spi *dws)
{
spi_enable_chip(dws, 0);
spi_set_clk(dws, 0);
}
/*
* Each SPI slave device to work with dw_api controller should
* has such a structure claiming its working mode (poll or PIO/DMA),