Merge branch 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelvare/staging

Pull hwmon subsystem update from Jean Delvare:
 "There are many improvements to the it87 driver, as well as suspend
  support for the Winbond Super-I/O chips, and a few other fixes."

* 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelvare/staging:
  hwmon-vid: Add support for AMD family 11h to 15h processors
  hwmon: (it87) Support PECI for additional chips
  hwmon: (it87) Report thermal sensor type as Intel PECI if appropriate
  hwmon: (it87) Manage device specific features with table
  hwmon: (it87) Replace pwm group macro with direct attribute definitions
  hwmon: (it87) Avoid quoted string splits across lines
  hwmon: (it87) Save fan registers in 2-dimensional array
  hwmon: (it87) Introduce support for tempX_offset sysfs attribute
  hwmon: (it87) Replace macro defining tempX_type sensors with direct definitions
  hwmon: (it87) Save voltage register values in 2-dimensional array
  hwmon: (it87) Save temperature registers in 2-dimensional array
  hwmon: (w83627ehf) Get rid of smatch warnings
  hwmon: (w83627hf) Don't touch nonexistent I2C address registers
  hwmon: (w83627ehf) Add support for suspend
  hwmon: (w83627hf) Add support for suspend
  hwmon: Fix PCI device reference leak in quirk
This commit is contained in:
Linus Torvalds 2012-12-20 07:07:18 -08:00
commit 8cb68bdf76
6 changed files with 680 additions and 446 deletions

View File

@ -209,3 +209,13 @@ doesn't use CPU cycles.
Trip points must be set properly before switching to automatic fan speed
control mode. The driver will perform basic integrity checks before
actually switching to automatic control mode.
Temperature offset attributes
-----------------------------
The driver supports temp[1-3]_offset sysfs attributes to adjust the reported
temperature for thermal diodes or diode-connected thermal transistors.
If a temperature sensor is configured for thermistors, the attribute values
are ignored. If the thermal sensor type is Intel PECI, the temperature offset
must be programmed to the critical CPU temperature.

View File

@ -115,6 +115,12 @@ int vid_from_reg(int val, u8 vrm)
return (val < 32) ? 1550 - 25 * val
: 775 - (25 * (val - 31)) / 2;
case 26: /* AMD family 10h to 15h, serial VID */
val &= 0x7f;
if (val >= 0x7c)
return 0;
return DIV_ROUND_CLOSEST(15500 - 125 * val, 10);
case 91: /* VRM 9.1 */
case 90: /* VRM 9.0 */
val &= 0x1f;
@ -195,6 +201,10 @@ static struct vrm_model vrm_models[] = {
{X86_VENDOR_AMD, 0xF, 0x40, 0x7F, ANY, 24}, /* NPT family 0Fh */
{X86_VENDOR_AMD, 0xF, 0x80, ANY, ANY, 25}, /* future fam. 0Fh */
{X86_VENDOR_AMD, 0x10, 0x0, ANY, ANY, 25}, /* NPT family 10h */
{X86_VENDOR_AMD, 0x11, 0x0, ANY, ANY, 26}, /* family 11h */
{X86_VENDOR_AMD, 0x12, 0x0, ANY, ANY, 26}, /* family 12h */
{X86_VENDOR_AMD, 0x14, 0x0, ANY, ANY, 26}, /* family 14h */
{X86_VENDOR_AMD, 0x15, 0x0, ANY, ANY, 26}, /* family 15h */
{X86_VENDOR_INTEL, 0x6, 0x0, 0x6, ANY, 82}, /* Pentium Pro,
* Pentium II, Xeon,

View File

@ -84,19 +84,21 @@ static void __init hwmon_pci_quirks(void)
/* Open access to 0x295-0x296 on MSI MS-7031 */
sb = pci_get_device(PCI_VENDOR_ID_ATI, 0x436c, NULL);
if (sb &&
(sb->subsystem_vendor == 0x1462 && /* MSI */
sb->subsystem_device == 0x0031)) { /* MS-7031 */
if (sb) {
if (sb->subsystem_vendor == 0x1462 && /* MSI */
sb->subsystem_device == 0x0031) { /* MS-7031 */
pci_read_config_byte(sb, 0x48, &enable);
pci_read_config_word(sb, 0x64, &base);
pci_read_config_byte(sb, 0x48, &enable);
pci_read_config_word(sb, 0x64, &base);
if (base == 0 && !(enable & BIT(2))) {
dev_info(&sb->dev,
"Opening wide generic port at 0x295\n");
pci_write_config_word(sb, 0x64, 0x295);
pci_write_config_byte(sb, 0x48, enable | BIT(2));
if (base == 0 && !(enable & BIT(2))) {
dev_info(&sb->dev,
"Opening wide generic port at 0x295\n");
pci_write_config_word(sb, 0x64, 0x295);
pci_write_config_byte(sb, 0x48,
enable | BIT(2));
}
}
pci_dev_put(sb);
}
#endif
}

File diff suppressed because it is too large Load Diff

View File

@ -1,7 +1,7 @@
/*
* w83627ehf - Driver for the hardware monitoring functionality of
* the Winbond W83627EHF Super-I/O chip
* Copyright (C) 2005-2011 Jean Delvare <khali@linux-fr.org>
* Copyright (C) 2005-2012 Jean Delvare <khali@linux-fr.org>
* Copyright (C) 2006 Yuan Mu (Winbond),
* Rudolf Marek <r.marek@assembler.cz>
* David Hubbard <david.c.hubbard@gmail.com>
@ -502,6 +502,13 @@ struct w83627ehf_data {
u16 have_temp_offset;
u8 in6_skip:1;
u8 temp3_val_only:1;
#ifdef CONFIG_PM
/* Remember extra register values over suspend/resume */
u8 vbat;
u8 fandiv1;
u8 fandiv2;
#endif
};
struct w83627ehf_sio_data {
@ -898,6 +905,8 @@ static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
data->temp_max_hyst[i]
= w83627ehf_read_temp(data,
data->reg_temp_hyst[i]);
if (i > 2)
continue;
if (data->have_temp_offset & (1 << i))
data->temp_offset[i]
= w83627ehf_read_value(data,
@ -2608,10 +2617,98 @@ static int w83627ehf_remove(struct platform_device *pdev)
return 0;
}
#ifdef CONFIG_PM
static int w83627ehf_suspend(struct device *dev)
{
struct w83627ehf_data *data = w83627ehf_update_device(dev);
struct w83627ehf_sio_data *sio_data = dev->platform_data;
mutex_lock(&data->update_lock);
data->vbat = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
if (sio_data->kind == nct6775) {
data->fandiv1 = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);
data->fandiv2 = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);
}
mutex_unlock(&data->update_lock);
return 0;
}
static int w83627ehf_resume(struct device *dev)
{
struct w83627ehf_data *data = dev_get_drvdata(dev);
struct w83627ehf_sio_data *sio_data = dev->platform_data;
int i;
mutex_lock(&data->update_lock);
data->bank = 0xff; /* Force initial bank selection */
/* Restore limits */
for (i = 0; i < data->in_num; i++) {
if ((i == 6) && data->in6_skip)
continue;
w83627ehf_write_value(data, W83627EHF_REG_IN_MIN(i),
data->in_min[i]);
w83627ehf_write_value(data, W83627EHF_REG_IN_MAX(i),
data->in_max[i]);
}
for (i = 0; i < 5; i++) {
if (!(data->has_fan_min & (1 << i)))
continue;
w83627ehf_write_value(data, data->REG_FAN_MIN[i],
data->fan_min[i]);
}
for (i = 0; i < NUM_REG_TEMP; i++) {
if (!(data->have_temp & (1 << i)))
continue;
if (data->reg_temp_over[i])
w83627ehf_write_temp(data, data->reg_temp_over[i],
data->temp_max[i]);
if (data->reg_temp_hyst[i])
w83627ehf_write_temp(data, data->reg_temp_hyst[i],
data->temp_max_hyst[i]);
if (i > 2)
continue;
if (data->have_temp_offset & (1 << i))
w83627ehf_write_value(data,
W83627EHF_REG_TEMP_OFFSET[i],
data->temp_offset[i]);
}
/* Restore other settings */
w83627ehf_write_value(data, W83627EHF_REG_VBAT, data->vbat);
if (sio_data->kind == nct6775) {
w83627ehf_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
w83627ehf_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
}
/* Force re-reading all values */
data->valid = 0;
mutex_unlock(&data->update_lock);
return 0;
}
static const struct dev_pm_ops w83627ehf_dev_pm_ops = {
.suspend = w83627ehf_suspend,
.resume = w83627ehf_resume,
};
#define W83627EHF_DEV_PM_OPS (&w83627ehf_dev_pm_ops)
#else
#define W83627EHF_DEV_PM_OPS NULL
#endif /* CONFIG_PM */
static struct platform_driver w83627ehf_driver = {
.driver = {
.owner = THIS_MODULE,
.name = DRVNAME,
.pm = W83627EHF_DEV_PM_OPS,
},
.probe = w83627ehf_probe,
.remove = w83627ehf_remove,

View File

@ -5,7 +5,7 @@
* Philip Edelbrock <phil@netroedge.com>,
* and Mark Studebaker <mdsxyz123@yahoo.com>
* Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
* Copyright (c) 2007 Jean Delvare <khali@linux-fr.org>
* Copyright (c) 2007 - 1012 Jean Delvare <khali@linux-fr.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -389,6 +389,12 @@ struct w83627hf_data {
*/
u8 vrm;
u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
#ifdef CONFIG_PM
/* Remember extra register values over suspend/resume */
u8 scfg1;
u8 scfg2;
#endif
};
@ -401,10 +407,77 @@ static void w83627hf_update_fan_div(struct w83627hf_data *data);
static struct w83627hf_data *w83627hf_update_device(struct device *dev);
static void w83627hf_init_device(struct platform_device *pdev);
#ifdef CONFIG_PM
static int w83627hf_suspend(struct device *dev)
{
struct w83627hf_data *data = w83627hf_update_device(dev);
mutex_lock(&data->update_lock);
data->scfg1 = w83627hf_read_value(data, W83781D_REG_SCFG1);
data->scfg2 = w83627hf_read_value(data, W83781D_REG_SCFG2);
mutex_unlock(&data->update_lock);
return 0;
}
static int w83627hf_resume(struct device *dev)
{
struct w83627hf_data *data = dev_get_drvdata(dev);
int i, num_temps = (data->type == w83697hf) ? 2 : 3;
/* Restore limits */
mutex_lock(&data->update_lock);
for (i = 0; i <= 8; i++) {
/* skip missing sensors */
if (((data->type == w83697hf) && (i == 1)) ||
((data->type != w83627hf && data->type != w83697hf)
&& (i == 5 || i == 6)))
continue;
w83627hf_write_value(data, W83781D_REG_IN_MAX(i),
data->in_max[i]);
w83627hf_write_value(data, W83781D_REG_IN_MIN(i),
data->in_min[i]);
}
for (i = 0; i <= 2; i++)
w83627hf_write_value(data, W83627HF_REG_FAN_MIN(i),
data->fan_min[i]);
for (i = 0; i < num_temps; i++) {
w83627hf_write_value(data, w83627hf_reg_temp_over[i],
data->temp_max[i]);
w83627hf_write_value(data, w83627hf_reg_temp_hyst[i],
data->temp_max_hyst[i]);
}
/* Fixup BIOS bugs */
if (data->type == w83627thf || data->type == w83637hf ||
data->type == w83687thf)
w83627hf_write_value(data, W83627THF_REG_VRM_OVT_CFG,
data->vrm_ovt);
w83627hf_write_value(data, W83781D_REG_SCFG1, data->scfg1);
w83627hf_write_value(data, W83781D_REG_SCFG2, data->scfg2);
/* Force re-reading all values */
data->valid = 0;
mutex_unlock(&data->update_lock);
return 0;
}
static const struct dev_pm_ops w83627hf_dev_pm_ops = {
.suspend = w83627hf_suspend,
.resume = w83627hf_resume,
};
#define W83627HF_DEV_PM_OPS (&w83627hf_dev_pm_ops)
#else
#define W83627HF_DEV_PM_OPS NULL
#endif /* CONFIG_PM */
static struct platform_driver w83627hf_driver = {
.driver = {
.owner = THIS_MODULE,
.name = DRVNAME,
.pm = W83627HF_DEV_PM_OPS,
},
.probe = w83627hf_probe,
.remove = w83627hf_remove,
@ -1659,8 +1732,10 @@ static void w83627hf_init_device(struct platform_device *pdev)
/* Minimize conflicts with other winbond i2c-only clients... */
/* disable i2c subclients... how to disable main i2c client?? */
/* force i2c address to relatively uncommon address */
w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89);
w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c);
if (type == w83627hf) {
w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89);
w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c);
}
/* Read VID only once */
if (type == w83627hf || type == w83637hf) {