media: ov5640: Init properly the SCLK dividers
The SCLK and SCLK2X dividers are fixed in stone in the initialization array. Let's make explicit what we're doing and move that away from the huge array to the initialization code. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
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@ -91,6 +91,9 @@
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#define OV5640_REG_SDE_CTRL5 0x5585
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#define OV5640_REG_AVG_READOUT 0x56a1
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#define OV5640_SCLK2X_ROOT_DIVIDER_DEFAULT 1
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#define OV5640_SCLK_ROOT_DIVIDER_DEFAULT 2
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enum ov5640_mode_id {
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OV5640_MODE_QCIF_176_144 = 0,
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OV5640_MODE_QVGA_320_240,
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@ -249,7 +252,7 @@ static const struct reg_value ov5640_init_setting_30fps_VGA[] = {
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{0x3103, 0x11, 0, 0}, {0x3008, 0x82, 0, 5}, {0x3008, 0x42, 0, 0},
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{0x3103, 0x03, 0, 0}, {0x3017, 0x00, 0, 0}, {0x3018, 0x00, 0, 0},
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{0x3034, 0x18, 0, 0}, {0x3035, 0x14, 0, 0}, {0x3036, 0x38, 0, 0},
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{0x3037, 0x13, 0, 0}, {0x3108, 0x01, 0, 0}, {0x3630, 0x36, 0, 0},
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{0x3037, 0x13, 0, 0}, {0x3630, 0x36, 0, 0},
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{0x3631, 0x0e, 0, 0}, {0x3632, 0xe2, 0, 0}, {0x3633, 0x12, 0, 0},
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{0x3621, 0xe0, 0, 0}, {0x3704, 0xa0, 0, 0}, {0x3703, 0x5a, 0, 0},
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{0x3715, 0x78, 0, 0}, {0x3717, 0x01, 0, 0}, {0x370b, 0x60, 0, 0},
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@ -1660,6 +1663,12 @@ static int ov5640_restore_mode(struct ov5640_dev *sensor)
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if (ret < 0)
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return ret;
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ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f,
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(ilog2(OV5640_SCLK2X_ROOT_DIVIDER_DEFAULT) << 2) |
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ilog2(OV5640_SCLK_ROOT_DIVIDER_DEFAULT));
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if (ret)
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return ret;
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/* now restore the last capture mode */
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ret = ov5640_set_mode(sensor, &ov5640_mode_init_data);
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if (ret < 0)
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