ARM: S3C64XX: add HSMMC2 support
This adds support for the third SDHCI controller. Signed-off-by: Maurus Cuelenaere <mcuelenaere@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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@ -45,6 +45,7 @@ void __init s3c6400_map_io(void)
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s3c6400_default_sdhci0();
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s3c6400_default_sdhci1();
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s3c6400_default_sdhci2();
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/* the i2c devices are directly compatible with s3c2440 */
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s3c_i2c0_setname("s3c2440-i2c");
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@ -58,6 +58,7 @@ void __init s3c6410_map_io(void)
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/* initialise device information early */
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s3c6410_default_sdhci0();
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s3c6410_default_sdhci1();
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s3c6410_default_sdhci2();
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/* the i2c devices are directly compatible with s3c2440 */
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s3c_i2c0_setname("s3c2440-i2c");
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@ -178,6 +178,11 @@ config S3C_DEV_HSMMC1
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help
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Compile in platform device definitions for HSMMC channel 1
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config S3C_DEV_HSMMC2
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bool
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help
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Compile in platform device definitions for HSMMC channel 2
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config S3C_DEV_I2C1
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bool
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help
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@ -36,6 +36,7 @@ obj-$(CONFIG_HAVE_PWM) += pwm.o
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obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o
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obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o
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obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o
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obj-y += dev-i2c0.o
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obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o
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obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o
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@ -0,0 +1,69 @@
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/* linux/arch/arm/plat-s3c/dev-hsmmc2.c
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*
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* Copyright (c) 2009 Maurus Cuelenaere
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*
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* Based on arch/arm/plat-s3c/dev-hsmmc1.c
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* original file Copyright (c) 2008 Simtec Electronics
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*
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* S3C series device definition for hsmmc device 2
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/mmc/host.h>
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#include <mach/map.h>
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#include <plat/sdhci.h>
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#include <plat/devs.h>
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#include <plat/cpu.h>
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#define S3C_SZ_HSMMC (0x1000)
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static struct resource s3c_hsmmc2_resource[] = {
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[0] = {
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.start = S3C_PA_HSMMC2,
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.end = S3C_PA_HSMMC2 + S3C_SZ_HSMMC - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_HSMMC2,
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.end = IRQ_HSMMC2,
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.flags = IORESOURCE_IRQ,
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}
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};
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static u64 s3c_device_hsmmc2_dmamask = 0xffffffffUL;
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struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
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.max_width = 4,
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.host_caps = (MMC_CAP_4_BIT_DATA |
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MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
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};
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struct platform_device s3c_device_hsmmc2 = {
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.name = "s3c-sdhci",
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.id = 2,
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.num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
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.resource = s3c_hsmmc2_resource,
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.dev = {
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.dma_mask = &s3c_device_hsmmc2_dmamask,
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.coherent_dma_mask = 0xffffffffUL,
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.platform_data = &s3c_hsmmc2_def_platdata,
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},
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};
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void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
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{
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struct s3c_sdhci_platdata *set = &s3c_hsmmc2_def_platdata;
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set->max_width = pd->max_width;
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if (pd->cfg_gpio)
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set->cfg_gpio = pd->cfg_gpio;
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if (pd->cfg_card)
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set->cfg_card = pd->cfg_card;
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}
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@ -57,6 +57,7 @@ struct s3c_sdhci_platdata {
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*/
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extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd);
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extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd);
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extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd);
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/* Default platform data, exported so that per-cpu initialisation can
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* set the correct one when there are more than one cpu type selected.
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@ -64,11 +65,13 @@ extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd);
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extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata;
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extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata;
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extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata;
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/* Helper function availablity */
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extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
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extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
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extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
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/* S3C6400 SDHCI setup */
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@ -103,6 +106,17 @@ static inline void s3c6400_default_sdhci1(void)
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static inline void s3c6400_default_sdhci1(void) { }
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#endif /* CONFIG_S3C_DEV_HSMMC1 */
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#ifdef CONFIG_S3C_DEV_HSMMC2
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static inline void s3c6400_default_sdhci2(void)
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{
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s3c_hsmmc2_def_platdata.clocks = s3c6400_hsmmc_clksrcs;
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s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
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s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
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}
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#else
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static inline void s3c6400_default_sdhci2(void) { }
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#endif /* CONFIG_S3C_DEV_HSMMC2 */
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#else
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static inline void s3c6400_default_sdhci0(void) { }
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static inline void s3c6400_default_sdhci1(void) { }
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@ -140,6 +154,17 @@ static inline void s3c6410_default_sdhci1(void)
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static inline void s3c6410_default_sdhci1(void) { }
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#endif /* CONFIG_S3C_DEV_HSMMC1 */
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#ifdef CONFIG_S3C_DEV_HSMMC2
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static inline void s3c6410_default_sdhci2(void)
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{
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s3c_hsmmc2_def_platdata.clocks = s3c6410_hsmmc_clksrcs;
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s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
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s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card;
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}
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#else
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static inline void s3c6410_default_sdhci2(void) { }
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#endif /* CONFIG_S3C_DEV_HSMMC2 */
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#else
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static inline void s3c6410_default_sdhci0(void) { }
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static inline void s3c6410_default_sdhci1(void) { }
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@ -53,3 +53,23 @@ void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
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s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);
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s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3));
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}
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void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
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{
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unsigned int gpio;
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unsigned int end;
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end = S3C64XX_GPH(6 + width);
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/* Set all the necessary GPH pins to special-function 1 */
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for (gpio = S3C64XX_GPH(6); gpio < end; gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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}
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/* Set all the necessary GPC pins to special-function 1 */
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for (gpio = S3C64XX_GPC(4); gpio < S3C64XX_GPC(6); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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}
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}
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