thermal: rockchip: the rename compatibles for rockchip SoCs
This patch renames to be more adapter compatibles since more and more SoCs are supported in thermal driver. Reported-by: Huang,Tao <huangtao@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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@ -58,8 +58,8 @@ enum sensor_id {
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/**
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* The conversion table has the adc value and temperature.
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* ADC_DECREMENT: the adc value is of diminishing.(e.g. v2_code_table)
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* ADC_INCREMENT: the adc value is incremental.(e.g. v3_code_table)
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* ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table)
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* ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table)
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*/
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enum adc_sort_mode {
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ADC_DECREMENT = 0,
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@ -135,7 +135,13 @@ struct rockchip_thermal_data {
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enum tshut_polarity tshut_polarity;
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};
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/* TSADC Sensor info define: */
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/**
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* TSADC Sensor Register description:
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*
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* TSADCV2_* are used for RK3288 SoCs, the other chips can reuse it.
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* TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)
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*
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*/
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#define TSADCV2_AUTO_CON 0x04
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#define TSADCV2_INT_EN 0x08
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#define TSADCV2_INT_PD 0x0c
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@ -154,8 +160,8 @@ struct rockchip_thermal_data {
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#define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
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#define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
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#define TSADCV1_INT_PD_CLEAR_MASK ~BIT(16)
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#define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8)
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#define TSADCV3_INT_PD_CLEAR_MASK ~BIT(16)
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#define TSADCV2_DATA_MASK 0xfff
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#define TSADCV3_DATA_MASK 0x3ff
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@ -177,7 +183,7 @@ struct tsadc_table {
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* linearly interpolated.
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* Code to Temperature mapping should be updated based on sillcon results.
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*/
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static const struct tsadc_table v1_code_table[] = {
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static const struct tsadc_table rk3228_code_table[] = {
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{TSADCV3_DATA_MASK, -40000},
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{436, -40000},
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{431, -35000},
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@ -215,7 +221,7 @@ static const struct tsadc_table v1_code_table[] = {
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{264, 125000},
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};
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static const struct tsadc_table v2_code_table[] = {
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static const struct tsadc_table rk3288_code_table[] = {
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{TSADCV2_DATA_MASK, -40000},
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{3800, -40000},
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{3792, -35000},
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@ -253,7 +259,7 @@ static const struct tsadc_table v2_code_table[] = {
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{3421, 125000},
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};
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static const struct tsadc_table v3_code_table[] = {
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static const struct tsadc_table rk3368_code_table[] = {
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{0, -40000},
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{106, -40000},
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{108, -35000},
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@ -292,7 +298,7 @@ static const struct tsadc_table v3_code_table[] = {
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{TSADCV3_DATA_MASK, 125000},
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};
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static const struct tsadc_table v4_code_table[] = {
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static const struct tsadc_table rk3399_code_table[] = {
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{TSADCV3_DATA_MASK, -40000},
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{431, -40000},
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{426, -35000},
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@ -453,14 +459,6 @@ static void rk_tsadcv2_initialize(void __iomem *regs,
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regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
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}
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static void rk_tsadcv1_irq_ack(void __iomem *regs)
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{
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u32 val;
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val = readl_relaxed(regs + TSADCV2_INT_PD);
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writel_relaxed(val & TSADCV1_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
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}
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static void rk_tsadcv2_irq_ack(void __iomem *regs)
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{
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u32 val;
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@ -469,6 +467,14 @@ static void rk_tsadcv2_irq_ack(void __iomem *regs)
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writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
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}
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static void rk_tsadcv3_irq_ack(void __iomem *regs)
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{
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u32 val;
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val = readl_relaxed(regs + TSADCV2_INT_PD);
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writel_relaxed(val & TSADCV3_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
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}
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static void rk_tsadcv2_control(void __iomem *regs, bool enable)
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{
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u32 val;
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@ -531,15 +537,15 @@ static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
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.tshut_temp = 95000,
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.initialize = rk_tsadcv2_initialize,
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.irq_ack = rk_tsadcv1_irq_ack,
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.irq_ack = rk_tsadcv3_irq_ack,
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.control = rk_tsadcv2_control,
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.get_temp = rk_tsadcv2_get_temp,
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.set_tshut_temp = rk_tsadcv2_tshut_temp,
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.set_tshut_mode = rk_tsadcv2_tshut_mode,
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.table = {
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.id = v1_code_table,
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.length = ARRAY_SIZE(v1_code_table),
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.id = rk3228_code_table,
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.length = ARRAY_SIZE(rk3228_code_table),
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.data_mask = TSADCV3_DATA_MASK,
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.mode = ADC_DECREMENT,
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},
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@ -562,8 +568,8 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
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.set_tshut_mode = rk_tsadcv2_tshut_mode,
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.table = {
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.id = v2_code_table,
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.length = ARRAY_SIZE(v2_code_table),
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.id = rk3288_code_table,
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.length = ARRAY_SIZE(rk3288_code_table),
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.data_mask = TSADCV2_DATA_MASK,
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.mode = ADC_DECREMENT,
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},
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@ -586,8 +592,8 @@ static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
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.set_tshut_mode = rk_tsadcv2_tshut_mode,
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.table = {
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.id = v3_code_table,
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.length = ARRAY_SIZE(v3_code_table),
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.id = rk3368_code_table,
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.length = ARRAY_SIZE(rk3368_code_table),
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.data_mask = TSADCV3_DATA_MASK,
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.mode = ADC_INCREMENT,
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},
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@ -603,15 +609,15 @@ static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
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.tshut_temp = 95000,
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.initialize = rk_tsadcv2_initialize,
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.irq_ack = rk_tsadcv1_irq_ack,
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.irq_ack = rk_tsadcv3_irq_ack,
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.control = rk_tsadcv2_control,
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.get_temp = rk_tsadcv2_get_temp,
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.set_tshut_temp = rk_tsadcv2_tshut_temp,
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.set_tshut_mode = rk_tsadcv2_tshut_mode,
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.table = {
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.id = v4_code_table,
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.length = ARRAY_SIZE(v4_code_table),
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.id = rk3399_code_table,
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.length = ARRAY_SIZE(rk3399_code_table),
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.data_mask = TSADCV3_DATA_MASK,
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.mode = ADC_DECREMENT,
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},
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