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Topic branch for adding Exynos 5410 Odroid XU board for v4.8. 

This brings support for Hardkernel's Odroid XU board.  It was the first
 design with big.LITTLE SoC from Samsung: Exynos5410.  The board is not
 very popular.  Newer XU3 and XU4 got more attention.
 
 Board details:
 1. Exynos5410 octa-core (A15+A7, however as of now only one cluster is
    enabled),
 2. 2 GB DDR3 RAM,
 3. PowerVR SGX544MP3 GPU (not enabled in DTS),
 4. USB 3.0 Host x 1, USB 3.0 OTG x 1, USB 2.0 Host x 4,
 5. HDMI 1.4a, MIPI DSI and Display Port (Display Port not on all of
    revisions though),
 6. eMMC 4.5 and microSD slots.
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Merge tag 'samsung-dt-odroid-xu-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt

Topic branch for adding Exynos 5410 Odroid XU board for v4.8.

This brings support for Hardkernel's Odroid XU board.  It was the first
design with big.LITTLE SoC from Samsung: Exynos5410.  The board is not
very popular.  Newer XU3 and XU4 got more attention.

Board details:
1. Exynos5410 octa-core (A15+A7, however as of now only one cluster is
   enabled),
2. 2 GB DDR3 RAM,
3. PowerVR SGX544MP3 GPU (not enabled in DTS),
4. USB 3.0 Host x 1, USB 3.0 OTG x 1, USB 2.0 Host x 4,
5. HDMI 1.4a, MIPI DSI and Display Port (Display Port not on all of
   revisions though),
6. eMMC 4.5 and microSD slots.

* tag 'samsung-dt-odroid-xu-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (28 commits)
  ARM: dts: exynos: Add watchdog and Security SubSystem to Exynos5410
  ARM: dts: exynos: Configure PWM, usb3503, PMIC and thermal on Odroid XU board
  ARM: dts: exynos: Add Thermal Management Unit to Exynos5410
  ARM: dts: exynos: Interrupt for USB DWC3-1 differs between Exynos5420 and 5410
  dt-bindings: clock: Add watchdog and SSS clock IDs to Exynos5410
  dt-bindings: clock: Add TMU clock ID to Exynos5410
  ARM: dts: exynos: Add RTC and I2C to Exynos5410
  ARM: dts: exynos: Add I2C, PWM and UART pinctrl to Exynos5410
  ARM: dts: exynos: Move HSI2C nodes to exynos54xx.dtsi
  ARM: dts: exynos: Add initial support for Odroid XU board
  ARM: dts: exynos: Add USB to Exynos5410
  ARM: dts: exynos: Move common Exynos5410/542x/5800 nodes to new DTSI
  ARM: dts: exynos: MCT is not an interrupt controller and extend length of iomap
  ARM: dts: exynos: Enable UART3 on Exynos5410
  ARM: dts: exynos: Include common exynos5 in exynos5410.dtsi
  ARM: dts: exynos: Move Exynos5250 and Exynos5420 nodes under soc
  ARM: dts: exynos: Use phandle to get parent node in exynos5250-snow
  ARM: dts: exynos: Prepare for inclusion of exynos5.dtsi in exynos5410.dtsi
  ARM: dts: exynos: Move common nodes to exynos5.dtsi
  ARM: dts: exynos: Split Odroid XU3 LEDs to separate DTSI
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2016-06-13 14:51:58 -07:00
parent effd786282 b8bd7e23bb
commit 95eb940c0e
16 changed files with 3664 additions and 2701 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
View File

@ -47,6 +47,7 @@ Required root node properties:
- "hardkernel,odroid-u3" - for Exynos4412-based Hardkernel Odroid U3.
- "hardkernel,odroid-x" - for Exynos4412-based Hardkernel Odroid X.
- "hardkernel,odroid-x2" - for Exynos4412-based Hardkernel Odroid X2.
- "hardkernel,odroid-xu" - for Exynos5410-based Hardkernel Odroid XU.
- "hardkernel,odroid-xu3" - for Exynos5422-based Hardkernel Odroid XU3.
- "hardkernel,odroid-xu3-lite" - for Exynos5422-based Hardkernel
Odroid XU3 Lite board.

1
arch/arm/boot/dts/Makefile
View File

@ -134,6 +134,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
exynos5250-snow-rev5.dtb \
exynos5250-spring.dtb \
exynos5260-xyref5260.dtb \
exynos5410-odroidxu.dtb \
exynos5410-smdk5410.dtb \
exynos5420-arndale-octa.dtb \
exynos5420-peach-pit.dtb \

233
arch/arm/boot/dts/exynos5.dtsi
View File

@ -20,97 +20,160 @@
interrupt-parent = <&gic>;
aliases {
i2c0 = &i2c_0;
i2c1 = &i2c_1;
i2c2 = &i2c_2;
i2c3 = &i2c_3;
serial0 = &serial_0;
serial1 = &serial_1;
serial2 = &serial_2;
serial3 = &serial_3;
};
chipid@10000000 {
compatible = "samsung,exynos4210-chipid";
reg = <0x10000000 0x100>;
};
memory-controller@12250000 {
compatible = "samsung,exynos4210-srom";
reg = <0x12250000 0x14>;
};
combiner: interrupt-controller@10440000 {
compatible = "samsung,exynos4210-combiner";
#interrupt-cells = <2>;
interrupt-controller;
samsung,combiner-nr = <32>;
reg = <0x10440000 0x1000>;
interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
<0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
<0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
<0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
<0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
};
gic: interrupt-controller@10481000 {
compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x10481000 0x1000>,
<0x10482000 0x1000>,
<0x10484000 0x2000>,
<0x10486000 0x2000>;
interrupts = <1 9 0xf04>;
};
serial_0: serial@12C00000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C00000 0x100>;
interrupts = <0 51 0>;
};
serial_1: serial@12C10000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C10000 0x100>;
interrupts = <0 52 0>;
};
serial_2: serial@12C20000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C20000 0x100>;
interrupts = <0 53 0>;
};
serial_3: serial@12C30000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C30000 0x100>;
interrupts = <0 54 0>;
};
rtc: rtc@101E0000 {
compatible = "samsung,s3c6410-rtc";
reg = <0x101E0000 0x100>;
interrupts = <0 43 0>, <0 44 0>;
status = "disabled";
};
fimd: fimd@14400000 {
compatible = "samsung,exynos5250-fimd";
interrupt-parent = <&combiner>;
reg = <0x14400000 0x40000>;
interrupt-names = "fifo", "vsync", "lcd_sys";
interrupts = <18 4>, <18 5>, <18 6>;
samsung,sysreg = <&sysreg_system_controller>;
status = "disabled";
};
dp: dp-controller@145B0000 {
compatible = "samsung,exynos5-dp";
reg = <0x145B0000 0x1000>;
interrupts = <10 3>;
interrupt-parent = <&combiner>;
soc: soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
#size-cells = <1>;
ranges;
chipid@10000000 {
compatible = "samsung,exynos4210-chipid";
reg = <0x10000000 0x100>;
};
sromc: memory-controller@12250000 {
compatible = "samsung,exynos4210-srom";
reg = <0x12250000 0x14>;
};
combiner: interrupt-controller@10440000 {
compatible = "samsung,exynos4210-combiner";
#interrupt-cells = <2>;
interrupt-controller;
samsung,combiner-nr = <32>;
reg = <0x10440000 0x1000>;
interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
<0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
<0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
<0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
<0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
};
gic: interrupt-controller@10481000 {
compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x10481000 0x1000>,
<0x10482000 0x1000>,
<0x10484000 0x2000>,
<0x10486000 0x2000>;
interrupts = <1 9 0xf04>;
};
sysreg_system_controller: syscon@10050000 {
compatible = "samsung,exynos5-sysreg", "syscon";
reg = <0x10050000 0x5000>;
};
serial_0: serial@12C00000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C00000 0x100>;
interrupts = <0 51 0>;
};
serial_1: serial@12C10000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C10000 0x100>;
interrupts = <0 52 0>;
};
serial_2: serial@12C20000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C20000 0x100>;
interrupts = <0 53 0>;
};
serial_3: serial@12C30000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C30000 0x100>;
interrupts = <0 54 0>;
};
i2c_0: i2c@12C60000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C60000 0x100>;
interrupts = <0 56 0>;
#address-cells = <1>;
#size-cells = <0>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
i2c_1: i2c@12C70000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C70000 0x100>;
interrupts = <0 57 0>;
#address-cells = <1>;
#size-cells = <0>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
i2c_2: i2c@12C80000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C80000 0x100>;
interrupts = <0 58 0>;
#address-cells = <1>;
#size-cells = <0>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
i2c_3: i2c@12C90000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C90000 0x100>;
interrupts = <0 59 0>;
#address-cells = <1>;
#size-cells = <0>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
pwm: pwm@12DD0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x12DD0000 0x100>;
samsung,pwm-outputs = <0>, <1>, <2>, <3>;
#pwm-cells = <3>;
};
rtc: rtc@101E0000 {
compatible = "samsung,s3c6410-rtc";
reg = <0x101E0000 0x100>;
interrupts = <0 43 0>, <0 44 0>;
status = "disabled";
};
fimd: fimd@14400000 {
compatible = "samsung,exynos5250-fimd";
interrupt-parent = <&combiner>;
reg = <0x14400000 0x40000>;
interrupt-names = "fifo", "vsync", "lcd_sys";
interrupts = <18 4>, <18 5>, <18 6>;
samsung,sysreg = <&sysreg_system_controller>;
status = "disabled";
};
dp: dp-controller@145B0000 {
compatible = "samsung,exynos5-dp";
reg = <0x145B0000 0x1000>;
interrupts = <10 3>;
interrupt-parent = <&combiner>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
};

2
arch/arm/boot/dts/exynos5250-snow-common.dtsi
View File

@ -61,7 +61,7 @@
#address-cells = <1>;
#size-cells = <0>;
i2c-parent = <&{/i2c@12CA0000}>;
i2c-parent = <&i2c_4>;
our-claim-gpio = <&gpf0 3 GPIO_ACTIVE_LOW>;
their-claim-gpios = <&gpe0 4 GPIO_ACTIVE_LOW>;

1791
arch/arm/boot/dts/exynos5250.dtsi
View File

File diff suppressed because it is too large Load Diff

580
arch/arm/boot/dts/exynos5410-odroidxu.dts Normal file
View File

@ -0,0 +1,580 @@
/*
* Hardkernel Odroid XU board device tree source
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
* Copyright (c) 2016 Krzysztof Kozlowski
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "exynos5410.dtsi"
#include <dt-bindings/clock/maxim,max77802.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "exynos54xx-odroidxu-leds.dtsi"
/ {
model = "Hardkernel Odroid XU";
compatible = "hardkernel,odroid-xu", "samsung,exynos5410", "samsung,exynos5";
memory {
reg = <0x40000000 0x7ea00000>;
};
chosen {
linux,stdout-path = &serial_2;
};
emmc_pwrseq: pwrseq {
pinctrl-0 = <&emmc_nrst_pin>;
pinctrl-names = "default";
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>;
};
fan0: pwm-fan {
compatible = "pwm-fan";
pwms = <&pwm 0 20972 0>;
cooling-min-state = <0>;
cooling-max-state = <3>;
#cooling-cells = <2>;
cooling-levels = <0 130 170 230>;
};
fin_pll: xxti {
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "fin_pll";
#clock-cells = <0>;
};
firmware@02073000 {
compatible = "samsung,secure-firmware";
reg = <0x02073000 0x1000>;
};
};
&cpu0_thermal {
thermal-sensors = <&tmu_cpu0 0>;
polling-delay-passive = <0>;
polling-delay = <0>;
trips {
cpu_alert0: cpu-alert-0 {
temperature = <50000>; /* millicelsius */
hysteresis = <5000>; /* millicelsius */
type = "active";
};
cpu_alert1: cpu-alert-1 {
temperature = <60000>; /* millicelsius */
hysteresis = <5000>; /* millicelsius */
type = "active";
};
cpu_alert2: cpu-alert-2 {
temperature = <70000>; /* millicelsius */
hysteresis = <5000>; /* millicelsius */
type = "active";
};
cpu_crit0: cpu-crit-0 {
temperature = <120000>; /* millicelsius */
hysteresis = <0>; /* millicelsius */
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert0>;
cooling-device = <&fan0 0 1>;
};
map1 {
trip = <&cpu_alert1>;
cooling-device = <&fan0 1 2>;
};
map2 {
trip = <&cpu_alert2>;
cooling-device = <&fan0 2 3>;
};
};
};
&hsi2c_4 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <400000>;
status = "okay";
usb3503: usb-hub@08 {
compatible = "smsc,usb3503";
reg = <0x08>;
intn-gpios = <&gpx0 7 GPIO_ACTIVE_HIGH>;
connect-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpx1 4 GPIO_ACTIVE_HIGH>;
initial-mode = <1>;
clock-names = "refclk";
clocks = <&pmu_system_controller 0>;
refclk-frequency = <24000000>;
};
max77802: pmic@09 {
compatible = "maxim,max77802";
reg = <0x9>;
interrupt-parent = <&gpx0>;
interrupts = <4 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&max77802_irq>, <&pmic_dvs_1>, <&pmic_dvs_2>,
<&pmic_dvs_3>;
#clock-cells = <1>;
inl1-supply = <&buck5_reg>;
inl2-supply = <&buck7_reg>;
inl3-supply = <&buck9_reg>;
inl4-supply = <&buck9_reg>;
inl5-supply = <&buck9_reg>;
inl6-supply = <&buck10_reg>;
inl7-supply = <&buck9_reg>;
/* inl9 supply is BOOST, not configured here */
inl10-supply = <&buck7_reg>;
regulators {
buck1_reg: BUCK1 {
regulator-name = "vdd_mif";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1300000>;
regulator-always-on;
regulator-boot-on;
};
buck2_reg: BUCK2 {
regulator-name = "vdd_arm";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
};
buck3_reg: BUCK3 {
regulator-name = "vdd_int";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1400000>;
regulator-always-on;
regulator-boot-on;
};
buck4_reg: BUCK4 {
regulator-name = "vdd_g3d";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1400000>;
regulator-always-on;
regulator-boot-on;
};
buck5_reg: BUCK5 {
regulator-name = "vdd_mem";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
};
buck6_reg: BUCK6 {
regulator-name = "vdd_kfc";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
};
buck7_reg: BUCK7 {
regulator-name = "buck7";
regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1300000>;
regulator-always-on;
regulator-boot-on;
};
buck8_reg: BUCK8 {
/* vdd_mmc0 */
regulator-name = "vddf_2v85";
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
regulator-always-on;
regulator-boot-on;
};
buck9_reg: BUCK9 {
regulator-name = "buck9";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
regulator-boot-on;
};
buck10_reg: BUCK10 {
regulator-name = "buck10";
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
regulator-always-on;
regulator-boot-on;
};
ldo1_reg: LDO1 {
regulator-name = "vdd_alive";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
ldo2_reg: LDO2 {
regulator-name = "vddq_m1_m2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
ldo3_reg: LDO3 {
regulator-name = "vddq_gpio";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo4_reg: LDO4 {
regulator-name = "vddq_mmc2";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3000000>;
/* Having it off prevents reboot */
regulator-always-on;
};
ldo5_reg: LDO5 {
regulator-name = "vdd18_hsic";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo6_reg: LDO6 {
regulator-name = "vdd18_bpll";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo7_reg: LDO7 {
regulator-name = "vddq_lcd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo8_reg: LDO8 {
regulator-name = "vdd10_hdmi";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
ldo9_reg: LDO9 {
regulator-name = "ldo9";
};
ldo10_reg: LDO10 {
regulator-name = "vdd18_mipi";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo11_reg: LDO11 {
regulator-name = "vddq_mmc01";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
/*
* Having it off prevents accessing MMC after
* reboot with error:
* MMC Device 1: Clock OFF has been failed.
*/
regulator-always-on;
};
ldo12_reg: LDO12 {
regulator-name = "vdd33_usb3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ldo13_reg: LDO13 {
regulator-name = "vddq_abbg0";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo14_reg: LDO14 {
regulator-name = "vddq_abbg1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo15_reg: LDO15 {
regulator-name = "vdd10_usb3";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
ldo16_reg: LDO16 {
regulator-name = "ldo16";
};
ldo17_reg: LDO17 {
regulator-name = "cam_sensor_core";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
ldo18_reg: LDO18 {
regulator-name = "ldo18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo19_reg: LDO19 {
regulator-name = "ldo19";
};
ldo20_reg: LDO20 {
regulator-name = "vdd_mmc0";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo21_reg: LDO21 {
/* vdd_mmc2 */
regulator-name = "vddf_2v8";
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
};
ldo22_reg: LDO22 {
regulator-name = "ldo22";
};
ldo23_reg: LDO23 {
regulator-name = "dp_p3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ldo24_reg: LDO24 {
regulator-name = "cam_af";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
ldo25_reg: LDO25 {
regulator-name = "eth_p3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ldo26_reg: LDO26 {
regulator-name = "usb30_extclk";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ldo27_reg: LDO27 {
regulator-name = "ldo27";
};
ldo28_reg: LDO28 {
regulator-name = "ldo28";
};
ldo29_reg: LDO29 {
regulator-name = "ldo29";
};
ldo30_reg: LDO30 {
regulator-name = "vddq_e1_e2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
ldo31_reg: LDO31 {
regulator-name = "ldo31";
};
/* On revisions with ti,ina231 this is sensor VS */
ldo32_reg: LDO32 {
regulator-name = "vs_power_meter";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
ldo33_reg: LDO33 {
regulator-name = "ldo33";
};
ldo34_reg: LDO34 {
regulator-name = "ldo34";
};
ldo35_reg: LDO35 {
regulator-name = "ldo35";
};
};
};
};
&mmc_0 {
status = "okay";
mmc-pwrseq = <&emmc_pwrseq>;
cd-gpios = <&gpc0 2 GPIO_ACTIVE_LOW>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <0 4>;
samsung,dw-mshc-ddr-timing = <0 2>;
samsung,dw-mshc-hs400-timing = <0 2>;
samsung,read-strobe-delay = <90>;
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd>;
bus-width = <8>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
vmmc-supply = <&ldo20_reg>;
vqmmc-supply = <&ldo11_reg>;
};
&mmc_2 {
status = "okay";
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <0 4>;
samsung,dw-mshc-ddr-timing = <0 2>;
pinctrl-names = "default";
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
bus-width = <4>;
cap-sd-highspeed;
vmmc-supply = <&ldo21_reg>;
vqmmc-supply = <&ldo4_reg>;
};
&pinctrl_0 {
emmc_nrst_pin: emmc-nrst {
samsung,pins = "gpd1-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
pmic_dvs_3: pmic-dvs-3 {
samsung,pins = "gpx0-0";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
pmic_dvs_2: pmic-dvs-2 {
samsung,pins = "gpx0-1";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
pmic_dvs_1: pmic-dvs-1 {
samsung,pins = "gpx0-2";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
samsung,pin-val = <1>;
};
max77802_irq: max77802-irq {
samsung,pins = "gpx0-4";
samsung,pin-function = <0xf>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
};
&pwm {
/*
* PWM 0 -- fan
* PWM 1 -- Green LED
* PWM 2 -- Blue LED
* PWM 3 -- on MIPI connector for backlight
*/
pinctrl-0 = <&pwm0_out &pwm1_out &pwm2_out &pwm3_out>;
pinctrl-names = "default";
status = "okay";
};
&rtc {
status = "okay";
clocks = <&clock CLK_RTC>, <&max77802 MAX77802_CLK_32K_AP>;
clock-names = "rtc", "rtc_src";
};
&serial_0 {
status = "okay";
};
&serial_1 {
status = "okay";
};
&serial_2 {
status = "okay";
};
&serial_3 {
status = "okay";
};
&tmu_cpu0 {
vtmu-supply = <&ldo10_reg>;
};
&tmu_cpu1 {
vtmu-supply = <&ldo10_reg>;
};
&tmu_cpu2 {
vtmu-supply = <&ldo10_reg>;
};
&tmu_cpu3 {
vtmu-supply = <&ldo10_reg>;
};
&usbdrd_dwc3_0 {
dr_mode = "host";
};
&usbdrd_dwc3_1 {
dr_mode = "peripheral";
};
&usbdrd3_0 {
vdd33-supply = <&ldo12_reg>;
vdd10-supply = <&ldo15_reg>;
};
&usbdrd3_1 {
vdd33-supply = <&ldo12_reg>;
vdd10-supply = <&ldo15_reg>;
};

210
arch/arm/boot/dts/exynos5410-pinctrl.dtsi
View File

@ -277,6 +277,216 @@
interrupt-controller;
#interrupt-cells = <2>;
};
uart0_data: uart0-data {
samsung,pins = "gpa0-0", "gpa0-1";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
uart0_fctl: uart0-fctl {
samsung,pins = "gpa0-2", "gpa0-3";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
uart1_data: uart1-data {
samsung,pins = "gpa0-4", "gpa0-5";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
uart1_fctl: uart1-fctl {
samsung,pins = "gpa0-6", "gpa0-7";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
i2c2_bus: i2c2-bus {
samsung,pins = "gpa0-6", "gpa0-7";
samsung,pin-function = <3>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
uart2_data: uart2-data {
samsung,pins = "gpa1-0", "gpa1-1";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
uart2_fctl: uart2-fctl {
samsung,pins = "gpa1-2", "gpa1-3";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
i2c3_bus: i2c3-bus {
samsung,pins = "gpa1-2", "gpa1-3";
samsung,pin-function = <3>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
uart3_data: uart3-data {
samsung,pins = "gpa1-4", "gpa1-5";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
i2c4_hs_bus: i2c4-hs-bus {
samsung,pins = "gpa2-0", "gpa2-1";
samsung,pin-function = <3>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
i2c5_hs_bus: i2c5-hs-bus {
samsung,pins = "gpa2-2", "gpa2-3";
samsung,pin-function = <3>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
i2c6_hs_bus: i2c6-hs-bus {
samsung,pins = "gpb1-3", "gpb1-4";
samsung,pin-function = <4>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
pwm0_out: pwm0-out {
samsung,pins = "gpb2-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
pwm1_out: pwm1-out {
samsung,pins = "gpb2-1";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
pwm2_out: pwm2-out {
samsung,pins = "gpb2-2";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
pwm3_out: pwm3-out {
samsung,pins = "gpb2-3";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
i2c7_hs_bus: i2c7-hs-bus {
samsung,pins = "gpb2-2", "gpb2-3";
samsung,pin-function = <3>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
i2c0_bus: i2c0-bus {
samsung,pins = "gpb3-0", "gpb3-1";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
i2c1_bus: i2c1-bus {
samsung,pins = "gpb3-2", "gpb3-3";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
sd0_clk: sd0-clk {
samsung,pins = "gpc0-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};
sd0_cmd: sd0-cmd {
samsung,pins = "gpc0-1";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};
sd0_cd: sd0-cd {
samsung,pins = "gpc0-2";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <3>;
};
sd0_bus1: sd0-bus-width1 {
samsung,pins = "gpc0-3";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <3>;
};
sd0_bus4: sd0-bus-width4 {
samsung,pins = "gpc0-4", "gpc0-5", "gpc0-6";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <3>;
};
sd2_clk: sd2-clk {
samsung,pins = "gpc2-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};
sd2_cmd: sd2-cmd {
samsung,pins = "gpc2-1";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};
sd2_cd: sd2-cd {
samsung,pins = "gpc2-2";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <3>;
};
sd2_bus1: sd2-bus-width1 {
samsung,pins = "gpc2-3";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <3>;
};
sd2_bus4: sd2-bus-width4 {
samsung,pins = "gpc2-4", "gpc2-5", "gpc2-6";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <3>;
};
sd0_bus8: sd0-bus-width8 {
samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <3>;
};
};
&pinctrl_1 {

6
arch/arm/boot/dts/exynos5410-smdk5410.dts
View File

@ -102,14 +102,14 @@
};
};
&uart0 {
&serial_0 {
status = "okay";
};
&uart1 {
&serial_1 {
status = "okay";
};
&uart2 {
&serial_2 {
status = "okay";
};

337
arch/arm/boot/dts/exynos5410.dtsi
View File

@ -13,9 +13,10 @@
* published by the Free Software Foundation.
*/
#include "skeleton.dtsi"
#include "exynos54xx.dtsi"
#include "exynos-syscon-restart.dtsi"
#include <dt-bindings/clock/exynos5410.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
compatible = "samsung,exynos5410", "samsung,exynos5";
@ -26,37 +27,34 @@
pinctrl1 = &pinctrl_1;
pinctrl2 = &pinctrl_2;
pinctrl3 = &pinctrl_3;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
CPU0: cpu@0 {
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x0>;
clock-frequency = <1600000000>;
};
CPU1: cpu@1 {
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x1>;
clock-frequency = <1600000000>;
};
CPU2: cpu@2 {
cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x2>;
clock-frequency = <1600000000>;
};
CPU3: cpu@3 {
cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x3>;
@ -70,99 +68,12 @@
#size-cells = <1>;
ranges;
combiner: interrupt-controller@10440000 {
compatible = "samsung,exynos4210-combiner";
#interrupt-cells = <2>;
interrupt-controller;
samsung,combiner-nr = <32>;
reg = <0x10440000 0x1000>;
interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
<0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
<0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
<0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
<0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
};
gic: interrupt-controller@10481000 {
compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x10481000 0x1000>,
<0x10482000 0x1000>,
<0x10484000 0x2000>,
<0x10486000 0x2000>;
interrupts = <1 9 0xf04>;
};
chipid@10000000 {
compatible = "samsung,exynos4210-chipid";
reg = <0x10000000 0x100>;
};
sromc: memory-controller@12250000 {
compatible = "samsung,exynos4210-srom";
reg = <0x12250000 0x14>;
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0x04000000 0x20000
1 0 0x05000000 0x20000
2 0 0x06000000 0x20000
3 0 0x07000000 0x20000>;
};
pmu_system_controller: system-controller@10040000 {
compatible = "samsung,exynos5410-pmu", "syscon";
reg = <0x10040000 0x5000>;
};
mct: mct@101C0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x101C0000 0xB00>;
interrupt-parent = <&interrupt_map>;
interrupts = <0>, <1>, <2>, <3>,
<4>, <5>, <6>, <7>,
<8>, <9>, <10>, <11>;
clocks = <&fin_pll>, <&clock CLK_MCT>;
clock-names = "fin_pll", "mct";
interrupt_map: interrupt-map {
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = <0 &combiner 23 3>,
<1 &combiner 23 4>,
<2 &combiner 25 2>,
<3 &combiner 25 3>,
<4 &gic 0 120 0>,
<5 &gic 0 121 0>,
<6 &gic 0 122 0>,
<7 &gic 0 123 0>,
<8 &gic 0 128 0>,
<9 &gic 0 129 0>,
<10 &gic 0 130 0>,
<11 &gic 0 131 0>;
};
};
sysram@02020000 {
compatible = "mmio-sram";
reg = <0x02020000 0x54000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x02020000 0x54000>;
smp-sysram@0 {
compatible = "samsung,exynos4210-sysram";
reg = <0x0 0x1000>;
};
smp-sysram@53000 {
compatible = "samsung,exynos4210-sysram-ns";
reg = <0x53000 0x1000>;
};
clock-names = "clkout16";
clocks = <&fin_pll>;
#clock-cells = <1>;
};
clock: clock-controller@10010000 {
@ -171,6 +82,42 @@
#clock-cells = <1>;
};
tmu_cpu0: tmu@10060000 {
compatible = "samsung,exynos5420-tmu";
reg = <0x10060000 0x100>;
interrupts = <GIC_SPI 65 0>;
clocks = <&clock CLK_TMU>;
clock-names = "tmu_apbif";
#include "exynos4412-tmu-sensor-conf.dtsi"
};
tmu_cpu1: tmu@10064000 {
compatible = "samsung,exynos5420-tmu";
reg = <0x10064000 0x100>;
interrupts = <GIC_SPI 183 0>;
clocks = <&clock CLK_TMU>;
clock-names = "tmu_apbif";
#include "exynos4412-tmu-sensor-conf.dtsi"
};
tmu_cpu2: tmu@10068000 {
compatible = "samsung,exynos5420-tmu";
reg = <0x10068000 0x100>;
interrupts = <GIC_SPI 184 0>;
clocks = <&clock CLK_TMU>;
clock-names = "tmu_apbif";
#include "exynos4412-tmu-sensor-conf.dtsi"
};
tmu_cpu3: tmu@1006c000 {
compatible = "samsung,exynos5420-tmu";
reg = <0x1006c000 0x100>;
interrupts = <GIC_SPI 185 0>;
clocks = <&clock CLK_TMU>;
clock-names = "tmu_apbif";
#include "exynos4412-tmu-sensor-conf.dtsi"
};
mmc_0: mmc@12200000 {
compatible = "samsung,exynos5250-dw-mshc";
reg = <0x12200000 0x1000>;
@ -236,34 +183,182 @@
reg = <0x03860000 0x1000>;
interrupts = <0 47 0>;
};
};
uart0: serial@12C00000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C00000 0x100>;
interrupts = <0 51 0>;
clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
clock-names = "uart", "clk_uart_baud0";
status = "disabled";
thermal-zones {
cpu0_thermal: cpu0-thermal {
thermal-sensors = <&tmu_cpu0>;
#include "exynos5420-trip-points.dtsi"
};
uart1: serial@12C10000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C10000 0x100>;
interrupts = <0 52 0>;
clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
clock-names = "uart", "clk_uart_baud0";
status = "disabled";
cpu1_thermal: cpu1-thermal {
thermal-sensors = <&tmu_cpu1>;
#include "exynos5420-trip-points.dtsi"
};
uart2: serial@12C20000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C20000 0x100>;
interrupts = <0 53 0>;
clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
clock-names = "uart", "clk_uart_baud0";
status = "disabled";
cpu2_thermal: cpu2-thermal {
thermal-sensors = <&tmu_cpu2>;
#include "exynos5420-trip-points.dtsi"
};
cpu3_thermal: cpu3-thermal {
thermal-sensors = <&tmu_cpu3>;
#include "exynos5420-trip-points.dtsi"
};
};
};
&i2c_0 {
clocks = <&clock CLK_I2C0>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_bus>;
};
&i2c_1 {
clocks = <&clock CLK_I2C1>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_bus>;
};
&i2c_2 {
clocks = <&clock CLK_I2C2>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c2_bus>;
};
&i2c_3 {
clocks = <&clock CLK_I2C3>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c3_bus>;
};
&hsi2c_4 {
clocks = <&clock CLK_USI0>;
clock-names = "hsi2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c4_hs_bus>;
};
&hsi2c_5 {
clocks = <&clock CLK_USI1>;
clock-names = "hsi2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c5_hs_bus>;
};
&hsi2c_6 {
clocks = <&clock CLK_USI2>;
clock-names = "hsi2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c6_hs_bus>;
};
&hsi2c_7 {
clocks = <&clock CLK_USI3>;
clock-names = "hsi2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c7_hs_bus>;
};
&mct {
clocks = <&fin_pll>, <&clock CLK_MCT>;
clock-names = "fin_pll", "mct";
};
&pwm {
clocks = <&clock CLK_PWM>;
clock-names = "timers";
};
&rtc {
clocks = <&clock CLK_RTC>;
clock-names = "rtc";
interrupt-parent = <&pmu_system_controller>;
status = "disabled";
};
&serial_0 {
clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
clock-names = "uart", "clk_uart_baud0";
};
&serial_1 {
clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
clock-names = "uart", "clk_uart_baud0";
};
&serial_2 {
clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
clock-names = "uart", "clk_uart_baud0";
};
&serial_3 {
clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
clock-names = "uart", "clk_uart_baud0";
};
&sss {
clocks = <&clock CLK_SSS>;
clock-names = "secss";
};
&sromc {
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0x04000000 0x20000
1 0 0x05000000 0x20000
2 0 0x06000000 0x20000
3 0 0x07000000 0x20000>;
};
&usbdrd3_0 {
clocks = <&clock CLK_USBD300>;
clock-names = "usbdrd30";
};
&usbdrd_phy0 {
clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBPHY300>;
clock-names = "phy", "ref";
samsung,pmu-syscon = <&pmu_system_controller>;
};
&usbdrd3_1 {
clocks = <&clock CLK_USBD301>;
clock-names = "usbdrd30";
};
&usbdrd_dwc3_1 {
interrupts = <GIC_SPI 200 0>;
};
&usbdrd_phy1 {
clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBPHY301>;
clock-names = "phy", "ref";
samsung,pmu-syscon = <&pmu_system_controller>;
};
&usbhost1 {
clocks = <&clock CLK_USBH20>;
clock-names = "usbhost";
};
&usbhost2 {
clocks = <&clock CLK_USBH20>;
clock-names = "usbhost";
};
&usb2_phy {
clocks = <&clock CLK_USBH20>, <&clock CLK_SCLK_USBPHY300>;
clock-names = "phy", "ref";
samsung,sysreg-phandle = <&sysreg_system_controller>;
samsung,pmureg-phandle = <&pmu_system_controller>;
};
&watchdog {
clocks = <&clock CLK_WDT>;
clock-names = "watchdog";
samsung,syscon-phandle = <&pmu_system_controller>;
};
#include "exynos5410-pinctrl.dtsi"

14
arch/arm/boot/dts/exynos5420-pinctrl.dtsi
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@ -193,13 +193,6 @@
samsung,pin-drv = <3>;
};
sd1_clk: sd1-clk {
samsung,pins = "gpc1-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};
sd0_rclk: sd0-rclk {
samsung,pins = "gpc0-7";
samsung,pin-function = <2>;
@ -207,6 +200,13 @@
samsung,pin-drv = <3>;
};
sd1_clk: sd1-clk {
samsung,pins = "gpc1-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};
sd1_cmd: sd1-cmd {
samsung,pins = "gpc1-1";
samsung,pin-function = <2>;

2795
arch/arm/boot/dts/exynos5420.dtsi
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35
arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
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@ -14,44 +14,11 @@
/dts-v1/;
#include "exynos5422-odroidxu3-common.dtsi"
#include "exynos5422-odroidxu3-audio.dtsi"
#include "exynos54xx-odroidxu-leds.dtsi"
/ {
model = "Hardkernel Odroid XU3 Lite";
compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", "samsung,exynos5";
pwmleds {
compatible = "pwm-leds";
greenled {
label = "green:mmc0";
pwms = <&pwm 1 2000000 0>;
pwm-names = "pwm1";
/*
* Green LED is much brighter than the others
* so limit its max brightness
*/
max_brightness = <127>;
linux,default-trigger = "mmc0";
};
blueled {
label = "blue:heartbeat";
pwms = <&pwm 2 2000000 0>;
pwm-names = "pwm2";
max_brightness = <255>;
linux,default-trigger = "heartbeat";
};
};
gpioleds {
compatible = "gpio-leds";
redled {
label = "red:microSD";
gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "mmc1";
};
};
};
&pwm {

35
arch/arm/boot/dts/exynos5422-odroidxu3.dts
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@ -13,44 +13,11 @@
/dts-v1/;
#include "exynos5422-odroidxu3-common.dtsi"
#include "exynos5422-odroidxu3-audio.dtsi"
#include "exynos54xx-odroidxu-leds.dtsi"
/ {
model = "Hardkernel Odroid XU3";
compatible = "hardkernel,odroid-xu3", "samsung,exynos5800", "samsung,exynos5";
pwmleds {
compatible = "pwm-leds";
greenled {
label = "green:mmc0";
pwms = <&pwm 1 2000000 0>;
pwm-names = "pwm1";
/*
* Green LED is much brighter than the others
* so limit its max brightness
*/
max_brightness = <127>;
linux,default-trigger = "mmc0";
};
blueled {
label = "blue:heartbeat";
pwms = <&pwm 2 2000000 0>;
pwm-names = "pwm2";
max_brightness = <255>;
linux,default-trigger = "heartbeat";
};
};
gpioleds {
compatible = "gpio-leds";
redled {
label = "red:microSD";
gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "mmc1";
};
};
};
&i2c_0 {

50
arch/arm/boot/dts/exynos54xx-odroidxu-leds.dtsi Normal file
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@ -0,0 +1,50 @@
/*
* Hardkernel Odroid XU/XU3 LED device tree source
*
* Copyright (c) 2015,2016 Krzysztof Kozlowski
* Copyright (c) 2014 Collabora Ltd.
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <dt-bindings/gpio/gpio.h>
/ {
pwmleds {
compatible = "pwm-leds";
greenled {
label = "green:mmc0";
pwms = <&pwm 1 2000000 0>;
pwm-names = "pwm1";
/*
* Green LED is much brighter than the others
* so limit its max brightness
*/
max_brightness = <127>;
linux,default-trigger = "mmc0";
};
blueled {
label = "blue:heartbeat";
pwms = <&pwm 2 2000000 0>;
pwm-names = "pwm2";
max_brightness = <255>;
linux,default-trigger = "heartbeat";
};
};
gpioleds {
compatible = "gpio-leds";
redled {
label = "red:microSD";
gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "mmc1";
};
};
};

199
arch/arm/boot/dts/exynos54xx.dtsi Normal file
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@ -0,0 +1,199 @@
/*
* Samsung's Exynos54xx SoC series common device tree source
*
* Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
* Copyright (c) 2016 Krzysztof Kozlowski
*
* Device nodes common for Samsung Exynos5410/5420/5422/5800. Specific
* Exynos 54xx SoCs should include this file and customize it further
* (e.g. with clocks).
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "skeleton.dtsi"
#include "exynos5.dtsi"
/ {
compatible = "samsung,exynos5";
aliases {
i2c4 = &hsi2c_4;
i2c5 = &hsi2c_5;
i2c6 = &hsi2c_6;
i2c7 = &hsi2c_7;
usbdrdphy0 = &usbdrd_phy0;
usbdrdphy1 = &usbdrd_phy1;
};
soc: soc {
sysram@02020000 {
compatible = "mmio-sram";
reg = <0x02020000 0x54000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x02020000 0x54000>;
smp-sysram@0 {
compatible = "samsung,exynos4210-sysram";
reg = <0x0 0x1000>;
};
smp-sysram@53000 {
compatible = "samsung,exynos4210-sysram-ns";
reg = <0x53000 0x1000>;
};
};
mct: mct@101c0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x101c0000 0xb00>;
interrupt-parent = <&mct_map>;
interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>,
<8>, <9>, <10>, <11>;
mct_map: mct-map {
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = <0 &combiner 23 3>,
<1 &combiner 23 4>,
<2 &combiner 25 2>,
<3 &combiner 25 3>,
<4 &gic 0 120 0>,
<5 &gic 0 121 0>,
<6 &gic 0 122 0>,
<7 &gic 0 123 0>,
<8 &gic 0 128 0>,
<9 &gic 0 129 0>,
<10 &gic 0 130 0>,
<11 &gic 0 131 0>;
};
};
watchdog: watchdog@101d0000 {
compatible = "samsung,exynos5420-wdt";
reg = <0x101d0000 0x100>;
interrupts = <0 42 0>;
};
sss: sss@10830000 {
compatible = "samsung,exynos4210-secss";
reg = <0x10830000 0x300>;
interrupts = <0 112 0>;
};
/* i2c_0-3 are defined in exynos5.dtsi */
hsi2c_4: i2c@12ca0000 {
compatible = "samsung,exynos5250-hsi2c";
reg = <0x12ca0000 0x1000>;
interrupts = <0 60 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
hsi2c_5: i2c@12cb0000 {
compatible = "samsung,exynos5250-hsi2c";
reg = <0x12cb0000 0x1000>;
interrupts = <0 61 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
hsi2c_6: i2c@12cc0000 {
compatible = "samsung,exynos5250-hsi2c";
reg = <0x12cc0000 0x1000>;
interrupts = <0 62 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
hsi2c_7: i2c@12cd0000 {
compatible = "samsung,exynos5250-hsi2c";
reg = <0x12cd0000 0x1000>;
interrupts = <0 63 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
usbdrd3_0: usb3-0 {
compatible = "samsung,exynos5250-dwusb3";
#address-cells = <1>;
#size-cells = <1>;
ranges;
usbdrd_dwc3_0: dwc3@12000000 {
compatible = "snps,dwc3";
reg = <0x12000000 0x10000>;
interrupts = <0 72 0>;
phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>;
phy-names = "usb2-phy", "usb3-phy";
};
};
usbdrd_phy0: phy@12100000 {
compatible = "samsung,exynos5420-usbdrd-phy";
reg = <0x12100000 0x100>;
#phy-cells = <1>;
};
usbdrd3_1: usb3-1 {
compatible = "samsung,exynos5250-dwusb3";
#address-cells = <1>;
#size-cells = <1>;
ranges;
usbdrd_dwc3_1: dwc3@12400000 {
compatible = "snps,dwc3";
reg = <0x12400000 0x10000>;
phys = <&usbdrd_phy1 0>, <&usbdrd_phy1 1>;
phy-names = "usb2-phy", "usb3-phy";
};
};
usbdrd_phy1: phy@12500000 {
compatible = "samsung,exynos5420-usbdrd-phy";
reg = <0x12500000 0x100>;
#phy-cells = <1>;
};
usbhost2: usb@12110000 {
compatible = "samsung,exynos4210-ehci";
reg = <0x12110000 0x100>;
interrupts = <0 71 0>;
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
phys = <&usb2_phy 1>;
};
};
usbhost1: usb@12120000 {
compatible = "samsung,exynos4210-ohci";
reg = <0x12120000 0x100>;
interrupts = <0 71 0>;
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
phys = <&usb2_phy 1>;
};
};
usb2_phy: phy@12130000 {
compatible = "samsung,exynos5250-usb2-phy";
reg = <0x12130000 0x100>;
#phy-cells = <1>;
};
};
};

76
include/dt-bindings/clock/exynos5410.h
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@ -1,33 +1,65 @@
/*
* Copyright (c) 2014 Samsung Electronics Co., Ltd.
* Copyright (c) 2016 Krzysztof Kozlowski
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Device Tree binding constants for Exynos5421 clock controller.
*/
#ifndef _DT_BINDINGS_CLOCK_EXYNOS_5410_H
#define _DT_BINDINGS_CLOCK_EXYNOS_5410_H
/* core clocks */
#define CLK_FIN_PLL 1
#define CLK_FOUT_APLL 2
#define CLK_FOUT_CPLL 3
#define CLK_FOUT_MPLL 4
#define CLK_FOUT_BPLL 5
#define CLK_FOUT_KPLL 6
#define CLK_FIN_PLL 1
#define CLK_FOUT_APLL 2
#define CLK_FOUT_CPLL 3
#define CLK_FOUT_MPLL 4
#define CLK_FOUT_BPLL 5
#define CLK_FOUT_KPLL 6
/* gate for special clocks (sclk) */
#define CLK_SCLK_UART0 128
#define CLK_SCLK_UART1 129
#define CLK_SCLK_UART2 130
#define CLK_SCLK_UART3 131
#define CLK_SCLK_MMC0 132
#define CLK_SCLK_MMC1 133
#define CLK_SCLK_MMC2 134
#define CLK_SCLK_UART0 128
#define CLK_SCLK_UART1 129
#define CLK_SCLK_UART2 130
#define CLK_SCLK_UART3 131
#define CLK_SCLK_MMC0 132
#define CLK_SCLK_MMC1 133
#define CLK_SCLK_MMC2 134
#define CLK_SCLK_USBD300 150
#define CLK_SCLK_USBD301 151
#define CLK_SCLK_USBPHY300 152
#define CLK_SCLK_USBPHY301 153
#define CLK_SCLK_PWM 155
/* gate clocks */
#define CLK_UART0 257
#define CLK_UART1 258
#define CLK_UART2 259
#define CLK_UART3 260
#define CLK_MCT 315
#define CLK_MMC0 351
#define CLK_MMC1 352
#define CLK_MMC2 353
#define CLK_UART0 257
#define CLK_UART1 258
#define CLK_UART2 259
#define CLK_I2C0 261
#define CLK_I2C1 262
#define CLK_I2C2 263
#define CLK_I2C3 264
#define CLK_USI0 265
#define CLK_USI1 266
#define CLK_USI2 267
#define CLK_USI3 268
#define CLK_UART3 260
#define CLK_PWM 279
#define CLK_MCT 315
#define CLK_WDT 316
#define CLK_RTC 317
#define CLK_TMU 318
#define CLK_MMC0 351
#define CLK_MMC1 352
#define CLK_MMC2 353
#define CLK_USBH20 365
#define CLK_USBD300 366
#define CLK_USBD301 367
#define CLK_SSS 471
#define CLK_NR_CLKS 512
#define CLK_NR_CLKS 512
#endif /* _DT_BINDINGS_CLOCK_EXYNOS_5410_H */