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drm/nvc0/pm: more complete parsing of clock domains 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2011-06-21 15:12:26 +10:00
parent 354d0781e5
commit 9698b9a680
4 changed files with 31 additions and 19 deletions
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11
drivers/gpu/drm/nouveau/nouveau_drv.h
View File

@ -449,10 +449,15 @@ struct nouveau_pm_level {
u32 core;
u32 memory;
u32 shader;
u32 rop;
u32 copy;
u32 daemon;
u32 vdec;
u32 unk05;
u32 unk0a;
u32 unka0;
u32 unk05; /* nv50:nva3, roughly.. */
u32 unka0; /* nva3:nvc0 */
u32 hub01; /* nvc0- */
u32 hub06; /* nvc0- */
u32 hub07; /* nvc0- */
u32 volt_min; /* microvolts */
u32 volt_max;

31
drivers/gpu/drm/nouveau/nouveau_perf.c
View File

@ -284,28 +284,27 @@ nouveau_perf_init(struct drm_device *dev)
perflvl->unk05 = ROM16(entry[16]) * 1000;
break;
case 0x40:
#define subent(n) entry[perf[2] + ((n) * perf[3])]
#define subent(n) (ROM16(entry[perf[2] + ((n) * perf[3])]) & 0xfff) * 1000
perflvl->fanspeed = 0; /*XXX*/
perflvl->volt_min = entry[2];
if (dev_priv->card_type == NV_50) {
perflvl->core = ROM16(subent(0)) & 0xfff;
perflvl->shader = ROM16(subent(1)) & 0xfff;
perflvl->memory = ROM16(subent(2)) & 0xfff;
perflvl->vdec = ROM16(subent(3)) & 0xfff;
perflvl->unka0 = ROM16(subent(4)) & 0xfff;
perflvl->core = subent(0);
perflvl->shader = subent(1);
perflvl->memory = subent(2);
perflvl->vdec = subent(3);
perflvl->unka0 = subent(4);
} else {
perflvl->shader = ROM16(subent(3)) & 0xfff;
perflvl->hub06 = subent(0);
perflvl->hub01 = subent(1);
perflvl->copy = subent(2);
perflvl->shader = subent(3);
perflvl->rop = subent(4);
perflvl->memory = subent(5);
perflvl->vdec = subent(6);
perflvl->daemon = subent(10);
perflvl->hub07 = subent(11);
perflvl->core = perflvl->shader / 2;
perflvl->unk0a = ROM16(subent(4)) & 0xfff;
perflvl->memory = ROM16(subent(5)) & 0xfff;
}
perflvl->core *= 1000;
perflvl->shader *= 1000;
perflvl->memory *= 1000;
perflvl->unk0a *= 1000;
perflvl->vdec *= 1000;
perflvl->unka0 *= 1000;
break;
}

2
drivers/gpu/drm/nouveau/nva3_pm.c
View File

@ -215,6 +215,8 @@ nva3_pm_clocks_get(struct drm_device *dev, struct nouveau_pm_level *perflvl)
perflvl->memory = read_pll(dev, 0x02, 0x4000);
perflvl->unka0 = read_clk(dev, 0x20, false);
perflvl->vdec = read_clk(dev, 0x21, false);
perflvl->daemon = read_clk(dev, 0x25, false);
perflvl->copy = perflvl->core;
return 0;
}

6
drivers/gpu/drm/nouveau/nvc0_pm.c
View File

@ -140,6 +140,12 @@ nvc0_pm_clocks_get(struct drm_device *dev, struct nouveau_pm_level *perflvl)
perflvl->shader = read_clk(dev, 0x00);
perflvl->core = perflvl->shader / 2;
perflvl->memory = read_mem(dev);
perflvl->rop = read_clk(dev, 0x01);
perflvl->hub07 = read_clk(dev, 0x02);
perflvl->hub06 = read_clk(dev, 0x07);
perflvl->hub01 = read_clk(dev, 0x08);
perflvl->copy = read_clk(dev, 0x09);
perflvl->daemon = read_clk(dev, 0x0c);
perflvl->vdec = read_clk(dev, 0x0e);
return 0;
}