ARM: uaccess: consolidate uaccess asm to asm/uaccess-asm.h
[ Upstream commit 747ffc2fcf
]
Consolidate the user access assembly code to asm/uaccess-asm.h. This
moves the csdb, check_uaccess, uaccess_mask_range_ptr, uaccess_enable,
uaccess_disable, uaccess_save, uaccess_restore macros, and creates two
new ones for exception entry and exit - uaccess_entry and uaccess_exit.
This makes the uaccess_save and uaccess_restore macros private to
asm/uaccess-asm.h.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
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@ -18,11 +18,11 @@
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#endif
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#include <asm/ptrace.h>
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#include <asm/domain.h>
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#include <asm/opcodes-virt.h>
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#include <asm/asm-offsets.h>
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#include <asm/page.h>
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#include <asm/thread_info.h>
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#include <asm/uaccess-asm.h>
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#define IOMEM(x) (x)
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@ -446,79 +446,6 @@ THUMB( orr \reg , \reg , #PSR_T_BIT )
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.size \name , . - \name
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.endm
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.macro csdb
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#ifdef CONFIG_THUMB2_KERNEL
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.inst.w 0xf3af8014
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#else
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.inst 0xe320f014
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#endif
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.endm
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.macro check_uaccess, addr:req, size:req, limit:req, tmp:req, bad:req
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#ifndef CONFIG_CPU_USE_DOMAINS
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adds \tmp, \addr, #\size - 1
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sbcscc \tmp, \tmp, \limit
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bcs \bad
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#ifdef CONFIG_CPU_SPECTRE
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movcs \addr, #0
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csdb
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#endif
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#endif
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.endm
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.macro uaccess_mask_range_ptr, addr:req, size:req, limit:req, tmp:req
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#ifdef CONFIG_CPU_SPECTRE
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sub \tmp, \limit, #1
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subs \tmp, \tmp, \addr @ tmp = limit - 1 - addr
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addhs \tmp, \tmp, #1 @ if (tmp >= 0) {
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subshs \tmp, \tmp, \size @ tmp = limit - (addr + size) }
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movlo \addr, #0 @ if (tmp < 0) addr = NULL
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csdb
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#endif
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.endm
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.macro uaccess_disable, tmp, isb=1
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#ifdef CONFIG_CPU_SW_DOMAIN_PAN
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/*
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* Whenever we re-enter userspace, the domains should always be
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* set appropriately.
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*/
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mov \tmp, #DACR_UACCESS_DISABLE
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mcr p15, 0, \tmp, c3, c0, 0 @ Set domain register
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.if \isb
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instr_sync
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.endif
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#endif
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.endm
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.macro uaccess_enable, tmp, isb=1
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#ifdef CONFIG_CPU_SW_DOMAIN_PAN
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/*
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* Whenever we re-enter userspace, the domains should always be
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* set appropriately.
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*/
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mov \tmp, #DACR_UACCESS_ENABLE
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mcr p15, 0, \tmp, c3, c0, 0
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.if \isb
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instr_sync
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.endif
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#endif
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.endm
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.macro uaccess_save, tmp
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#ifdef CONFIG_CPU_SW_DOMAIN_PAN
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mrc p15, 0, \tmp, c3, c0, 0
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str \tmp, [sp, #SVC_DACR]
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#endif
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.endm
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.macro uaccess_restore
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#ifdef CONFIG_CPU_SW_DOMAIN_PAN
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ldr r0, [sp, #SVC_DACR]
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mcr p15, 0, r0, c3, c0, 0
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#endif
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.endm
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.irp c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo
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.macro ret\c, reg
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#if __LINUX_ARM_ARCH__ < 6
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106
arch/arm/include/asm/uaccess-asm.h
Normal file
106
arch/arm/include/asm/uaccess-asm.h
Normal file
@ -0,0 +1,106 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __ASM_UACCESS_ASM_H__
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#define __ASM_UACCESS_ASM_H__
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#include <asm/asm-offsets.h>
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#include <asm/domain.h>
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#include <asm/memory.h>
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#include <asm/thread_info.h>
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.macro csdb
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#ifdef CONFIG_THUMB2_KERNEL
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.inst.w 0xf3af8014
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#else
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.inst 0xe320f014
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#endif
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.endm
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.macro check_uaccess, addr:req, size:req, limit:req, tmp:req, bad:req
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#ifndef CONFIG_CPU_USE_DOMAINS
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adds \tmp, \addr, #\size - 1
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sbcscc \tmp, \tmp, \limit
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bcs \bad
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#ifdef CONFIG_CPU_SPECTRE
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movcs \addr, #0
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csdb
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#endif
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#endif
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.endm
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.macro uaccess_mask_range_ptr, addr:req, size:req, limit:req, tmp:req
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#ifdef CONFIG_CPU_SPECTRE
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sub \tmp, \limit, #1
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subs \tmp, \tmp, \addr @ tmp = limit - 1 - addr
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addhs \tmp, \tmp, #1 @ if (tmp >= 0) {
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subshs \tmp, \tmp, \size @ tmp = limit - (addr + size) }
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movlo \addr, #0 @ if (tmp < 0) addr = NULL
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csdb
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#endif
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.endm
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.macro uaccess_disable, tmp, isb=1
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#ifdef CONFIG_CPU_SW_DOMAIN_PAN
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/*
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* Whenever we re-enter userspace, the domains should always be
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* set appropriately.
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*/
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mov \tmp, #DACR_UACCESS_DISABLE
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mcr p15, 0, \tmp, c3, c0, 0 @ Set domain register
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.if \isb
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instr_sync
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.endif
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#endif
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.endm
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.macro uaccess_enable, tmp, isb=1
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#ifdef CONFIG_CPU_SW_DOMAIN_PAN
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/*
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* Whenever we re-enter userspace, the domains should always be
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* set appropriately.
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*/
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mov \tmp, #DACR_UACCESS_ENABLE
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mcr p15, 0, \tmp, c3, c0, 0
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.if \isb
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instr_sync
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.endif
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#endif
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.endm
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.macro uaccess_save, tmp
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#ifdef CONFIG_CPU_SW_DOMAIN_PAN
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mrc p15, 0, \tmp, c3, c0, 0
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str \tmp, [sp, #SVC_DACR]
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#endif
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.endm
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.macro uaccess_restore
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#ifdef CONFIG_CPU_SW_DOMAIN_PAN
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ldr r0, [sp, #SVC_DACR]
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mcr p15, 0, r0, c3, c0, 0
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#endif
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.endm
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/*
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* Save the address limit on entry to a privileged exception and
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* if using PAN, save and disable usermode access.
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*/
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.macro uaccess_entry, tsk, tmp0, tmp1, tmp2, disable
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ldr \tmp0, [\tsk, #TI_ADDR_LIMIT]
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mov \tmp1, #TASK_SIZE
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str \tmp1, [\tsk, #TI_ADDR_LIMIT]
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str \tmp0, [sp, #SVC_ADDR_LIMIT]
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uaccess_save \tmp0
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.if \disable
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uaccess_disable \tmp0
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.endif
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.endm
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/* Restore the user access state previously saved by uaccess_entry */
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.macro uaccess_exit, tsk, tmp0, tmp1
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ldr \tmp1, [sp, #SVC_ADDR_LIMIT]
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uaccess_restore
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str \tmp1, [\tsk, #TI_ADDR_LIMIT]
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.endm
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#endif /* __ASM_UACCESS_ASM_H__ */
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@ -27,6 +27,7 @@
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#include <asm/unistd.h>
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#include <asm/tls.h>
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#include <asm/system_info.h>
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#include <asm/uaccess-asm.h>
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#include "entry-header.S"
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#include <asm/entry-macro-multi.S>
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@ -179,15 +180,7 @@ ENDPROC(__und_invalid)
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stmia r7, {r2 - r6}
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get_thread_info tsk
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ldr r0, [tsk, #TI_ADDR_LIMIT]
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mov r1, #TASK_SIZE
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str r1, [tsk, #TI_ADDR_LIMIT]
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str r0, [sp, #SVC_ADDR_LIMIT]
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uaccess_save r0
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.if \uaccess
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uaccess_disable r0
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.endif
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uaccess_entry tsk, r0, r1, r2, \uaccess
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.if \trace
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#ifdef CONFIG_TRACE_IRQFLAGS
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@ -6,6 +6,7 @@
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#include <asm/asm-offsets.h>
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#include <asm/errno.h>
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#include <asm/thread_info.h>
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#include <asm/uaccess-asm.h>
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#include <asm/v7m.h>
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@ Bad Abort numbers
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@ -217,9 +218,7 @@
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blne trace_hardirqs_off
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#endif
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.endif
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ldr r1, [sp, #SVC_ADDR_LIMIT]
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uaccess_restore
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str r1, [tsk, #TI_ADDR_LIMIT]
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uaccess_exit tsk, r0, r1
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#ifndef CONFIG_THUMB2_KERNEL
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@ ARM mode SVC restore
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@ -263,9 +262,7 @@
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@ on the stack remains correct).
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@
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.macro svc_exit_via_fiq
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ldr r1, [sp, #SVC_ADDR_LIMIT]
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uaccess_restore
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str r1, [tsk, #TI_ADDR_LIMIT]
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uaccess_exit tsk, r0, r1
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#ifndef CONFIG_THUMB2_KERNEL
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@ ARM mode restore
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mov r0, sp
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