pinctrl: amd: remove debounce filter setting in IRQ type setting
commit47a0001436
upstream. Debounce filter setting should be independent from IRQ type setting because according to the ACPI specs, there are separate arguments for specifying debounce timeout and IRQ type in GpioIo() and GpioInt(). Together with commit06abe8291b
("pinctrl: amd: fix incorrect way to disable debounce filter") and Andy's patch "gpiolib: acpi: Take into account debounce settings" [1], this will fix broken touchpads for laptops whose BIOS set the debounce timeout to a relatively large value. For example, the BIOS of Lenovo AMD gaming laptops including Legion-5 15ARH05 (R7000), Legion-5P (R7000P) and IdeaPad Gaming 3 15ARH05, set the debounce timeout to 124.8ms. This led to the kernel receiving only ~7 HID reports per second from the Synaptics touchpad (MSFT0001:00 06CB:7F28). Existing touchpads like [2][3] are not troubled by this bug because the debounce timeout has been set to 0 by the BIOS before enabling the debounce filter in setting IRQ type. [1] https://lore.kernel.org/linux-gpio/20201111222008.39993-11-andriy.shevchenko@linux.intel.com/ 8dcb7a15a585 ("gpiolib: acpi: Take into account debounce settings") [2] https://github.com/Syniurge/i2c-amd-mp2/issues/11#issuecomment-721331582 [3] https://forum.manjaro.org/t/random-short-touchpad-freezes/30832/28 Signed-off-by: Coiby Xu <coiby.xu@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: Benjamin Tissoires <benjamin.tissoires@redhat.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/linux-gpio/CAHp75VcwiGREBUJ0A06EEw-SyabqYsp%2Bdqs2DpSrhaY-2GVdAA%40mail.gmail.com/ BugLink: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1887190 Link: https://lore.kernel.org/r/20201125130320.311059-1-coiby.xu@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -435,7 +435,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
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pin_reg &= ~BIT(LEVEL_TRIG_OFF);
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pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
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pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
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pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
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irq_set_handler_locked(d, handle_edge_irq);
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break;
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@ -443,7 +442,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
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pin_reg &= ~BIT(LEVEL_TRIG_OFF);
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pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
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pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
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pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
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irq_set_handler_locked(d, handle_edge_irq);
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break;
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@ -451,7 +449,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
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pin_reg &= ~BIT(LEVEL_TRIG_OFF);
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pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
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pin_reg |= BOTH_EADGE << ACTIVE_LEVEL_OFF;
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pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
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irq_set_handler_locked(d, handle_edge_irq);
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break;
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@ -459,8 +456,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
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pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
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pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
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pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
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pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
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pin_reg |= DB_TYPE_PRESERVE_LOW_GLITCH << DB_CNTRL_OFF;
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irq_set_handler_locked(d, handle_level_irq);
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break;
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@ -468,8 +463,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
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pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
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pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
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pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
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pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
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pin_reg |= DB_TYPE_PRESERVE_HIGH_GLITCH << DB_CNTRL_OFF;
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irq_set_handler_locked(d, handle_level_irq);
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break;
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