atmel-lcdc: fix pixclock upper bound detection
AFAICT the code which checks that the requested pixclock value is within bounds is incorrect. It ensures that the lcdc core clock is at least (bytes per pixel) times higher than the pixel clock rather than just greater than or equal to. There are tighter restrictions on the pixclock value as a function of bus width for STN panels but even then it isn't a simple relationship as currently checked for. IMO either something like the below patch should be applied or else more detailed checking logic should be implemented which takes in to account the panel type as well. Signed-off-by: Ben Nizette <bn@niasdigital.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Daniel Glockner <dg@emlix.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -345,7 +345,7 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
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dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
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dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
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dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
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dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
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if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
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if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
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dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
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dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
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return -EINVAL;
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return -EINVAL;
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}
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}
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