media: mt9m111: allow to setup pixclk polarity
The chip can be configured to output data transitions on the rising or falling edge of PIXCLK (Datasheet R58:1[9]), default is on the falling edge. Parsing the fw-node is made in a subfunction to bundle all (future) dt-parsing / fw-parsing stuff. [m.grzeschik@pengutronix.de: Fix inverting clock. INV_PIX_CLOCK bit is set per default. Set bit to 0 (enable mask bit without value) to enable falling edge sampling.] [m.felsch@pengutronix.de: use fwnode helpers] [m.felsch@pengutronix.de: mv fw parsing into own function] [m.felsch@pengutronix.de: adapt commit msg] [sakari.ailus@linux.intel.com: V4L2 API usage changes to compile on media tree master] Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de> Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
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@ -860,6 +860,7 @@ config VIDEO_MT9M032
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config VIDEO_MT9M111
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tristate "mt9m111, mt9m112 and mt9m131 support"
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depends on I2C && VIDEO_V4L2
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select V4L2_FWNODE
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help
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This driver supports MT9M111, MT9M112 and MT9M131 cameras from
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Micron/Aptina
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@ -15,6 +15,7 @@
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#include <linux/delay.h>
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#include <linux/v4l2-mediabus.h>
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#include <linux/module.h>
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#include <linux/property.h>
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#include <media/v4l2-async.h>
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#include <media/v4l2-clk.h>
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@ -22,6 +23,7 @@
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-event.h>
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#include <media/v4l2-fwnode.h>
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/*
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* MT9M111, MT9M112 and MT9M131:
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@ -242,6 +244,8 @@ struct mt9m111 {
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const struct mt9m111_datafmt *fmt;
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int lastpage; /* PageMap cache value */
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bool is_streaming;
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/* user point of view - 0: falling 1: rising edge */
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unsigned int pclk_sample:1;
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#ifdef CONFIG_MEDIA_CONTROLLER
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struct media_pad pad;
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#endif
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@ -594,6 +598,10 @@ static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111,
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return -EINVAL;
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}
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/* receiver samples on falling edge, chip-hw default is rising */
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if (mt9m111->pclk_sample == 0)
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mask_outfmt2 |= MT9M111_OUTFMT_INV_PIX_CLOCK;
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ret = mt9m111_reg_mask(client, context_a.output_fmt_ctrl2,
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data_outfmt2, mask_outfmt2);
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if (!ret)
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@ -1084,9 +1092,15 @@ static int mt9m111_s_stream(struct v4l2_subdev *sd, int enable)
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static int mt9m111_g_mbus_config(struct v4l2_subdev *sd,
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struct v4l2_mbus_config *cfg)
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{
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cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
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struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
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cfg->flags = V4L2_MBUS_MASTER |
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V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH |
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V4L2_MBUS_DATA_ACTIVE_HIGH;
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cfg->flags |= mt9m111->pclk_sample ? V4L2_MBUS_PCLK_SAMPLE_RISING :
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V4L2_MBUS_PCLK_SAMPLE_FALLING;
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cfg->type = V4L2_MBUS_PARALLEL;
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return 0;
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@ -1156,6 +1170,30 @@ done:
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return ret;
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}
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static int mt9m111_probe_fw(struct i2c_client *client, struct mt9m111 *mt9m111)
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{
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struct v4l2_fwnode_endpoint bus_cfg = {
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.bus_type = V4L2_MBUS_PARALLEL
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};
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struct fwnode_handle *np;
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int ret;
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np = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev), NULL);
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if (!np)
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return -EINVAL;
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ret = v4l2_fwnode_endpoint_parse(np, &bus_cfg);
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if (ret)
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goto out_put_fw;
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mt9m111->pclk_sample = !!(bus_cfg.bus.parallel.flags &
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V4L2_MBUS_PCLK_SAMPLE_RISING);
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out_put_fw:
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fwnode_handle_put(np);
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return ret;
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}
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static int mt9m111_probe(struct i2c_client *client,
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const struct i2c_device_id *did)
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{
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@ -1173,6 +1211,10 @@ static int mt9m111_probe(struct i2c_client *client,
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if (!mt9m111)
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return -ENOMEM;
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ret = mt9m111_probe_fw(client, mt9m111);
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if (ret)
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return ret;
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mt9m111->clk = v4l2_clk_get(&client->dev, "mclk");
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if (IS_ERR(mt9m111->clk))
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return PTR_ERR(mt9m111->clk);
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