staging: mt7621-pci: Prefer using the BIT macro
Replace all occurrences of (1<<x) with BIT(x). Signed-off-by: Mamta Shukla <mamtashukla555@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -475,11 +475,11 @@ static int mt7621_pci_probe(struct platform_device *pdev)
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ASSERT_SYSRST_PCIE(RALINK_PCIE0_RST | RALINK_PCIE1_RST | RALINK_PCIE2_RST);
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*(unsigned int *)(0xbe000060) &= ~(0x3 << 10 | 0x3 << 3);
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*(unsigned int *)(0xbe000060) |= 0x1 << 10 | 0x1 << 3;
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*(unsigned int *)(0xbe000060) |= BIT(10) | BIT(3);
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mdelay(100);
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*(unsigned int *)(0xbe000600) |= 0x1 << 19 | 0x1 << 8 | 0x1 << 7; // use GPIO19/GPIO8/GPIO7 (PERST_N/UART_RXD3/UART_TXD3)
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*(unsigned int *)(0xbe000600) |= BIT(19) | BIT(8) | BIT(7); // use GPIO19/GPIO8/GPIO7 (PERST_N/UART_RXD3/UART_TXD3)
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mdelay(100);
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*(unsigned int *)(0xbe000620) &= ~(0x1 << 19 | 0x1 << 8 | 0x1 << 7); // clear DATA
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*(unsigned int *)(0xbe000620) &= ~(BIT(19) | BIT(8) | BIT(7)); // clear DATA
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mdelay(100);
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@ -510,18 +510,18 @@ static int mt7621_pci_probe(struct platform_device *pdev)
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rt_sysc_m32(RALINK_PCIE_RST, 0, RALINK_RSTCTRL);
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/* Use GPIO control instead of PERST_N */
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*(unsigned int *)(0xbe000620) |= 0x1 << 19 | 0x1 << 8 | 0x1 << 7; // set DATA
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*(unsigned int *)(0xbe000620) |= BIT(19) | BIT(8) | BIT(7); // set DATA
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mdelay(1000);
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if ((pcie_read(pcie, RT6855_PCIE0_OFFSET + RALINK_PCI_STATUS) & 0x1) == 0) {
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printk("PCIE0 no card, disable it(RST&CLK)\n");
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ASSERT_SYSRST_PCIE(RALINK_PCIE0_RST);
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rt_sysc_m32(RALINK_PCIE0_CLK_EN, 0, RALINK_CLKCFG1);
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pcie_link_status &= ~(1 << 0);
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pcie_link_status &= ~(BIT(0));
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} else {
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pcie_link_status |= 1 << 0;
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pcie_link_status |= BIT(0);
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val = pcie_read(pcie, RALINK_PCI_PCIMSK_ADDR);
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val |= (1 << 20); // enable pcie1 interrupt
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val |= BIT(20); // enable pcie1 interrupt
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pcie_write(pcie, val, RALINK_PCI_PCIMSK_ADDR);
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}
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@ -529,11 +529,11 @@ static int mt7621_pci_probe(struct platform_device *pdev)
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printk("PCIE1 no card, disable it(RST&CLK)\n");
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ASSERT_SYSRST_PCIE(RALINK_PCIE1_RST);
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rt_sysc_m32(RALINK_PCIE1_CLK_EN, 0, RALINK_CLKCFG1);
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pcie_link_status &= ~(1 << 1);
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pcie_link_status &= ~(BIT(1));
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} else {
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pcie_link_status |= 1 << 1;
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pcie_link_status |= BIT(1);
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val = pcie_read(pcie, RALINK_PCI_PCIMSK_ADDR);
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val |= (1 << 21); // enable pcie1 interrupt
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val |= BIT(21); // enable pcie1 interrupt
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pcie_write(pcie, val, RALINK_PCI_PCIMSK_ADDR);
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}
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@ -541,11 +541,11 @@ static int mt7621_pci_probe(struct platform_device *pdev)
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printk("PCIE2 no card, disable it(RST&CLK)\n");
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ASSERT_SYSRST_PCIE(RALINK_PCIE2_RST);
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rt_sysc_m32(RALINK_PCIE2_CLK_EN, 0, RALINK_CLKCFG1);
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pcie_link_status &= ~(1 << 2);
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pcie_link_status &= ~(BIT(2));
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} else {
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pcie_link_status |= 1 << 2;
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pcie_link_status |= BIT(2);
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val = pcie_read(pcie, RALINK_PCI_PCIMSK_ADDR);
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val |= (1 << 22); // enable pcie2 interrupt
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val |= BIT(22); // enable pcie2 interrupt
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pcie_write(pcie, val, RALINK_PCI_PCIMSK_ADDR);
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}
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