ASoC: tegra: remove support of legacy DMA driver based access
Remove the support code which uses the legacy APB DMA driver for accessing the I2S FIFO. The driver will use the dmaengine based APB DMA driver for accessing reqding/writing to I2S FIFO. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Laxman Dewangan
Stephen Warren
parent
5bd2761181
commit
9891e32405
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@ -1,6 +1,6 @@
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config SND_SOC_TEGRA
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tristate "SoC Audio for the Tegra System-on-Chip"
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depends on ARCH_TEGRA && (TEGRA_SYSTEM_DMA || TEGRA20_APB_DMA)
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depends on ARCH_TEGRA && TEGRA20_APB_DMA
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select REGMAP_MMIO
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select SND_SOC_DMAENGINE_PCM if TEGRA20_APB_DMA
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help
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@ -57,237 +57,6 @@ static const struct snd_pcm_hardware tegra_pcm_hardware = {
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.fifo_size = 4,
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};
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#if defined(CONFIG_TEGRA_SYSTEM_DMA)
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static void tegra_pcm_queue_dma(struct tegra_runtime_data *prtd)
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{
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struct snd_pcm_substream *substream = prtd->substream;
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struct snd_dma_buffer *buf = &substream->dma_buffer;
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struct tegra_dma_req *dma_req;
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unsigned long addr;
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dma_req = &prtd->dma_req[prtd->dma_req_idx];
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prtd->dma_req_idx = 1 - prtd->dma_req_idx;
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addr = buf->addr + prtd->dma_pos;
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prtd->dma_pos += dma_req->size;
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if (prtd->dma_pos >= prtd->dma_pos_end)
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prtd->dma_pos = 0;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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dma_req->source_addr = addr;
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else
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dma_req->dest_addr = addr;
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tegra_dma_enqueue_req(prtd->dma_chan, dma_req);
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}
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static void dma_complete_callback(struct tegra_dma_req *req)
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{
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struct tegra_runtime_data *prtd = (struct tegra_runtime_data *)req->dev;
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struct snd_pcm_substream *substream = prtd->substream;
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struct snd_pcm_runtime *runtime = substream->runtime;
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spin_lock(&prtd->lock);
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if (!prtd->running) {
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spin_unlock(&prtd->lock);
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return;
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}
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if (++prtd->period_index >= runtime->periods)
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prtd->period_index = 0;
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tegra_pcm_queue_dma(prtd);
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spin_unlock(&prtd->lock);
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snd_pcm_period_elapsed(substream);
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}
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static void setup_dma_tx_request(struct tegra_dma_req *req,
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struct tegra_pcm_dma_params * dmap)
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{
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req->complete = dma_complete_callback;
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req->to_memory = false;
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req->dest_addr = dmap->addr;
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req->dest_wrap = dmap->wrap;
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req->source_bus_width = 32;
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req->source_wrap = 0;
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req->dest_bus_width = dmap->width;
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req->req_sel = dmap->req_sel;
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}
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static void setup_dma_rx_request(struct tegra_dma_req *req,
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struct tegra_pcm_dma_params * dmap)
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{
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req->complete = dma_complete_callback;
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req->to_memory = true;
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req->source_addr = dmap->addr;
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req->dest_wrap = 0;
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req->source_bus_width = dmap->width;
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req->source_wrap = dmap->wrap;
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req->dest_bus_width = 32;
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req->req_sel = dmap->req_sel;
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}
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static int tegra_pcm_open(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct tegra_runtime_data *prtd;
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct tegra_pcm_dma_params * dmap;
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int ret = 0;
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prtd = kzalloc(sizeof(struct tegra_runtime_data), GFP_KERNEL);
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if (prtd == NULL)
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return -ENOMEM;
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runtime->private_data = prtd;
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prtd->substream = substream;
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spin_lock_init(&prtd->lock);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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dmap = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
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setup_dma_tx_request(&prtd->dma_req[0], dmap);
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setup_dma_tx_request(&prtd->dma_req[1], dmap);
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} else {
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dmap = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
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setup_dma_rx_request(&prtd->dma_req[0], dmap);
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setup_dma_rx_request(&prtd->dma_req[1], dmap);
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}
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prtd->dma_req[0].dev = prtd;
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prtd->dma_req[1].dev = prtd;
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prtd->dma_chan = tegra_dma_allocate_channel(TEGRA_DMA_MODE_ONESHOT);
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if (prtd->dma_chan == NULL) {
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ret = -ENOMEM;
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goto err;
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}
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/* Set HW params now that initialization is complete */
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snd_soc_set_runtime_hwparams(substream, &tegra_pcm_hardware);
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/* Ensure that buffer size is a multiple of period size */
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ret = snd_pcm_hw_constraint_integer(runtime,
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SNDRV_PCM_HW_PARAM_PERIODS);
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if (ret < 0)
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goto err;
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return 0;
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err:
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if (prtd->dma_chan) {
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tegra_dma_free_channel(prtd->dma_chan);
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}
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kfree(prtd);
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return ret;
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}
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static int tegra_pcm_close(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct tegra_runtime_data *prtd = runtime->private_data;
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tegra_dma_free_channel(prtd->dma_chan);
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kfree(prtd);
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return 0;
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}
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static int tegra_pcm_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct tegra_runtime_data *prtd = runtime->private_data;
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snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
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prtd->dma_req[0].size = params_period_bytes(params);
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prtd->dma_req[1].size = prtd->dma_req[0].size;
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return 0;
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}
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static int tegra_pcm_hw_free(struct snd_pcm_substream *substream)
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{
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snd_pcm_set_runtime_buffer(substream, NULL);
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return 0;
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}
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static int tegra_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct tegra_runtime_data *prtd = runtime->private_data;
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unsigned long flags;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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prtd->dma_pos = 0;
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prtd->dma_pos_end = frames_to_bytes(runtime, runtime->periods * runtime->period_size);
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prtd->period_index = 0;
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prtd->dma_req_idx = 0;
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/* Fall-through */
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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spin_lock_irqsave(&prtd->lock, flags);
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prtd->running = 1;
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spin_unlock_irqrestore(&prtd->lock, flags);
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tegra_pcm_queue_dma(prtd);
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tegra_pcm_queue_dma(prtd);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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spin_lock_irqsave(&prtd->lock, flags);
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prtd->running = 0;
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spin_unlock_irqrestore(&prtd->lock, flags);
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tegra_dma_dequeue_req(prtd->dma_chan, &prtd->dma_req[0]);
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tegra_dma_dequeue_req(prtd->dma_chan, &prtd->dma_req[1]);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static snd_pcm_uframes_t tegra_pcm_pointer(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct tegra_runtime_data *prtd = runtime->private_data;
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return prtd->period_index * runtime->period_size;
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}
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static int tegra_pcm_mmap(struct snd_pcm_substream *substream,
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struct vm_area_struct *vma)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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return dma_mmap_writecombine(substream->pcm->card->dev, vma,
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runtime->dma_area,
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runtime->dma_addr,
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runtime->dma_bytes);
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}
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static struct snd_pcm_ops tegra_pcm_ops = {
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.open = tegra_pcm_open,
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.close = tegra_pcm_close,
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.ioctl = snd_pcm_lib_ioctl,
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.hw_params = tegra_pcm_hw_params,
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.hw_free = tegra_pcm_hw_free,
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.trigger = tegra_pcm_trigger,
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.pointer = tegra_pcm_pointer,
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.mmap = tegra_pcm_mmap,
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};
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#else
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static int tegra_pcm_open(struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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@ -399,7 +168,6 @@ static struct snd_pcm_ops tegra_pcm_ops = {
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.pointer = snd_dmaengine_pcm_pointer,
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.mmap = tegra_pcm_mmap,
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};
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#endif
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static int tegra_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
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{
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@ -40,20 +40,6 @@ struct tegra_pcm_dma_params {
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unsigned long req_sel;
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};
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#if defined(CONFIG_TEGRA_SYSTEM_DMA)
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struct tegra_runtime_data {
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struct snd_pcm_substream *substream;
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spinlock_t lock;
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int running;
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int dma_pos;
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int dma_pos_end;
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int period_index;
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int dma_req_idx;
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struct tegra_dma_req dma_req[2];
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struct tegra_dma_channel *dma_chan;
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};
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#endif
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int tegra_pcm_platform_register(struct device *dev);
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void tegra_pcm_platform_unregister(struct device *dev);
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