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Staging: olpc_dcon: replace some magic numbers 

This patch replace some magic numbers. I believe it makes
the driver more readable.

The magic number 0x26 is the XO system embedded controller
(EC) command 'DCON power enable/disable'.

Number 0x41, and 0x42 are special memory controller settings
register.  The 0x41 initialize bit sequence 0x101 means:
enable memory power down function and special SDRAM clock
delay for synchronize SDRAM output and clock signal.

The 0x42 initialize squence 0x101 is wrong.  According to
the specification Bit 8 is reserved, thus not in use.
I removed it.

Signed-off-by: Jens Frederich <jfrederich@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Jens Frederich 2013-08-15 21:34:55 +02:00 committed by Greg Kroah-Hartman
parent 01f865ba4a
commit 98d4f93c79
3 changed files with 26 additions and 15 deletions
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13
drivers/staging/olpc_dcon/olpc_dcon.c
View File

@ -90,9 +90,10 @@ static int dcon_hw_init(struct dcon_priv *dcon, int is_init)
/* SDRAM setup/hold time */ /* SDRAM setup/hold time */
dcon_write(dcon, 0x3a, 0xc040); dcon_write(dcon, 0x3a, 0xc040);
dcon_write(dcon, 0x41, 0x0000); dcon_write(dcon, DCON_REG_MEM_OPT_A, 0x0000); /* clear option bits */
dcon_write(dcon, 0x41, 0x0101); dcon_write(dcon, DCON_REG_MEM_OPT_A,
dcon_write(dcon, 0x42, 0x0101); MEM_DLL_CLOCK_DELAY | MEM_POWER_DOWN);
dcon_write(dcon, DCON_REG_MEM_OPT_B, MEM_SOFT_RESET);
/* Colour swizzle, AA, no passthrough, backlight */ /* Colour swizzle, AA, no passthrough, backlight */
if (is_init) { if (is_init) {
@ -126,7 +127,7 @@ static int dcon_bus_stabilize(struct dcon_priv *dcon, int is_powered_down)
power_up: power_up:
if (is_powered_down) { if (is_powered_down) {
x = 1; x = 1;
x = olpc_ec_cmd(0x26, (unsigned char *)&x, 1, NULL, 0); x = olpc_ec_cmd(EC_DCON_POWER_MODE, (u8 *)&x, 1, NULL, 0);
if (x) { if (x) {
pr_warn("unable to force dcon to power up: %d!\n", x); pr_warn("unable to force dcon to power up: %d!\n", x);
return x; return x;
@ -144,7 +145,7 @@ power_up:
pr_err("unable to stabilize dcon's smbus, reasserting power and praying.\n"); pr_err("unable to stabilize dcon's smbus, reasserting power and praying.\n");
BUG_ON(olpc_board_at_least(olpc_board(0xc2))); BUG_ON(olpc_board_at_least(olpc_board(0xc2)));
x = 0; x = 0;
olpc_ec_cmd(0x26, (unsigned char *)&x, 1, NULL, 0); olpc_ec_cmd(EC_DCON_POWER_MODE, (u8 *)&x, 1, NULL, 0);
msleep(100); msleep(100);
is_powered_down = 1; is_powered_down = 1;
goto power_up; /* argh, stupid hardware.. */ goto power_up; /* argh, stupid hardware.. */
@ -208,7 +209,7 @@ static void dcon_sleep(struct dcon_priv *dcon, bool sleep)
if (sleep) { if (sleep) {
x = 0; x = 0;
x = olpc_ec_cmd(0x26, (unsigned char *)&x, 1, NULL, 0); x = olpc_ec_cmd(EC_DCON_POWER_MODE, (u8 *)&x, 1, NULL, 0);
if (x) if (x)
pr_warn("unable to force dcon to power down: %d!\n", x); pr_warn("unable to force dcon to power down: %d!\n", x);
else else

27
drivers/staging/olpc_dcon/olpc_dcon.h
View File

@ -22,15 +22,24 @@
#define MODE_DEBUG (1<<14) #define MODE_DEBUG (1<<14)
#define MODE_SELFTEST (1<<15) #define MODE_SELFTEST (1<<15)
#define DCON_REG_HRES 2 #define DCON_REG_HRES 0x2
#define DCON_REG_HTOTAL 3 #define DCON_REG_HTOTAL 0x3
#define DCON_REG_HSYNC_WIDTH 4 #define DCON_REG_HSYNC_WIDTH 0x4
#define DCON_REG_VRES 5 #define DCON_REG_VRES 0x5
#define DCON_REG_VTOTAL 6 #define DCON_REG_VTOTAL 0x6
#define DCON_REG_VSYNC_WIDTH 7 #define DCON_REG_VSYNC_WIDTH 0x7
#define DCON_REG_TIMEOUT 8 #define DCON_REG_TIMEOUT 0x8
#define DCON_REG_SCAN_INT 9 #define DCON_REG_SCAN_INT 0x9
#define DCON_REG_BRIGHT 10 #define DCON_REG_BRIGHT 0x10
#define DCON_REG_MEM_OPT_A 0x41
#define DCON_REG_MEM_OPT_B 0x42
/* Load Delay Locked Loop (DLL) settings for clock delay */
#define MEM_DLL_CLOCK_DELAY (1<<0)
/* Memory controller power down function */
#define MEM_POWER_DOWN (1<<8)
/* Memory controller software reset */
#define MEM_SOFT_RESET (1<<0)
/* Status values */ /* Status values */

1
include/linux/olpc-ec.h
View File

@ -6,6 +6,7 @@
#define EC_WRITE_SCI_MASK 0x1b #define EC_WRITE_SCI_MASK 0x1b
#define EC_WAKE_UP_WLAN 0x24 #define EC_WAKE_UP_WLAN 0x24
#define EC_WLAN_LEAVE_RESET 0x25 #define EC_WLAN_LEAVE_RESET 0x25
#define EC_DCON_POWER_MODE 0x26
#define EC_READ_EB_MODE 0x2a #define EC_READ_EB_MODE 0x2a
#define EC_SET_SCI_INHIBIT 0x32 #define EC_SET_SCI_INHIBIT 0x32
#define EC_SET_SCI_INHIBIT_RELEASE 0x34 #define EC_SET_SCI_INHIBIT_RELEASE 0x34