[POWERPC] Add QE device tree node definition
OF device tree node spec used in QE/8360 support patches. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Jiang Bo <Tanya.jiang@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
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Li Yang
Paul Mackerras
parent
5a3e3b2230
commit
9a1ab883c0
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@ -1441,6 +1441,258 @@ platforms are moved over to use the flattened-device-tree model.
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descriptor-types-mask = <012b0ebf>;
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};
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h) Board Control and Status (BCSR)
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Required properties:
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- device_type : Should be "board-control"
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- reg : Offset and length of the register set for the device
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Example:
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bcsr@f8000000 {
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device_type = "board-control";
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reg = <f8000000 8000>;
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};
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i) Freescale QUICC Engine module (QE)
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This represents qe module that is installed on PowerQUICC II Pro.
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Hopefully it will merge backward compatibility with CPM/CPM2.
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Basically, it is a bus of devices, that could act more or less
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as a complete entity (UCC, USB etc ). All of them should be siblings on
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the "root" qe node, using the common properties from there.
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The description below applies to the the qe of MPC8360 and
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more nodes and properties would be extended in the future.
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i) Root QE device
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Required properties:
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- device_type : should be "qe";
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- model : precise model of the QE, Can be "QE", "CPM", or "CPM2"
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- reg : offset and length of the device registers.
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- bus-frequency : the clock frequency for QUICC Engine.
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Recommended properties
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- brg-frequency : the internal clock source frequency for baud-rate
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generators in Hz.
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Example:
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qe@e0100000 {
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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device_type = "qe";
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model = "QE";
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ranges = <0 e0100000 00100000>;
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reg = <e0100000 480>;
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brg-frequency = <0>;
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bus-frequency = <179A7B00>;
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}
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ii) SPI (Serial Peripheral Interface)
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Required properties:
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- device_type : should be "spi".
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- compatible : should be "fsl_spi".
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- mode : the spi operation mode, it can be "cpu" or "qe".
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- reg : Offset and length of the register set for the device
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- interrupts : <a b> where a is the interrupt number and b is a
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field that represents an encoding of the sense and level
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information for the interrupt. This should be encoded based on
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the information in section 2) depending on the type of interrupt
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controller you have.
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- interrupt-parent : the phandle for the interrupt controller that
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services interrupts for this device.
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Example:
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spi@4c0 {
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device_type = "spi";
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compatible = "fsl_spi";
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reg = <4c0 40>;
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interrupts = <82 0>;
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interrupt-parent = <700>;
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mode = "cpu";
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};
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iii) USB (Universal Serial Bus Controller)
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Required properties:
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- device_type : should be "usb".
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- compatible : could be "qe_udc" or "fhci-hcd".
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- mode : the could be "host" or "slave".
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- reg : Offset and length of the register set for the device
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- interrupts : <a b> where a is the interrupt number and b is a
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field that represents an encoding of the sense and level
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information for the interrupt. This should be encoded based on
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the information in section 2) depending on the type of interrupt
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controller you have.
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- interrupt-parent : the phandle for the interrupt controller that
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services interrupts for this device.
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Example(slave):
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usb@6c0 {
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device_type = "usb";
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compatible = "qe_udc";
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reg = <6c0 40>;
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interrupts = <8b 0>;
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interrupt-parent = <700>;
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mode = "slave";
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};
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iv) UCC (Unified Communications Controllers)
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Required properties:
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- device_type : should be "network", "hldc", "uart", "transparent"
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"bisync" or "atm".
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- compatible : could be "ucc_geth" or "fsl_atm" and so on.
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- model : should be "UCC".
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- device-id : the ucc number(1-8), corresponding to UCCx in UM.
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- reg : Offset and length of the register set for the device
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- interrupts : <a b> where a is the interrupt number and b is a
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field that represents an encoding of the sense and level
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information for the interrupt. This should be encoded based on
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the information in section 2) depending on the type of interrupt
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controller you have.
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- interrupt-parent : the phandle for the interrupt controller that
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services interrupts for this device.
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- pio-handle : The phandle for the Parallel I/O port configuration.
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- rx-clock : represents the UCC receive clock source.
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0x00 : clock source is disabled;
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0x1~0x10 : clock source is BRG1~BRG16 respectively;
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0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.
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- tx-clock: represents the UCC transmit clock source;
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0x00 : clock source is disabled;
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0x1~0x10 : clock source is BRG1~BRG16 respectively;
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0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.
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Required properties for network device_type:
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- mac-address : list of bytes representing the ethernet address.
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- phy-handle : The phandle for the PHY connected to this controller.
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Example:
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ucc@2000 {
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device_type = "network";
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compatible = "ucc_geth";
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model = "UCC";
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device-id = <1>;
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reg = <2000 200>;
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interrupts = <a0 0>;
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interrupt-parent = <700>;
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mac-address = [ 00 04 9f 00 23 23 ];
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rx-clock = "none";
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tx-clock = "clk9";
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phy-handle = <212000>;
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pio-handle = <140001>;
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};
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v) Parallel I/O Ports
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This node configures Parallel I/O ports for CPUs with QE support.
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The node should reside in the "soc" node of the tree. For each
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device that using parallel I/O ports, a child node should be created.
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See the definition of the Pin configuration nodes below for more
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information.
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Required properties:
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- device_type : should be "par_io".
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- reg : offset to the register set and its length.
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- num-ports : number of Parallel I/O ports
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Example:
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par_io@1400 {
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reg = <1400 100>;
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "par_io";
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num-ports = <7>;
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ucc_pin@01 {
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......
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};
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vi) Pin configuration nodes
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Required properties:
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- linux,phandle : phandle of this node; likely referenced by a QE
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device.
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- pio-map : array of pin configurations. Each pin is defined by 6
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integers. The six numbers are respectively: port, pin, dir,
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open_drain, assignment, has_irq.
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- port : port number of the pin; 0-6 represent port A-G in UM.
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- pin : pin number in the port.
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- dir : direction of the pin, should encode as follows:
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0 = The pin is disabled
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1 = The pin is an output
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2 = The pin is an input
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3 = The pin is I/O
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- open_drain : indicates the pin is normal or wired-OR:
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0 = The pin is actively driven as an output
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1 = The pin is an open-drain driver. As an output, the pin is
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driven active-low, otherwise it is three-stated.
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- assignment : function number of the pin according to the Pin Assignment
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tables in User Manual. Each pin can have up to 4 possible functions in
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QE and two options for CPM.
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- has_irq : indicates if the pin is used as source of exteral
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interrupts.
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Example:
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ucc_pin@01 {
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linux,phandle = <140001>;
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pio-map = <
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/* port pin dir open_drain assignment has_irq */
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0 3 1 0 1 0 /* TxD0 */
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0 4 1 0 1 0 /* TxD1 */
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0 5 1 0 1 0 /* TxD2 */
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0 6 1 0 1 0 /* TxD3 */
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1 6 1 0 3 0 /* TxD4 */
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1 7 1 0 1 0 /* TxD5 */
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1 9 1 0 2 0 /* TxD6 */
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1 a 1 0 2 0 /* TxD7 */
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0 9 2 0 1 0 /* RxD0 */
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0 a 2 0 1 0 /* RxD1 */
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0 b 2 0 1 0 /* RxD2 */
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0 c 2 0 1 0 /* RxD3 */
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0 d 2 0 1 0 /* RxD4 */
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1 1 2 0 2 0 /* RxD5 */
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1 0 2 0 2 0 /* RxD6 */
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1 4 2 0 2 0 /* RxD7 */
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0 7 1 0 1 0 /* TX_EN */
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0 8 1 0 1 0 /* TX_ER */
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0 f 2 0 1 0 /* RX_DV */
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0 10 2 0 1 0 /* RX_ER */
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0 0 2 0 1 0 /* RX_CLK */
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2 9 1 0 3 0 /* GTX_CLK - CLK10 */
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2 8 2 0 1 0>; /* GTX125 - CLK9 */
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};
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vii) Multi-User RAM (MURAM)
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Required properties:
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- device_type : should be "muram".
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- mode : the could be "host" or "slave".
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- ranges : Should be defined as specified in 1) to describe the
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translation of MURAM addresses.
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- data-only : sub-node which defines the address area under MURAM
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bus that can be allocated as data/parameter
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Example:
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muram@10000 {
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device_type = "muram";
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ranges = <0 00010000 0000c000>;
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data-only@0{
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reg = <0 c000>;
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};
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};
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More devices will be defined as this spec matures.
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