Staging: remove stlc45xx driver
It's no longer needed as the p54spi driver is the same thing, under a different name and in the correct portion of the kernel tree. Cc: Javier Martinez Canillas <martinez.javier@gmail.com> Cc: Christian Lamparter <chunkeey@googlemail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Greg Kroah-Hartman
parent
a010a33752
commit
9ab1b56aa0
|
|
@ -93,8 +93,6 @@ source "drivers/staging/dst/Kconfig"
|
|||
|
||||
source "drivers/staging/pohmelfs/Kconfig"
|
||||
|
||||
source "drivers/staging/stlc45xx/Kconfig"
|
||||
|
||||
source "drivers/staging/b3dfg/Kconfig"
|
||||
|
||||
source "drivers/staging/phison/Kconfig"
|
||||
|
|
|
|||
|
|
@ -29,7 +29,6 @@ obj-$(CONFIG_ANDROID) += android/
|
|||
obj-$(CONFIG_ANDROID) += dream/
|
||||
obj-$(CONFIG_DST) += dst/
|
||||
obj-$(CONFIG_POHMELFS) += pohmelfs/
|
||||
obj-$(CONFIG_STLC45XX) += stlc45xx/
|
||||
obj-$(CONFIG_B3DFG) += b3dfg/
|
||||
obj-$(CONFIG_IDE_PHISON) += phison/
|
||||
obj-$(CONFIG_PLAN9AUTH) += p9auth/
|
||||
|
|
|
|||
|
|
@ -1,8 +0,0 @@
|
|||
config STLC45XX
|
||||
tristate "stlc4550/4560 support"
|
||||
depends on MAC80211 && WLAN_80211 && SPI_MASTER && GENERIC_HARDIRQS
|
||||
---help---
|
||||
This is a driver for stlc4550 and stlc4560 chipsets.
|
||||
|
||||
To compile this driver as a module, choose M here: the module will be
|
||||
called stlc45xx. If unsure, say N.
|
||||
|
|
@ -1 +0,0 @@
|
|||
obj-$(CONFIG_STLC45XX) += stlc45xx.o
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,283 +0,0 @@
|
|||
/*
|
||||
* This file is part of stlc45xx
|
||||
*
|
||||
* Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
|
||||
*
|
||||
* Contact: Kalle Valo <kalle.valo@nokia.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
|
||||
* 02110-1301 USA
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/list.h>
|
||||
#include <net/mac80211.h>
|
||||
|
||||
#include "stlc45xx_lmac.h"
|
||||
|
||||
#define DRIVER_NAME "stlc45xx"
|
||||
#define DRIVER_VERSION "0.1.3"
|
||||
|
||||
#define DRIVER_PREFIX DRIVER_NAME ": "
|
||||
|
||||
enum {
|
||||
DEBUG_NONE = 0,
|
||||
DEBUG_FUNC = 1 << 0,
|
||||
DEBUG_IRQ = 1 << 1,
|
||||
DEBUG_BH = 1 << 2,
|
||||
DEBUG_RX = 1 << 3,
|
||||
DEBUG_RX_CONTENT = 1 << 5,
|
||||
DEBUG_TX = 1 << 6,
|
||||
DEBUG_TX_CONTENT = 1 << 8,
|
||||
DEBUG_TXBUFFER = 1 << 9,
|
||||
DEBUG_QUEUE = 1 << 10,
|
||||
DEBUG_BOOT = 1 << 11,
|
||||
DEBUG_PSM = 1 << 12,
|
||||
DEBUG_ALL = ~0,
|
||||
};
|
||||
|
||||
#define DEBUG_LEVEL DEBUG_NONE
|
||||
/* #define DEBUG_LEVEL DEBUG_ALL */
|
||||
/* #define DEBUG_LEVEL (DEBUG_TX | DEBUG_RX | DEBUG_IRQ) */
|
||||
/* #define DEBUG_LEVEL (DEBUG_TX | DEBUG_MEMREGION | DEBUG_QUEUE) */
|
||||
/* #define DEBUG_LEVEL (DEBUG_MEMREGION | DEBUG_QUEUE) */
|
||||
|
||||
#define stlc45xx_error(fmt, arg...) \
|
||||
printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
|
||||
|
||||
#define stlc45xx_warning(fmt, arg...) \
|
||||
printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
|
||||
|
||||
#define stlc45xx_info(fmt, arg...) \
|
||||
printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg)
|
||||
|
||||
#define stlc45xx_debug(level, fmt, arg...) \
|
||||
do { \
|
||||
if (level & DEBUG_LEVEL) \
|
||||
printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \
|
||||
} while (0)
|
||||
|
||||
#define stlc45xx_dump(level, buf, len) \
|
||||
do { \
|
||||
if (level & DEBUG_LEVEL) \
|
||||
print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, \
|
||||
16, 1, buf, len, 1); \
|
||||
} while (0)
|
||||
|
||||
#define MAC2STR(a) ((a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5])
|
||||
#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
|
||||
|
||||
/* Bit 15 is read/write bit; ON = READ, OFF = WRITE */
|
||||
#define ADDR_READ_BIT_15 0x8000
|
||||
|
||||
#define SPI_ADRS_ARM_INTERRUPTS 0x00
|
||||
#define SPI_ADRS_ARM_INT_EN 0x04
|
||||
|
||||
#define SPI_ADRS_HOST_INTERRUPTS 0x08
|
||||
#define SPI_ADRS_HOST_INT_EN 0x0c
|
||||
#define SPI_ADRS_HOST_INT_ACK 0x10
|
||||
|
||||
#define SPI_ADRS_GEN_PURP_1 0x14
|
||||
#define SPI_ADRS_GEN_PURP_2 0x18
|
||||
|
||||
/* high word */
|
||||
#define SPI_ADRS_DEV_CTRL_STAT 0x26
|
||||
|
||||
#define SPI_ADRS_DMA_DATA 0x28
|
||||
|
||||
#define SPI_ADRS_DMA_WRITE_CTRL 0x2c
|
||||
#define SPI_ADRS_DMA_WRITE_LEN 0x2e
|
||||
#define SPI_ADRS_DMA_WRITE_BASE 0x30
|
||||
|
||||
#define SPI_ADRS_DMA_READ_CTRL 0x34
|
||||
#define SPI_ADRS_DMA_READ_LEN 0x36
|
||||
#define SPI_ADRS_DMA_READ_BASE 0x38
|
||||
|
||||
#define SPI_CTRL_STAT_HOST_OVERRIDE 0x8000
|
||||
#define SPI_CTRL_STAT_START_HALTED 0x4000
|
||||
#define SPI_CTRL_STAT_RAM_BOOT 0x2000
|
||||
#define SPI_CTRL_STAT_HOST_RESET 0x1000
|
||||
#define SPI_CTRL_STAT_HOST_CPU_EN 0x0800
|
||||
|
||||
#define SPI_DMA_WRITE_CTRL_ENABLE 0x0001
|
||||
#define SPI_DMA_READ_CTRL_ENABLE 0x0001
|
||||
#define HOST_ALLOWED (1 << 7)
|
||||
|
||||
#define FIRMWARE_ADDRESS 0x20000
|
||||
|
||||
#define SPI_TIMEOUT 100 /* msec */
|
||||
|
||||
#define SPI_MAX_TX_PACKETS 32
|
||||
|
||||
#define SPI_MAX_PACKET_SIZE 32767
|
||||
|
||||
#define SPI_TARGET_INT_WAKEUP 0x00000001
|
||||
#define SPI_TARGET_INT_SLEEP 0x00000002
|
||||
#define SPI_TARGET_INT_RDDONE 0x00000004
|
||||
|
||||
#define SPI_TARGET_INT_CTS 0x00004000
|
||||
#define SPI_TARGET_INT_DR 0x00008000
|
||||
|
||||
#define SPI_HOST_INT_READY 0x00000001
|
||||
#define SPI_HOST_INT_WR_READY 0x00000002
|
||||
#define SPI_HOST_INT_SW_UPDATE 0x00000004
|
||||
#define SPI_HOST_INT_UPDATE 0x10000000
|
||||
|
||||
/* clear to send */
|
||||
#define SPI_HOST_INT_CTS 0x00004000
|
||||
|
||||
/* data ready */
|
||||
#define SPI_HOST_INT_DR 0x00008000
|
||||
|
||||
#define SPI_HOST_INTS_DEFAULT \
|
||||
(SPI_HOST_INT_READY | SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE)
|
||||
|
||||
#define TARGET_BOOT_SLEEP 50
|
||||
|
||||
/* The firmware buffer is divided into three areas:
|
||||
*
|
||||
* o config area (for control commands)
|
||||
* o tx buffer
|
||||
* o rx buffer
|
||||
*/
|
||||
#define FIRMWARE_BUFFER_START 0x20200
|
||||
#define FIRMWARE_BUFFER_END 0x27c60
|
||||
#define FIRMWARE_BUFFER_LEN (FIRMWARE_BUFFER_END - FIRMWARE_BUFFER_START)
|
||||
#define FIRMWARE_MTU 3240
|
||||
#define FIRMWARE_CONFIG_PAYLOAD_LEN 1024
|
||||
#define FIRMWARE_CONFIG_START FIRMWARE_BUFFER_START
|
||||
#define FIRMWARE_CONFIG_LEN (sizeof(struct s_lm_control) + \
|
||||
FIRMWARE_CONFIG_PAYLOAD_LEN)
|
||||
#define FIRMWARE_CONFIG_END (FIRMWARE_CONFIG_START + FIRMWARE_CONFIG_LEN - 1)
|
||||
#define FIRMWARE_RXBUFFER_LEN (5 * FIRMWARE_MTU + 1024)
|
||||
#define FIRMWARE_RXBUFFER_START (FIRMWARE_BUFFER_END - FIRMWARE_RXBUFFER_LEN)
|
||||
#define FIRMWARE_RXBUFFER_END (FIRMWARE_RXBUFFER_START + \
|
||||
FIRMWARE_RXBUFFER_LEN - 1)
|
||||
#define FIRMWARE_TXBUFFER_START (FIRMWARE_BUFFER_START + FIRMWARE_CONFIG_LEN)
|
||||
#define FIRMWARE_TXBUFFER_LEN (FIRMWARE_BUFFER_LEN - FIRMWARE_CONFIG_LEN - \
|
||||
FIRMWARE_RXBUFFER_LEN)
|
||||
#define FIRMWARE_TXBUFFER_END (FIRMWARE_TXBUFFER_START + \
|
||||
FIRMWARE_TXBUFFER_LEN - 1)
|
||||
|
||||
#define FIRMWARE_TXBUFFER_HEADER 100
|
||||
#define FIRMWARE_TXBUFFER_TRAILER 4
|
||||
|
||||
/* FIXME: come up with a proper value */
|
||||
#define MAX_FRAME_LEN 2500
|
||||
|
||||
/* unit is ms */
|
||||
#define TX_FRAME_LIFETIME 2000
|
||||
#define TX_TIMEOUT 4000
|
||||
|
||||
#define SUPPORTED_CHANNELS 13
|
||||
|
||||
/* FIXME */
|
||||
/* #define CHANNEL_CAL_LEN offsetof(struct s_lmo_scan, bratemask) - \ */
|
||||
/* offsetof(struct s_lmo_scan, channel) */
|
||||
#define CHANNEL_CAL_LEN 292
|
||||
#define CHANNEL_CAL_ARRAY_LEN (SUPPORTED_CHANNELS * CHANNEL_CAL_LEN)
|
||||
/* FIXME */
|
||||
/* #define RSSI_CAL_LEN sizeof(struct s_lmo_scan) - \ */
|
||||
/* offsetof(struct s_lmo_scan, rssical) */
|
||||
#define RSSI_CAL_LEN 8
|
||||
#define RSSI_CAL_ARRAY_LEN (SUPPORTED_CHANNELS * RSSI_CAL_LEN)
|
||||
|
||||
struct s_dma_regs {
|
||||
unsigned short cmd;
|
||||
unsigned short len;
|
||||
unsigned long addr;
|
||||
};
|
||||
|
||||
struct stlc45xx_ie_tim {
|
||||
u8 dtim_count;
|
||||
u8 dtim_period;
|
||||
u8 bmap_control;
|
||||
u8 pvbmap[251];
|
||||
};
|
||||
|
||||
struct txbuffer {
|
||||
/* can be removed when switched to skb queue */
|
||||
struct list_head tx_list;
|
||||
|
||||
struct list_head buffer_list;
|
||||
|
||||
int start;
|
||||
int frame_start;
|
||||
int end;
|
||||
|
||||
struct sk_buff *skb;
|
||||
u32 handle;
|
||||
|
||||
bool status_needed;
|
||||
|
||||
int header_len;
|
||||
|
||||
/* unit jiffies */
|
||||
unsigned long lifetime;
|
||||
};
|
||||
|
||||
enum fw_state {
|
||||
FW_STATE_OFF,
|
||||
FW_STATE_BOOTING,
|
||||
FW_STATE_READY,
|
||||
FW_STATE_RESET,
|
||||
FW_STATE_RESETTING,
|
||||
};
|
||||
|
||||
struct stlc45xx {
|
||||
struct ieee80211_hw *hw;
|
||||
struct spi_device *spi;
|
||||
struct work_struct work;
|
||||
struct work_struct work_reset;
|
||||
struct delayed_work work_tx_timeout;
|
||||
struct mutex mutex;
|
||||
struct completion fw_comp;
|
||||
|
||||
|
||||
u8 bssid[ETH_ALEN];
|
||||
u8 mac_addr[ETH_ALEN];
|
||||
int channel;
|
||||
|
||||
u8 *cal_rssi;
|
||||
u8 *cal_channels;
|
||||
|
||||
enum fw_state fw_state;
|
||||
|
||||
spinlock_t tx_lock;
|
||||
|
||||
/* protected by tx_lock */
|
||||
struct list_head txbuffer;
|
||||
|
||||
/* protected by tx_lock */
|
||||
struct list_head tx_pending;
|
||||
|
||||
/* protected by tx_lock */
|
||||
int tx_queue_stopped;
|
||||
|
||||
/* protected by mutex */
|
||||
struct list_head tx_sent;
|
||||
|
||||
int tx_frames;
|
||||
|
||||
u8 *fw;
|
||||
int fw_len;
|
||||
|
||||
bool psm;
|
||||
bool associated;
|
||||
int aid;
|
||||
bool pspolling;
|
||||
};
|
||||
|
||||
|
||||
|
|
@ -1,434 +0,0 @@
|
|||
/************************************************************************
|
||||
* This is the LMAC API interface header file for STLC4560. *
|
||||
* Copyright (C) 2007 Conexant Systems, Inc. *
|
||||
* This program is free software; you can redistribute it and/or *
|
||||
* modify it under the terms of the GNU General Public License *
|
||||
* as published by the Free Software Foundation; either version 2 *
|
||||
* of the License, or (at your option) any later version. *
|
||||
* *
|
||||
* This program is distributed in the hope that it will be useful, *
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||
* GNU General Public License for more details. *
|
||||
* *
|
||||
* You should have received a copy of the GNU General Public License *
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.*
|
||||
*************************************************************************/
|
||||
|
||||
#ifndef __lmac_h__
|
||||
#define __lmac_h__
|
||||
|
||||
#define LM_TOP_VARIANT 0x0506
|
||||
#define LM_BOTTOM_VARIANT 0x0506
|
||||
|
||||
/*
|
||||
* LMAC - UMAC interface definition:
|
||||
*/
|
||||
|
||||
#define LM_FLAG_CONTROL 0x8000
|
||||
#define LM_FLAG_ALIGN 0x4000
|
||||
|
||||
#define LM_CTRL_OPSET 0x0001
|
||||
|
||||
#define LM_OUT_PROMISC 0x0001
|
||||
#define LM_OUT_TIMESTAMP 0x0002
|
||||
#define LM_OUT_SEQNR 0x0004
|
||||
#define LM_OUT_BURST 0x0010
|
||||
#define LM_OUT_NOCANCEL 0x0020
|
||||
#define LM_OUT_CLEARTIM 0x0040
|
||||
#define LM_OUT_HITCHHIKE 0x0080
|
||||
#define LM_OUT_COMPRESS 0x0100
|
||||
#define LM_OUT_CONCAT 0x0200
|
||||
#define LM_OUT_PCS_ACCEPT 0x0400
|
||||
#define LM_OUT_WAITEOSP 0x0800
|
||||
|
||||
|
||||
#define LM_ALOFT_SP 0x10
|
||||
#define LM_ALOFT_CTS 0x20
|
||||
#define LM_ALOFT_RTS 0x40
|
||||
#define LM_ALOFT_MASK 0x1f
|
||||
#define LM_ALOFT_RATE 0x0f
|
||||
|
||||
#define LM_IN_FCS_GOOD 0x0001
|
||||
#define LM_IN_MATCH_MAC 0x0002
|
||||
#define LM_IN_MCBC 0x0004
|
||||
#define LM_IN_BEACON 0x0008
|
||||
#define LM_IN_MATCH_BSS 0x0010
|
||||
#define LM_IN_BCAST_BSS 0x0020
|
||||
#define LM_IN_DATA 0x0040
|
||||
#define LM_IN_TRUNCATED 0x0080
|
||||
|
||||
#define LM_IN_TRANSPARENT 0x0200
|
||||
|
||||
#define LM_QUEUE_BEACON 0
|
||||
#define LM_QUEUE_SCAN 1
|
||||
#define LM_QUEUE_MGT 2
|
||||
#define LM_QUEUE_MCBC 3
|
||||
#define LM_QUEUE_DATA 4
|
||||
#define LM_QUEUE_DATA0 4
|
||||
#define LM_QUEUE_DATA1 5
|
||||
#define LM_QUEUE_DATA2 6
|
||||
#define LM_QUEUE_DATA3 7
|
||||
|
||||
#define LM_SETUP_INFRA 0x0001
|
||||
#define LM_SETUP_IBSS 0x0002
|
||||
#define LM_SETUP_TRANSPARENT 0x0008
|
||||
#define LM_SETUP_PROMISCUOUS 0x0010
|
||||
#define LM_SETUP_HIBERNATE 0x0020
|
||||
#define LM_SETUP_NOACK 0x0040
|
||||
#define LM_SETUP_RX_DISABLED 0x0080
|
||||
|
||||
#define LM_ANTENNA_0 0
|
||||
#define LM_ANTENNA_1 1
|
||||
#define LM_ANTENNA_DIVERSITY 2
|
||||
|
||||
#define LM_TX_FAILED 0x0001
|
||||
#define LM_TX_PSM 0x0002
|
||||
#define LM_TX_PSM_CANCELLED 0x0004
|
||||
|
||||
#define LM_SCAN_EXIT 0x0001
|
||||
#define LM_SCAN_TRAP 0x0002
|
||||
#define LM_SCAN_ACTIVE 0x0004
|
||||
#define LM_SCAN_FILTER 0x0008
|
||||
|
||||
#define LM_PSM 0x0001
|
||||
#define LM_PSM_DTIM 0x0002
|
||||
#define LM_PSM_MCBC 0x0004
|
||||
#define LM_PSM_CHECKSUM 0x0008
|
||||
#define LM_PSM_SKIP_MORE_DATA 0x0010
|
||||
#define LM_PSM_BEACON_TIMEOUT 0x0020
|
||||
#define LM_PSM_HFOSLEEP 0x0040
|
||||
#define LM_PSM_AUTOSWITCH_SLEEP 0x0080
|
||||
#define LM_PSM_LPIT 0x0100
|
||||
#define LM_PSM_BF_UCAST_SKIP 0x0200
|
||||
#define LM_PSM_BF_MCAST_SKIP 0x0400
|
||||
|
||||
/* hfosleep */
|
||||
#define LM_PSM_SLEEP_OPTION_MASK (LM_PSM_AUTOSWITCH_SLEEP | LM_PSM_HFOSLEEP)
|
||||
#define LM_PSM_SLEEP_OPTION_SHIFT 6
|
||||
/* hfosleepend */
|
||||
#define LM_PSM_BF_OPTION_MASK (LM_PSM_BF_MCAST_SKIP | LM_PSM_BF_UCAST_SKIP)
|
||||
#define LM_PSM_BF_OPTION_SHIFT 9
|
||||
|
||||
|
||||
#define LM_PRIVACC_WEP 0x01
|
||||
#define LM_PRIVACC_TKIP 0x02
|
||||
#define LM_PRIVACC_MICHAEL 0x04
|
||||
#define LM_PRIVACC_CCX_KP 0x08
|
||||
#define LM_PRIVACC_CCX_MIC 0x10
|
||||
#define LM_PRIVACC_AES_CCMP 0x20
|
||||
|
||||
/* size of s_lm_descr in words */
|
||||
#define LM_DESCR_SIZE_WORDS 11
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
|
||||
enum {
|
||||
LM_MODE_CLIENT = 0,
|
||||
LM_MODE_AP
|
||||
};
|
||||
|
||||
struct s_lm_descr {
|
||||
uint16_t modes;
|
||||
uint16_t flags;
|
||||
uint32_t buffer_start;
|
||||
uint32_t buffer_end;
|
||||
uint8_t header;
|
||||
uint8_t trailer;
|
||||
uint8_t tx_queues;
|
||||
uint8_t tx_depth;
|
||||
uint8_t privacy;
|
||||
uint8_t rx_keycache;
|
||||
uint8_t tim_size;
|
||||
uint8_t pad1;
|
||||
uint8_t rates[16];
|
||||
uint32_t link;
|
||||
uint16_t mtu;
|
||||
};
|
||||
|
||||
|
||||
struct s_lm_control {
|
||||
uint16_t flags;
|
||||
uint16_t length;
|
||||
uint32_t handle;
|
||||
uint16_t oid;
|
||||
uint16_t pad;
|
||||
/* uint8_t data[]; */
|
||||
};
|
||||
|
||||
enum {
|
||||
LM_PRIV_NONE = 0,
|
||||
LM_PRIV_WEP,
|
||||
LM_PRIV_TKIP,
|
||||
LM_PRIV_TKIPMICHAEL,
|
||||
LM_PRIV_CCX_WEPMIC,
|
||||
LM_PRIV_CCX_KPMIC,
|
||||
LM_PRIV_CCX_KP,
|
||||
LM_PRIV_AES_CCMP
|
||||
};
|
||||
|
||||
enum {
|
||||
LM_DECRYPT_NONE,
|
||||
LM_DECRYPT_OK,
|
||||
LM_DECRYPT_NOKEY,
|
||||
LM_DECRYPT_NOMICHAEL,
|
||||
LM_DECRYPT_NOCKIPMIC,
|
||||
LM_DECRYPT_FAIL_WEP,
|
||||
LM_DECRYPT_FAIL_TKIP,
|
||||
LM_DECRYPT_FAIL_MICHAEL,
|
||||
LM_DECRYPT_FAIL_CKIPKP,
|
||||
LM_DECRYPT_FAIL_CKIPMIC,
|
||||
LM_DECRYPT_FAIL_AESCCMP
|
||||
};
|
||||
|
||||
struct s_lm_data_out {
|
||||
uint16_t flags;
|
||||
uint16_t length;
|
||||
uint32_t handle;
|
||||
uint16_t aid;
|
||||
uint8_t rts_retries;
|
||||
uint8_t retries;
|
||||
uint8_t aloft[8];
|
||||
uint8_t aloft_ctrl;
|
||||
uint8_t crypt_offset;
|
||||
uint8_t keytype;
|
||||
uint8_t keylen;
|
||||
uint8_t key[16];
|
||||
uint8_t queue;
|
||||
uint8_t backlog;
|
||||
uint16_t durations[4];
|
||||
uint8_t antenna;
|
||||
uint8_t cts;
|
||||
int16_t power;
|
||||
uint8_t pad[2];
|
||||
/*uint8_t data[];*/
|
||||
};
|
||||
|
||||
#define LM_RCPI_INVALID (0xff)
|
||||
|
||||
struct s_lm_data_in {
|
||||
uint16_t flags;
|
||||
uint16_t length;
|
||||
uint16_t frequency;
|
||||
uint8_t antenna;
|
||||
uint8_t rate;
|
||||
uint8_t rcpi;
|
||||
uint8_t sq;
|
||||
uint8_t decrypt;
|
||||
uint8_t rssi_raw;
|
||||
uint32_t clock[2];
|
||||
/*uint8_t data[];*/
|
||||
};
|
||||
|
||||
union u_lm_data {
|
||||
struct s_lm_data_out out;
|
||||
struct s_lm_data_in in;
|
||||
};
|
||||
|
||||
enum {
|
||||
LM_OID_SETUP = 0,
|
||||
LM_OID_SCAN = 1,
|
||||
LM_OID_TRAP = 2,
|
||||
LM_OID_EDCF = 3,
|
||||
LM_OID_KEYCACHE = 4,
|
||||
LM_OID_PSM = 6,
|
||||
LM_OID_TXCANCEL = 7,
|
||||
LM_OID_TX = 8,
|
||||
LM_OID_BURST = 9,
|
||||
LM_OID_STATS = 10,
|
||||
LM_OID_LED = 13,
|
||||
LM_OID_TIMER = 15,
|
||||
LM_OID_NAV = 20,
|
||||
LM_OID_PCS = 22,
|
||||
LM_OID_BT_BALANCER = 28,
|
||||
LM_OID_GROUP_ADDRESS_TABLE = 30,
|
||||
LM_OID_ARPTABLE = 31,
|
||||
LM_OID_BT_OPTIONS = 35
|
||||
};
|
||||
|
||||
enum {
|
||||
LM_FRONTEND_UNKNOWN = 0,
|
||||
LM_FRONTEND_DUETTE3,
|
||||
LM_FRONTEND_DUETTE2,
|
||||
LM_FRONTEND_FRISBEE,
|
||||
LM_FRONTEND_CROSSBOW,
|
||||
LM_FRONTEND_LONGBOW
|
||||
};
|
||||
|
||||
|
||||
#define INVALID_LPF_BANDWIDTH 0xffff
|
||||
#define INVALID_OSC_START_DELAY 0xffff
|
||||
|
||||
struct s_lmo_setup {
|
||||
uint16_t flags;
|
||||
uint8_t macaddr[6];
|
||||
uint8_t bssid[6];
|
||||
uint8_t antenna;
|
||||
uint8_t rx_align;
|
||||
uint32_t rx_buffer;
|
||||
uint16_t rx_mtu;
|
||||
uint16_t frontend;
|
||||
uint16_t timeout;
|
||||
uint16_t truncate;
|
||||
uint32_t bratemask;
|
||||
uint8_t sbss_offset;
|
||||
uint8_t mcast_window;
|
||||
uint8_t rx_rssi_threshold;
|
||||
uint8_t rx_ed_threshold;
|
||||
uint32_t ref_clock;
|
||||
uint16_t lpf_bandwidth;
|
||||
uint16_t osc_start_delay;
|
||||
};
|
||||
|
||||
|
||||
struct s_lmo_scan {
|
||||
uint16_t flags;
|
||||
uint16_t dwell;
|
||||
uint8_t channel[292];
|
||||
uint32_t bratemask;
|
||||
uint8_t aloft[8];
|
||||
uint8_t rssical[8];
|
||||
};
|
||||
|
||||
|
||||
enum {
|
||||
LM_TRAP_SCAN = 0,
|
||||
LM_TRAP_TIMER,
|
||||
LM_TRAP_BEACON_TX,
|
||||
LM_TRAP_FAA_RADIO_ON,
|
||||
LM_TRAP_FAA_RADIO_OFF,
|
||||
LM_TRAP_RADAR,
|
||||
LM_TRAP_NO_BEACON,
|
||||
LM_TRAP_TBTT,
|
||||
LM_TRAP_SCO_ENTER,
|
||||
LM_TRAP_SCO_EXIT
|
||||
};
|
||||
|
||||
struct s_lmo_trap {
|
||||
uint16_t event;
|
||||
uint16_t frequency;
|
||||
};
|
||||
|
||||
struct s_lmo_timer {
|
||||
uint32_t interval;
|
||||
};
|
||||
|
||||
struct s_lmo_nav {
|
||||
uint32_t period;
|
||||
};
|
||||
|
||||
|
||||
struct s_lmo_edcf_queue;
|
||||
|
||||
struct s_lmo_edcf {
|
||||
uint8_t flags;
|
||||
uint8_t slottime;
|
||||
uint8_t sifs;
|
||||
uint8_t eofpad;
|
||||
struct s_lmo_edcf_queue {
|
||||
uint8_t aifs;
|
||||
uint8_t pad0;
|
||||
uint16_t cwmin;
|
||||
uint16_t cwmax;
|
||||
uint16_t txop;
|
||||
} queues[8];
|
||||
uint8_t mapping[4];
|
||||
uint16_t maxburst;
|
||||
uint16_t round_trip_delay;
|
||||
};
|
||||
|
||||
struct s_lmo_keycache {
|
||||
uint8_t entry;
|
||||
uint8_t keyid;
|
||||
uint8_t address[6];
|
||||
uint8_t pad[2];
|
||||
uint8_t keytype;
|
||||
uint8_t keylen;
|
||||
uint8_t key[24];
|
||||
};
|
||||
|
||||
|
||||
struct s_lm_interval;
|
||||
|
||||
struct s_lmo_psm {
|
||||
uint16_t flags;
|
||||
uint16_t aid;
|
||||
struct s_lm_interval {
|
||||
uint16_t interval;
|
||||
uint16_t periods;
|
||||
} intervals[4];
|
||||
/* uint16_t pad; */
|
||||
uint8_t beacon_rcpi_skip_max;
|
||||
uint8_t rcpi_delta_threshold;
|
||||
uint8_t nr;
|
||||
uint8_t exclude[1];
|
||||
};
|
||||
|
||||
#define MC_FILTER_ADDRESS_NUM 4
|
||||
|
||||
struct s_lmo_group_address_table {
|
||||
uint16_t filter_enable;
|
||||
uint16_t num_address;
|
||||
uint8_t macaddr_list[MC_FILTER_ADDRESS_NUM][6];
|
||||
};
|
||||
|
||||
struct s_lmo_txcancel {
|
||||
uint32_t address[1];
|
||||
};
|
||||
|
||||
|
||||
struct s_lmo_tx {
|
||||
uint8_t flags;
|
||||
uint8_t retries;
|
||||
uint8_t rcpi;
|
||||
uint8_t sq;
|
||||
uint16_t seqctrl;
|
||||
uint8_t antenna;
|
||||
uint8_t pad;
|
||||
};
|
||||
|
||||
struct s_lmo_burst {
|
||||
uint8_t flags;
|
||||
uint8_t queue;
|
||||
uint8_t backlog;
|
||||
uint8_t pad;
|
||||
uint16_t durations[32];
|
||||
};
|
||||
|
||||
struct s_lmo_stats {
|
||||
uint32_t valid;
|
||||
uint32_t fcs;
|
||||
uint32_t abort;
|
||||
uint32_t phyabort;
|
||||
uint32_t rts_success;
|
||||
uint32_t rts_fail;
|
||||
uint32_t timestamp;
|
||||
uint32_t time_tx;
|
||||
uint32_t noisefloor;
|
||||
uint32_t sample_noise[8];
|
||||
uint32_t sample_cca;
|
||||
uint32_t sample_tx;
|
||||
};
|
||||
|
||||
|
||||
struct s_lmo_led {
|
||||
uint16_t flags;
|
||||
uint16_t mask[2];
|
||||
uint16_t delay/*[2]*/;
|
||||
};
|
||||
|
||||
|
||||
struct s_lmo_bt_balancer {
|
||||
uint16_t prio_thresh;
|
||||
uint16_t acl_thresh;
|
||||
};
|
||||
|
||||
|
||||
struct s_lmo_arp_table {
|
||||
uint16_t filter_enable;
|
||||
uint32_t ipaddr;
|
||||
};
|
||||
|
||||
#endif /* __ASSEMBLER__ */
|
||||
|
||||
#endif /* __lmac_h__ */
|
||||
Loading…
Reference in New Issue