Merge branch 'perf/uprobes' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/uprobes
This commit is contained in:
commit
9cba26e66d
|
@ -1,5 +1,5 @@
|
|||
What: /sys/bus/usb/drivers/usbtmc/devices/*/interface_capabilities
|
||||
What: /sys/bus/usb/drivers/usbtmc/devices/*/device_capabilities
|
||||
What: /sys/bus/usb/drivers/usbtmc/*/interface_capabilities
|
||||
What: /sys/bus/usb/drivers/usbtmc/*/device_capabilities
|
||||
Date: August 2008
|
||||
Contact: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
Description:
|
||||
|
@ -12,8 +12,8 @@ Description:
|
|||
The files are read only.
|
||||
|
||||
|
||||
What: /sys/bus/usb/drivers/usbtmc/devices/*/usb488_interface_capabilities
|
||||
What: /sys/bus/usb/drivers/usbtmc/devices/*/usb488_device_capabilities
|
||||
What: /sys/bus/usb/drivers/usbtmc/*/usb488_interface_capabilities
|
||||
What: /sys/bus/usb/drivers/usbtmc/*/usb488_device_capabilities
|
||||
Date: August 2008
|
||||
Contact: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
Description:
|
||||
|
@ -27,7 +27,7 @@ Description:
|
|||
The files are read only.
|
||||
|
||||
|
||||
What: /sys/bus/usb/drivers/usbtmc/devices/*/TermChar
|
||||
What: /sys/bus/usb/drivers/usbtmc/*/TermChar
|
||||
Date: August 2008
|
||||
Contact: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
Description:
|
||||
|
@ -40,7 +40,7 @@ Description:
|
|||
sent to the device or not.
|
||||
|
||||
|
||||
What: /sys/bus/usb/drivers/usbtmc/devices/*/TermCharEnabled
|
||||
What: /sys/bus/usb/drivers/usbtmc/*/TermCharEnabled
|
||||
Date: August 2008
|
||||
Contact: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
Description:
|
||||
|
@ -51,7 +51,7 @@ Description:
|
|||
published by the USB-IF.
|
||||
|
||||
|
||||
What: /sys/bus/usb/drivers/usbtmc/devices/*/auto_abort
|
||||
What: /sys/bus/usb/drivers/usbtmc/*/auto_abort
|
||||
Date: August 2008
|
||||
Contact: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
Description:
|
||||
|
|
|
@ -0,0 +1,18 @@
|
|||
What: /sys/block/rssd*/registers
|
||||
Date: March 2012
|
||||
KernelVersion: 3.3
|
||||
Contact: Asai Thambi S P <asamymuthupa@micron.com>
|
||||
Description: This is a read-only file. Dumps below driver information and
|
||||
hardware registers.
|
||||
- S ACTive
|
||||
- Command Issue
|
||||
- Allocated
|
||||
- Completed
|
||||
- PORT IRQ STAT
|
||||
- HOST IRQ STAT
|
||||
|
||||
What: /sys/block/rssd*/status
|
||||
Date: April 2012
|
||||
KernelVersion: 3.4
|
||||
Contact: Asai Thambi S P <asamymuthupa@micron.com>
|
||||
Description: This is a read-only file. Indicates the status of the device.
|
|
@ -0,0 +1,8 @@
|
|||
What: /sys/block/<device>/iosched/target_latency
|
||||
Date: March 2012
|
||||
contact: Tao Ma <boyu.mt@taobao.com>
|
||||
Description:
|
||||
The /sys/block/<device>/iosched/target_latency only exists
|
||||
when the user sets cfq to /sys/block/<device>/scheduler.
|
||||
It contains an estimated latency time for the cfq. cfq will
|
||||
use it to calculate the time slice used for every task.
|
|
@ -1,6 +1,6 @@
|
|||
<refentry id="V4L2-PIX-FMT-NV12M">
|
||||
<refmeta>
|
||||
<refentrytitle>V4L2_PIX_FMT_NV12M ('NV12M')</refentrytitle>
|
||||
<refentrytitle>V4L2_PIX_FMT_NV12M ('NM12')</refentrytitle>
|
||||
&manvol;
|
||||
</refmeta>
|
||||
<refnamediv>
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
<refentry id="V4L2-PIX-FMT-YUV420M">
|
||||
<refmeta>
|
||||
<refentrytitle>V4L2_PIX_FMT_YUV420M ('YU12M')</refentrytitle>
|
||||
<refentrytitle>V4L2_PIX_FMT_YUV420M ('YM12')</refentrytitle>
|
||||
&manvol;
|
||||
</refmeta>
|
||||
<refnamediv>
|
||||
|
|
|
@ -34,8 +34,7 @@ Current Status: linux-2.6.34-mmotm(development version of 2010/April)
|
|||
|
||||
Features:
|
||||
- accounting anonymous pages, file caches, swap caches usage and limiting them.
|
||||
- private LRU and reclaim routine. (system's global LRU and private LRU
|
||||
work independently from each other)
|
||||
- pages are linked to per-memcg LRU exclusively, and there is no global LRU.
|
||||
- optionally, memory+swap usage can be accounted and limited.
|
||||
- hierarchical accounting
|
||||
- soft limit
|
||||
|
@ -154,7 +153,7 @@ updated. page_cgroup has its own LRU on cgroup.
|
|||
2.2.1 Accounting details
|
||||
|
||||
All mapped anon pages (RSS) and cache pages (Page Cache) are accounted.
|
||||
Some pages which are never reclaimable and will not be on the global LRU
|
||||
Some pages which are never reclaimable and will not be on the LRU
|
||||
are not accounted. We just account pages under usual VM management.
|
||||
|
||||
RSS pages are accounted at page_fault unless they've already been accounted
|
||||
|
|
|
@ -531,3 +531,11 @@ Why: There appear to be no production users of the get_robust_list syscall,
|
|||
of ASLR. It was only ever intended for debugging, so it should be
|
||||
removed.
|
||||
Who: Kees Cook <keescook@chromium.org>
|
||||
|
||||
----------------------------
|
||||
|
||||
What: setitimer accepts user NULL pointer (value)
|
||||
When: 3.6
|
||||
Why: setitimer is not returning -EFAULT if user pointer is NULL. This
|
||||
violates the spec.
|
||||
Who: Sasikantha Babu <sasikanth.v19@gmail.com>
|
||||
|
|
|
@ -114,7 +114,7 @@ members are defined:
|
|||
struct file_system_type {
|
||||
const char *name;
|
||||
int fs_flags;
|
||||
struct dentry (*mount) (struct file_system_type *, int,
|
||||
struct dentry *(*mount) (struct file_system_type *, int,
|
||||
const char *, void *);
|
||||
void (*kill_sb) (struct super_block *);
|
||||
struct module *owner;
|
||||
|
|
|
@ -43,7 +43,9 @@ ALC680
|
|||
|
||||
ALC882/883/885/888/889
|
||||
======================
|
||||
N/A
|
||||
acer-aspire-4930g Acer Aspire 4930G/5930G/6530G/6930G/7730G
|
||||
acer-aspire-8930g Acer Aspire 8330G/6935G
|
||||
acer-aspire Acer Aspire others
|
||||
|
||||
ALC861/660
|
||||
==========
|
||||
|
|
|
@ -168,6 +168,28 @@ that if the completion handler or anyone else tries to resubmit it
|
|||
they will get a -EPERM error. Thus you can be sure that when
|
||||
usb_kill_urb() returns, the URB is totally idle.
|
||||
|
||||
There is a lifetime issue to consider. An URB may complete at any
|
||||
time, and the completion handler may free the URB. If this happens
|
||||
while usb_unlink_urb or usb_kill_urb is running, it will cause a
|
||||
memory-access violation. The driver is responsible for avoiding this,
|
||||
which often means some sort of lock will be needed to prevent the URB
|
||||
from being deallocated while it is still in use.
|
||||
|
||||
On the other hand, since usb_unlink_urb may end up calling the
|
||||
completion handler, the handler must not take any lock that is held
|
||||
when usb_unlink_urb is invoked. The general solution to this problem
|
||||
is to increment the URB's reference count while holding the lock, then
|
||||
drop the lock and call usb_unlink_urb or usb_kill_urb, and then
|
||||
decrement the URB's reference count. You increment the reference
|
||||
count by calling
|
||||
|
||||
struct urb *usb_get_urb(struct urb *urb)
|
||||
|
||||
(ignore the return value; it is the same as the argument) and
|
||||
decrement the reference count by calling usb_free_urb. Of course,
|
||||
none of this is necessary if there's no danger of the URB being freed
|
||||
by the completion handler.
|
||||
|
||||
|
||||
1.7. What about the completion handler?
|
||||
|
||||
|
|
|
@ -183,10 +183,10 @@ An input control transfer to get a port status.
|
|||
d5ea89a0 3575914555 S Ci:1:001:0 s a3 00 0000 0003 0004 4 <
|
||||
d5ea89a0 3575914560 C Ci:1:001:0 0 4 = 01050000
|
||||
|
||||
An output bulk transfer to send a SCSI command 0x5E in a 31-byte Bulk wrapper
|
||||
to a storage device at address 5:
|
||||
An output bulk transfer to send a SCSI command 0x28 (READ_10) in a 31-byte
|
||||
Bulk wrapper to a storage device at address 5:
|
||||
|
||||
dd65f0e8 4128379752 S Bo:1:005:2 -115 31 = 55534243 5e000000 00000000 00000600 00000000 00000000 00000000 000000
|
||||
dd65f0e8 4128379752 S Bo:1:005:2 -115 31 = 55534243 ad000000 00800000 80010a28 20000000 20000040 00000000 000000
|
||||
dd65f0e8 4128379808 C Bo:1:005:2 0 31 >
|
||||
|
||||
* Raw binary format and API
|
||||
|
|
25
MAINTAINERS
25
MAINTAINERS
|
@ -1521,8 +1521,8 @@ M: Gustavo Padovan <gustavo@padovan.org>
|
|||
M: Johan Hedberg <johan.hedberg@gmail.com>
|
||||
L: linux-bluetooth@vger.kernel.org
|
||||
W: http://www.bluez.org/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/padovan/bluetooth.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jh/bluetooth.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/bluetooth/bluetooth.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/bluetooth/bluetooth-next.git
|
||||
S: Maintained
|
||||
F: drivers/bluetooth/
|
||||
|
||||
|
@ -1532,8 +1532,8 @@ M: Gustavo Padovan <gustavo@padovan.org>
|
|||
M: Johan Hedberg <johan.hedberg@gmail.com>
|
||||
L: linux-bluetooth@vger.kernel.org
|
||||
W: http://www.bluez.org/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/padovan/bluetooth.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jh/bluetooth.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/bluetooth/bluetooth.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/bluetooth/bluetooth-next.git
|
||||
S: Maintained
|
||||
F: net/bluetooth/
|
||||
F: include/net/bluetooth/
|
||||
|
@ -2321,9 +2321,9 @@ S: Supported
|
|||
F: drivers/acpi/dock.c
|
||||
|
||||
DOCUMENTATION
|
||||
M: Randy Dunlap <rdunlap@xenotime.net>
|
||||
M: Rob Landley <rob@landley.net>
|
||||
L: linux-doc@vger.kernel.org
|
||||
T: quilt http://xenotime.net/kernel-doc-patches/current/
|
||||
T: TBD
|
||||
S: Maintained
|
||||
F: Documentation/
|
||||
|
||||
|
@ -4533,8 +4533,7 @@ S: Supported
|
|||
F: drivers/net/ethernet/myricom/myri10ge/
|
||||
|
||||
NATSEMI ETHERNET DRIVER (DP8381x)
|
||||
M: Tim Hockin <thockin@hockin.org>
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: drivers/net/ethernet/natsemi/natsemi.c
|
||||
|
||||
NATIVE INSTRUMENTS USB SOUND INTERFACE DRIVER
|
||||
|
@ -4803,6 +4802,7 @@ F: arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
|
|||
F: arch/arm/mach-omap2/clockdomain44xx.c
|
||||
|
||||
OMAP AUDIO SUPPORT
|
||||
M: Peter Ujfalusi <peter.ujfalusi@ti.com>
|
||||
M: Jarkko Nikula <jarkko.nikula@bitmer.com>
|
||||
L: alsa-devel@alsa-project.org (subscribers-only)
|
||||
L: linux-omap@vger.kernel.org
|
||||
|
@ -5117,6 +5117,11 @@ F: drivers/i2c/busses/i2c-pca-*
|
|||
F: include/linux/i2c-algo-pca.h
|
||||
F: include/linux/i2c-pca-platform.h
|
||||
|
||||
PCDP - PRIMARY CONSOLE AND DEBUG PORT
|
||||
M: Khalid Aziz <khalid.aziz@hp.com>
|
||||
S: Maintained
|
||||
F: drivers/firmware/pcdp.*
|
||||
|
||||
PCI ERROR RECOVERY
|
||||
M: Linas Vepstas <linasvepstas@gmail.com>
|
||||
L: linux-pci@vger.kernel.org
|
||||
|
@ -6466,6 +6471,7 @@ S: Odd Fixes
|
|||
F: drivers/staging/olpc_dcon/
|
||||
|
||||
STAGING - OZMO DEVICES USB OVER WIFI DRIVER
|
||||
M: Rupesh Gujare <rgujare@ozmodevices.com>
|
||||
M: Chris Kelly <ckelly@ozmodevices.com>
|
||||
S: Maintained
|
||||
F: drivers/staging/ozwpan/
|
||||
|
@ -7461,8 +7467,7 @@ F: include/linux/wm97xx.h
|
|||
|
||||
WOLFSON MICROELECTRONICS DRIVERS
|
||||
M: Mark Brown <broonie@opensource.wolfsonmicro.com>
|
||||
M: Ian Lartey <ian@opensource.wolfsonmicro.com>
|
||||
M: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
|
||||
L: patches@opensource.wolfsonmicro.com
|
||||
T: git git://opensource.wolfsonmicro.com/linux-2.6-asoc
|
||||
T: git git://opensource.wolfsonmicro.com/linux-2.6-audioplus
|
||||
W: http://opensource.wolfsonmicro.com/content/linux-drivers-wolfson-devices
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 4
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc2
|
||||
EXTRAVERSION = -rc4
|
||||
NAME = Saber-toothed Squirrel
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -3,6 +3,7 @@
|
|||
|
||||
#include <linux/types.h>
|
||||
#include <asm/barrier.h>
|
||||
#include <asm/cmpxchg.h>
|
||||
|
||||
/*
|
||||
* Atomic operations that C can't guarantee us. Useful for
|
||||
|
@ -168,73 +169,6 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
|
|||
return result;
|
||||
}
|
||||
|
||||
/*
|
||||
* Atomic exchange routines.
|
||||
*/
|
||||
|
||||
#define __ASM__MB
|
||||
#define ____xchg(type, args...) __xchg ## type ## _local(args)
|
||||
#define ____cmpxchg(type, args...) __cmpxchg ## type ## _local(args)
|
||||
#include <asm/xchg.h>
|
||||
|
||||
#define xchg_local(ptr,x) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) _x_ = (x); \
|
||||
(__typeof__(*(ptr))) __xchg_local((ptr), (unsigned long)_x_, \
|
||||
sizeof(*(ptr))); \
|
||||
})
|
||||
|
||||
#define cmpxchg_local(ptr, o, n) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) _o_ = (o); \
|
||||
__typeof__(*(ptr)) _n_ = (n); \
|
||||
(__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \
|
||||
(unsigned long)_n_, \
|
||||
sizeof(*(ptr))); \
|
||||
})
|
||||
|
||||
#define cmpxchg64_local(ptr, o, n) \
|
||||
({ \
|
||||
BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
|
||||
cmpxchg_local((ptr), (o), (n)); \
|
||||
})
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
#undef __ASM__MB
|
||||
#define __ASM__MB "\tmb\n"
|
||||
#endif
|
||||
#undef ____xchg
|
||||
#undef ____cmpxchg
|
||||
#define ____xchg(type, args...) __xchg ##type(args)
|
||||
#define ____cmpxchg(type, args...) __cmpxchg ##type(args)
|
||||
#include <asm/xchg.h>
|
||||
|
||||
#define xchg(ptr,x) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) _x_ = (x); \
|
||||
(__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, \
|
||||
sizeof(*(ptr))); \
|
||||
})
|
||||
|
||||
#define cmpxchg(ptr, o, n) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) _o_ = (o); \
|
||||
__typeof__(*(ptr)) _n_ = (n); \
|
||||
(__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
|
||||
(unsigned long)_n_, sizeof(*(ptr)));\
|
||||
})
|
||||
|
||||
#define cmpxchg64(ptr, o, n) \
|
||||
({ \
|
||||
BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
|
||||
cmpxchg((ptr), (o), (n)); \
|
||||
})
|
||||
|
||||
#undef __ASM__MB
|
||||
#undef ____cmpxchg
|
||||
|
||||
#define __HAVE_ARCH_CMPXCHG 1
|
||||
|
||||
#define atomic64_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new))
|
||||
#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
|
||||
|
||||
|
|
|
@ -0,0 +1,71 @@
|
|||
#ifndef _ALPHA_CMPXCHG_H
|
||||
#define _ALPHA_CMPXCHG_H
|
||||
|
||||
/*
|
||||
* Atomic exchange routines.
|
||||
*/
|
||||
|
||||
#define __ASM__MB
|
||||
#define ____xchg(type, args...) __xchg ## type ## _local(args)
|
||||
#define ____cmpxchg(type, args...) __cmpxchg ## type ## _local(args)
|
||||
#include <asm/xchg.h>
|
||||
|
||||
#define xchg_local(ptr, x) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) _x_ = (x); \
|
||||
(__typeof__(*(ptr))) __xchg_local((ptr), (unsigned long)_x_, \
|
||||
sizeof(*(ptr))); \
|
||||
})
|
||||
|
||||
#define cmpxchg_local(ptr, o, n) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) _o_ = (o); \
|
||||
__typeof__(*(ptr)) _n_ = (n); \
|
||||
(__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \
|
||||
(unsigned long)_n_, \
|
||||
sizeof(*(ptr))); \
|
||||
})
|
||||
|
||||
#define cmpxchg64_local(ptr, o, n) \
|
||||
({ \
|
||||
BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
|
||||
cmpxchg_local((ptr), (o), (n)); \
|
||||
})
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
#undef __ASM__MB
|
||||
#define __ASM__MB "\tmb\n"
|
||||
#endif
|
||||
#undef ____xchg
|
||||
#undef ____cmpxchg
|
||||
#define ____xchg(type, args...) __xchg ##type(args)
|
||||
#define ____cmpxchg(type, args...) __cmpxchg ##type(args)
|
||||
#include <asm/xchg.h>
|
||||
|
||||
#define xchg(ptr, x) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) _x_ = (x); \
|
||||
(__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, \
|
||||
sizeof(*(ptr))); \
|
||||
})
|
||||
|
||||
#define cmpxchg(ptr, o, n) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) _o_ = (o); \
|
||||
__typeof__(*(ptr)) _n_ = (n); \
|
||||
(__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
|
||||
(unsigned long)_n_, sizeof(*(ptr)));\
|
||||
})
|
||||
|
||||
#define cmpxchg64(ptr, o, n) \
|
||||
({ \
|
||||
BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
|
||||
cmpxchg((ptr), (o), (n)); \
|
||||
})
|
||||
|
||||
#undef __ASM__MB
|
||||
#undef ____cmpxchg
|
||||
|
||||
#define __HAVE_ARCH_CMPXCHG 1
|
||||
|
||||
#endif /* _ALPHA_CMPXCHG_H */
|
|
@ -1,10 +1,10 @@
|
|||
#ifndef _ALPHA_ATOMIC_H
|
||||
#ifndef _ALPHA_CMPXCHG_H
|
||||
#error Do not include xchg.h directly!
|
||||
#else
|
||||
/*
|
||||
* xchg/xchg_local and cmpxchg/cmpxchg_local share the same code
|
||||
* except that local version do not have the expensive memory barrier.
|
||||
* So this file is included twice from asm/system.h.
|
||||
* So this file is included twice from asm/cmpxchg.h.
|
||||
*/
|
||||
|
||||
/*
|
||||
|
|
|
@ -824,7 +824,6 @@ static void alpha_perf_event_irq_handler(unsigned long la_ptr,
|
|||
|
||||
idx = la_ptr;
|
||||
|
||||
perf_sample_data_init(&data, 0);
|
||||
for (j = 0; j < cpuc->n_events; j++) {
|
||||
if (cpuc->current_idx[j] == idx)
|
||||
break;
|
||||
|
@ -848,7 +847,7 @@ static void alpha_perf_event_irq_handler(unsigned long la_ptr,
|
|||
|
||||
hwc = &event->hw;
|
||||
alpha_perf_event_update(event, hwc, idx, alpha_pmu->pmc_max_period[idx]+1);
|
||||
data.period = event->hw.last_period;
|
||||
perf_sample_data_init(&data, 0, hwc->last_period);
|
||||
|
||||
if (alpha_perf_event_set_period(event, hwc, idx)) {
|
||||
if (perf_event_overflow(event, &data, regs)) {
|
||||
|
|
|
@ -77,6 +77,8 @@ int atags_to_fdt(void *atag_list, void *fdt, int total_space)
|
|||
} else if (atag->hdr.tag == ATAG_MEM) {
|
||||
if (memcount >= sizeof(mem_reg_property)/4)
|
||||
continue;
|
||||
if (!atag->u.mem.size)
|
||||
continue;
|
||||
mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.start);
|
||||
mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.size);
|
||||
} else if (atag->hdr.tag == ATAG_INITRD2) {
|
||||
|
|
|
@ -273,7 +273,7 @@ restart: adr r0, LC0
|
|||
add r0, r0, #0x100
|
||||
mov r1, r6
|
||||
sub r2, sp, r6
|
||||
blne atags_to_fdt
|
||||
bleq atags_to_fdt
|
||||
|
||||
ldmfd sp!, {r0-r3, ip, lr}
|
||||
sub sp, sp, #0x10000
|
||||
|
|
|
@ -55,7 +55,6 @@
|
|||
#interrupt-cells = <2>;
|
||||
compatible = "atmel,at91rm9200-aic";
|
||||
interrupt-controller;
|
||||
interrupt-parent;
|
||||
reg = <0xfffff000 0x200>;
|
||||
};
|
||||
|
||||
|
|
|
@ -56,7 +56,6 @@
|
|||
#interrupt-cells = <2>;
|
||||
compatible = "atmel,at91rm9200-aic";
|
||||
interrupt-controller;
|
||||
interrupt-parent;
|
||||
reg = <0xfffff000 0x200>;
|
||||
};
|
||||
|
||||
|
|
|
@ -54,7 +54,6 @@
|
|||
#interrupt-cells = <2>;
|
||||
compatible = "atmel,at91rm9200-aic";
|
||||
interrupt-controller;
|
||||
interrupt-parent;
|
||||
reg = <0xfffff000 0x200>;
|
||||
};
|
||||
|
||||
|
|
|
@ -24,7 +24,6 @@
|
|||
#interrupt-cells = <3>;
|
||||
#address-cells = <1>;
|
||||
interrupt-controller;
|
||||
interrupt-parent;
|
||||
reg = <0xa0411000 0x1000>,
|
||||
<0xa0410100 0x100>;
|
||||
};
|
||||
|
|
|
@ -89,7 +89,6 @@
|
|||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
interrupt-controller;
|
||||
interrupt-parent;
|
||||
reg = <0xfff11000 0x1000>,
|
||||
<0xfff10100 0x100>;
|
||||
};
|
||||
|
|
|
@ -427,19 +427,18 @@ int __init vic_of_init(struct device_node *node, struct device_node *parent)
|
|||
|
||||
/*
|
||||
* Handle each interrupt in a single VIC. Returns non-zero if we've
|
||||
* handled at least one interrupt. This does a single read of the
|
||||
* status register and handles all interrupts in order from LSB first.
|
||||
* handled at least one interrupt. This reads the status register
|
||||
* before handling each interrupt, which is necessary given that
|
||||
* handle_IRQ may briefly re-enable interrupts for soft IRQ handling.
|
||||
*/
|
||||
static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
|
||||
{
|
||||
u32 stat, irq;
|
||||
int handled = 0;
|
||||
|
||||
stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
|
||||
while (stat) {
|
||||
while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) {
|
||||
irq = ffs(stat) - 1;
|
||||
handle_IRQ(irq_find_mapping(vic->domain, irq), regs);
|
||||
stat &= ~(1 << irq);
|
||||
handled = 1;
|
||||
}
|
||||
|
||||
|
|
|
@ -11,7 +11,7 @@ CONFIG_KALLSYMS_EXTRA_PASS=y
|
|||
# CONFIG_TIMERFD is not set
|
||||
# CONFIG_EVENTFD is not set
|
||||
# CONFIG_AIO is not set
|
||||
CONFIG_PERF_COUNTERS=y
|
||||
CONFIG_PERF_EVENTS=y
|
||||
# CONFIG_VM_EVENT_COUNTERS is not set
|
||||
# CONFIG_SLUB_DEBUG is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
|
|
|
@ -112,6 +112,7 @@ CONFIG_WATCHDOG=y
|
|||
CONFIG_IMX2_WDT=y
|
||||
CONFIG_MFD_MC13XXX=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_REGULATOR_MC13783=y
|
||||
CONFIG_REGULATOR_MC13892=y
|
||||
CONFIG_FB=y
|
||||
|
|
|
@ -8,8 +8,6 @@ CONFIG_MODULE_UNLOAD=y
|
|||
# CONFIG_LBDAF is not set
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
CONFIG_ARCH_U8500=y
|
||||
CONFIG_UX500_SOC_DB5500=y
|
||||
CONFIG_UX500_SOC_DB8500=y
|
||||
CONFIG_MACH_HREFV60=y
|
||||
CONFIG_MACH_SNOWBALL=y
|
||||
CONFIG_MACH_U5500=y
|
||||
|
@ -39,7 +37,6 @@ CONFIG_CAIF=y
|
|||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_SIZE=65536
|
||||
CONFIG_MISC_DEVICES=y
|
||||
CONFIG_AB8500_PWM=y
|
||||
CONFIG_SENSORS_BH1780=y
|
||||
CONFIG_NETDEVICES=y
|
||||
|
@ -65,16 +62,18 @@ CONFIG_SERIAL_AMBA_PL011=y
|
|||
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HW_RANDOM_NOMADIK=y
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_NOMADIK=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_PL022=y
|
||||
CONFIG_GPIO_STMPE=y
|
||||
CONFIG_GPIO_TC3589X=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_AB8500_BM=y
|
||||
CONFIG_AB8500_BATTERY_THERM_ON_BATCTRL=y
|
||||
CONFIG_MFD_STMPE=y
|
||||
CONFIG_MFD_TC3589X=y
|
||||
CONFIG_AB5500_CORE=y
|
||||
CONFIG_AB8500_CORE=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_AB8500=y
|
||||
# CONFIG_HID_SUPPORT is not set
|
||||
CONFIG_USB_GADGET=y
|
||||
|
|
|
@ -14,7 +14,7 @@
|
|||
#define JUMP_LABEL_NOP "nop"
|
||||
#endif
|
||||
|
||||
static __always_inline bool arch_static_branch(struct jump_label_key *key)
|
||||
static __always_inline bool arch_static_branch(struct static_key *key)
|
||||
{
|
||||
asm goto("1:\n\t"
|
||||
JUMP_LABEL_NOP "\n\t"
|
||||
|
|
|
@ -489,8 +489,6 @@ armv6pmu_handle_irq(int irq_num,
|
|||
*/
|
||||
armv6_pmcr_write(pmcr);
|
||||
|
||||
perf_sample_data_init(&data, 0);
|
||||
|
||||
cpuc = &__get_cpu_var(cpu_hw_events);
|
||||
for (idx = 0; idx < cpu_pmu->num_events; ++idx) {
|
||||
struct perf_event *event = cpuc->events[idx];
|
||||
|
@ -509,7 +507,7 @@ armv6pmu_handle_irq(int irq_num,
|
|||
|
||||
hwc = &event->hw;
|
||||
armpmu_event_update(event, hwc, idx);
|
||||
data.period = event->hw.last_period;
|
||||
perf_sample_data_init(&data, 0, hwc->last_period);
|
||||
if (!armpmu_event_set_period(event, hwc, idx))
|
||||
continue;
|
||||
|
||||
|
|
|
@ -1077,8 +1077,6 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
|
|||
*/
|
||||
regs = get_irq_regs();
|
||||
|
||||
perf_sample_data_init(&data, 0);
|
||||
|
||||
cpuc = &__get_cpu_var(cpu_hw_events);
|
||||
for (idx = 0; idx < cpu_pmu->num_events; ++idx) {
|
||||
struct perf_event *event = cpuc->events[idx];
|
||||
|
@ -1097,7 +1095,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
|
|||
|
||||
hwc = &event->hw;
|
||||
armpmu_event_update(event, hwc, idx);
|
||||
data.period = event->hw.last_period;
|
||||
perf_sample_data_init(&data, 0, hwc->last_period);
|
||||
if (!armpmu_event_set_period(event, hwc, idx))
|
||||
continue;
|
||||
|
||||
|
|
|
@ -248,8 +248,6 @@ xscale1pmu_handle_irq(int irq_num, void *dev)
|
|||
|
||||
regs = get_irq_regs();
|
||||
|
||||
perf_sample_data_init(&data, 0);
|
||||
|
||||
cpuc = &__get_cpu_var(cpu_hw_events);
|
||||
for (idx = 0; idx < cpu_pmu->num_events; ++idx) {
|
||||
struct perf_event *event = cpuc->events[idx];
|
||||
|
@ -263,7 +261,7 @@ xscale1pmu_handle_irq(int irq_num, void *dev)
|
|||
|
||||
hwc = &event->hw;
|
||||
armpmu_event_update(event, hwc, idx);
|
||||
data.period = event->hw.last_period;
|
||||
perf_sample_data_init(&data, 0, hwc->last_period);
|
||||
if (!armpmu_event_set_period(event, hwc, idx))
|
||||
continue;
|
||||
|
||||
|
@ -588,8 +586,6 @@ xscale2pmu_handle_irq(int irq_num, void *dev)
|
|||
|
||||
regs = get_irq_regs();
|
||||
|
||||
perf_sample_data_init(&data, 0);
|
||||
|
||||
cpuc = &__get_cpu_var(cpu_hw_events);
|
||||
for (idx = 0; idx < cpu_pmu->num_events; ++idx) {
|
||||
struct perf_event *event = cpuc->events[idx];
|
||||
|
@ -603,7 +599,7 @@ xscale2pmu_handle_irq(int irq_num, void *dev)
|
|||
|
||||
hwc = &event->hw;
|
||||
armpmu_event_update(event, hwc, idx);
|
||||
data.period = event->hw.last_period;
|
||||
perf_sample_data_init(&data, 0, hwc->last_period);
|
||||
if (!armpmu_event_set_period(event, hwc, idx))
|
||||
continue;
|
||||
|
||||
|
|
|
@ -523,6 +523,20 @@ int __init arm_add_memory(phys_addr_t start, unsigned long size)
|
|||
*/
|
||||
size -= start & ~PAGE_MASK;
|
||||
bank->start = PAGE_ALIGN(start);
|
||||
|
||||
#ifndef CONFIG_LPAE
|
||||
if (bank->start + size < bank->start) {
|
||||
printk(KERN_CRIT "Truncating memory at 0x%08llx to fit in "
|
||||
"32-bit physical address space\n", (long long)start);
|
||||
/*
|
||||
* To ensure bank->start + bank->size is representable in
|
||||
* 32 bits, we use ULONG_MAX as the upper limit rather than 4GB.
|
||||
* This means we lose a page after masking.
|
||||
*/
|
||||
size = ULONG_MAX - bank->start;
|
||||
}
|
||||
#endif
|
||||
|
||||
bank->size = size & PAGE_MASK;
|
||||
|
||||
/*
|
||||
|
|
|
@ -118,10 +118,14 @@ static int twd_cpufreq_transition(struct notifier_block *nb,
|
|||
* The twd clock events must be reprogrammed to account for the new
|
||||
* frequency. The timer is local to a cpu, so cross-call to the
|
||||
* changing cpu.
|
||||
*
|
||||
* Only wait for it to finish, if the cpu is active to avoid
|
||||
* deadlock when cpu1 is spinning on while(!cpu_active(cpu1)) during
|
||||
* booting of that cpu.
|
||||
*/
|
||||
if (state == CPUFREQ_POSTCHANGE || state == CPUFREQ_RESUMECHANGE)
|
||||
smp_call_function_single(freqs->cpu, twd_update_frequency,
|
||||
NULL, 1);
|
||||
NULL, cpu_active(freqs->cpu));
|
||||
|
||||
return NOTIFY_OK;
|
||||
}
|
||||
|
|
|
@ -1173,7 +1173,6 @@ void __init at91_add_device_serial(void)
|
|||
printk(KERN_INFO "AT91: No default serial console defined.\n");
|
||||
}
|
||||
#else
|
||||
void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
|
||||
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
|
||||
void __init at91_set_serial_console(unsigned portnr) {}
|
||||
void __init at91_add_device_serial(void) {}
|
||||
|
|
|
@ -23,6 +23,7 @@
|
|||
#include <linux/interrupt.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/clockchips.h>
|
||||
#include <linux/export.h>
|
||||
|
||||
#include <asm/mach/time.h>
|
||||
|
||||
|
@ -176,6 +177,7 @@ static struct clock_event_device clkevt = {
|
|||
};
|
||||
|
||||
void __iomem *at91_st_base;
|
||||
EXPORT_SYMBOL_GPL(at91_st_base);
|
||||
|
||||
void __init at91rm9200_ioremap_st(u32 addr)
|
||||
{
|
||||
|
|
|
@ -117,7 +117,7 @@ static struct i2c_board_info __initdata ek_i2c_devices[] = {
|
|||
};
|
||||
|
||||
#define EK_FLASH_BASE AT91_CHIPSELECT_0
|
||||
#define EK_FLASH_SIZE SZ_2M
|
||||
#define EK_FLASH_SIZE SZ_8M
|
||||
|
||||
static struct physmap_flash_data ek_flash_data = {
|
||||
.width = 2,
|
||||
|
|
|
@ -85,8 +85,6 @@ static struct resource dm9000_resource[] = {
|
|||
.flags = IORESOURCE_MEM
|
||||
},
|
||||
[2] = {
|
||||
.start = AT91_PIN_PC11,
|
||||
.end = AT91_PIN_PC11,
|
||||
.flags = IORESOURCE_IRQ
|
||||
| IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE,
|
||||
}
|
||||
|
@ -130,6 +128,8 @@ static struct sam9_smc_config __initdata dm9000_smc_config = {
|
|||
|
||||
static void __init ek_add_device_dm9000(void)
|
||||
{
|
||||
struct resource *r = &dm9000_resource[2];
|
||||
|
||||
/* Configure chip-select 2 (DM9000) */
|
||||
sam9_smc_configure(0, 2, &dm9000_smc_config);
|
||||
|
||||
|
@ -139,6 +139,7 @@ static void __init ek_add_device_dm9000(void)
|
|||
/* Configure Interrupt pin as input, no pull-up */
|
||||
at91_set_gpio_input(AT91_PIN_PC11, 0);
|
||||
|
||||
r->start = r->end = gpio_to_irq(AT91_PIN_PC11);
|
||||
platform_device_register(&dm9000_device);
|
||||
}
|
||||
#else
|
||||
|
|
|
@ -35,6 +35,7 @@
|
|||
#include "generic.h"
|
||||
|
||||
void __iomem *at91_pmc_base;
|
||||
EXPORT_SYMBOL_GPL(at91_pmc_base);
|
||||
|
||||
/*
|
||||
* There's a lot more which can be done with clocks, including cpufreq
|
||||
|
|
|
@ -25,7 +25,7 @@ extern void __iomem *at91_pmc_base;
|
|||
#define at91_pmc_write(field, value) \
|
||||
__raw_writel(value, at91_pmc_base + field)
|
||||
#else
|
||||
.extern at91_aic_base
|
||||
.extern at91_pmc_base
|
||||
#endif
|
||||
|
||||
#define AT91_PMC_SCER 0x00 /* System Clock Enable Register */
|
||||
|
|
|
@ -54,6 +54,7 @@ void __init at91_init_interrupts(unsigned int *priority)
|
|||
}
|
||||
|
||||
void __iomem *at91_ramc_base[2];
|
||||
EXPORT_SYMBOL_GPL(at91_ramc_base);
|
||||
|
||||
void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
|
||||
{
|
||||
|
@ -292,6 +293,7 @@ void __init at91_ioremap_rstc(u32 base_addr)
|
|||
}
|
||||
|
||||
void __iomem *at91_matrix_base;
|
||||
EXPORT_SYMBOL_GPL(at91_matrix_base);
|
||||
|
||||
void __init at91_ioremap_matrix(u32 base_addr)
|
||||
{
|
||||
|
|
|
@ -52,8 +52,8 @@
|
|||
#include <mach/csp/chipcHw_inline.h>
|
||||
#include <mach/csp/tmrHw_reg.h>
|
||||
|
||||
static AMBA_APB_DEVICE(uartA, "uarta", MM_ADDR_IO_UARTA, { IRQ_UARTA }, NULL);
|
||||
static AMBA_APB_DEVICE(uartB, "uartb", MM_ADDR_IO_UARTB, { IRQ_UARTB }, NULL);
|
||||
static AMBA_APB_DEVICE(uartA, "uartA", 0, MM_ADDR_IO_UARTA, {IRQ_UARTA}, NULL);
|
||||
static AMBA_APB_DEVICE(uartB, "uartB", 0, MM_ADDR_IO_UARTB, {IRQ_UARTB}, NULL);
|
||||
|
||||
static struct clk pll1_clk = {
|
||||
.name = "PLL1",
|
||||
|
|
|
@ -368,6 +368,7 @@ comment "Flattened Device Tree based board for EXYNOS SoCs"
|
|||
|
||||
config MACH_EXYNOS4_DT
|
||||
bool "Samsung Exynos4 Machine using device tree"
|
||||
depends on ARCH_EXYNOS4
|
||||
select CPU_EXYNOS4210
|
||||
select USE_OF
|
||||
select ARM_AMBA
|
||||
|
@ -380,6 +381,7 @@ config MACH_EXYNOS4_DT
|
|||
|
||||
config MACH_EXYNOS5_DT
|
||||
bool "SAMSUNG EXYNOS5 Machine using device tree"
|
||||
depends on ARCH_EXYNOS5
|
||||
select SOC_EXYNOS5250
|
||||
select USE_OF
|
||||
select ARM_AMBA
|
||||
|
|
|
@ -212,6 +212,8 @@
|
|||
#define IRQ_MFC EXYNOS4_IRQ_MFC
|
||||
#define IRQ_SDO EXYNOS4_IRQ_SDO
|
||||
|
||||
#define IRQ_I2S0 EXYNOS4_IRQ_I2S0
|
||||
|
||||
#define IRQ_ADC EXYNOS4_IRQ_ADC0
|
||||
#define IRQ_TC EXYNOS4_IRQ_PEN0
|
||||
|
||||
|
|
|
@ -89,6 +89,10 @@
|
|||
#define EXYNOS4_PA_MDMA1 0x12840000
|
||||
#define EXYNOS4_PA_PDMA0 0x12680000
|
||||
#define EXYNOS4_PA_PDMA1 0x12690000
|
||||
#define EXYNOS5_PA_MDMA0 0x10800000
|
||||
#define EXYNOS5_PA_MDMA1 0x11C10000
|
||||
#define EXYNOS5_PA_PDMA0 0x121A0000
|
||||
#define EXYNOS5_PA_PDMA1 0x121B0000
|
||||
|
||||
#define EXYNOS4_PA_SYSMMU_MDMA 0x10A40000
|
||||
#define EXYNOS4_PA_SYSMMU_SSS 0x10A50000
|
||||
|
|
|
@ -255,9 +255,15 @@
|
|||
|
||||
/* For EXYNOS5250 */
|
||||
|
||||
#define EXYNOS5_APLL_LOCK EXYNOS_CLKREG(0x00000)
|
||||
#define EXYNOS5_APLL_CON0 EXYNOS_CLKREG(0x00100)
|
||||
#define EXYNOS5_CLKSRC_CPU EXYNOS_CLKREG(0x00200)
|
||||
#define EXYNOS5_CLKMUX_STATCPU EXYNOS_CLKREG(0x00400)
|
||||
#define EXYNOS5_CLKDIV_CPU0 EXYNOS_CLKREG(0x00500)
|
||||
#define EXYNOS5_CLKDIV_CPU1 EXYNOS_CLKREG(0x00504)
|
||||
#define EXYNOS5_CLKDIV_STATCPU0 EXYNOS_CLKREG(0x00600)
|
||||
#define EXYNOS5_CLKDIV_STATCPU1 EXYNOS_CLKREG(0x00604)
|
||||
|
||||
#define EXYNOS5_MPLL_CON0 EXYNOS_CLKREG(0x04100)
|
||||
#define EXYNOS5_CLKSRC_CORE1 EXYNOS_CLKREG(0x04204)
|
||||
|
||||
|
|
|
@ -45,7 +45,7 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
|
|||
"exynos4210-uart.3", NULL),
|
||||
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
|
||||
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
|
||||
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.2", NULL),
|
||||
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
|
||||
{},
|
||||
};
|
||||
|
||||
|
|
|
@ -307,49 +307,7 @@ static struct i2c_board_info i2c1_devs[] __initdata = {
|
|||
};
|
||||
|
||||
/* TSP */
|
||||
static u8 mxt_init_vals[] = {
|
||||
/* MXT_GEN_COMMAND(6) */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
/* MXT_GEN_POWER(7) */
|
||||
0x20, 0xff, 0x32,
|
||||
/* MXT_GEN_ACQUIRE(8) */
|
||||
0x0a, 0x00, 0x05, 0x00, 0x00, 0x00, 0x09, 0x23,
|
||||
/* MXT_TOUCH_MULTI(9) */
|
||||
0x00, 0x00, 0x00, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x02, 0x00,
|
||||
0x00, 0x01, 0x01, 0x0e, 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00,
|
||||
/* MXT_TOUCH_KEYARRAY(15) */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
|
||||
0x00,
|
||||
/* MXT_SPT_GPIOPWM(19) */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
/* MXT_PROCI_GRIPFACE(20) */
|
||||
0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x28, 0x04,
|
||||
0x0f, 0x0a,
|
||||
/* MXT_PROCG_NOISE(22) */
|
||||
0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x23, 0x00,
|
||||
0x00, 0x05, 0x0f, 0x19, 0x23, 0x2d, 0x03,
|
||||
/* MXT_TOUCH_PROXIMITY(23) */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
/* MXT_PROCI_ONETOUCH(24) */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
/* MXT_SPT_SELFTEST(25) */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
/* MXT_PROCI_TWOTOUCH(27) */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
/* MXT_SPT_CTECONFIG(28) */
|
||||
0x00, 0x00, 0x02, 0x08, 0x10, 0x00,
|
||||
};
|
||||
|
||||
static struct mxt_platform_data mxt_platform_data = {
|
||||
.config = mxt_init_vals,
|
||||
.config_length = ARRAY_SIZE(mxt_init_vals),
|
||||
|
||||
.x_line = 18,
|
||||
.y_line = 11,
|
||||
.x_size = 1024,
|
||||
|
@ -571,7 +529,7 @@ static struct regulator_init_data __initdata max8997_ldo7_data = {
|
|||
|
||||
static struct regulator_init_data __initdata max8997_ldo8_data = {
|
||||
.constraints = {
|
||||
.name = "VUSB/VDAC_3.3V_C210",
|
||||
.name = "VUSB+VDAC_3.3V_C210",
|
||||
.min_uV = 3300000,
|
||||
.max_uV = 3300000,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
|
@ -1347,6 +1305,7 @@ static struct platform_device *nuri_devices[] __initdata = {
|
|||
|
||||
static void __init nuri_map_io(void)
|
||||
{
|
||||
clk_xusbxti.rate = 24000000;
|
||||
exynos_init_io(NULL, 0);
|
||||
s3c24xx_init_clocks(24000000);
|
||||
s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs));
|
||||
|
@ -1379,7 +1338,6 @@ static void __init nuri_machine_init(void)
|
|||
nuri_camera_init();
|
||||
|
||||
nuri_ehci_init();
|
||||
clk_xusbxti.rate = 24000000;
|
||||
|
||||
/* Last */
|
||||
platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices));
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
#include <asm/mach-types.h>
|
||||
|
||||
#include <plat/regs-serial.h>
|
||||
#include <plat/clock.h>
|
||||
#include <plat/cpu.h>
|
||||
#include <plat/devs.h>
|
||||
#include <plat/iic.h>
|
||||
|
@ -1057,6 +1058,7 @@ static struct platform_device *universal_devices[] __initdata = {
|
|||
|
||||
static void __init universal_map_io(void)
|
||||
{
|
||||
clk_xusbxti.rate = 24000000;
|
||||
exynos_init_io(NULL, 0);
|
||||
s3c24xx_init_clocks(24000000);
|
||||
s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
|
||||
|
|
|
@ -35,7 +35,7 @@ static const struct of_dev_auxdata imx27_auxdata_lookup[] __initconst = {
|
|||
static int __init imx27_avic_add_irq_domain(struct device_node *np,
|
||||
struct device_node *interrupt_parent)
|
||||
{
|
||||
irq_domain_add_simple(np, 0);
|
||||
irq_domain_add_legacy(np, 64, 0, 0, &irq_domain_simple_ops, NULL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -44,7 +44,9 @@ static int __init imx27_gpio_add_irq_domain(struct device_node *np,
|
|||
{
|
||||
static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
|
||||
|
||||
irq_domain_add_simple(np, gpio_irq_base);
|
||||
gpio_irq_base -= 32;
|
||||
irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops,
|
||||
NULL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -35,7 +35,7 @@ static void imx5_idle(void)
|
|||
}
|
||||
clk_enable(gpc_dvfs_clk);
|
||||
mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
|
||||
if (tzic_enable_wake() != 0)
|
||||
if (!tzic_enable_wake())
|
||||
cpu_do_idle();
|
||||
clk_disable(gpc_dvfs_clk);
|
||||
}
|
||||
|
|
|
@ -86,9 +86,6 @@ static void __init halibut_init(void)
|
|||
static void __init halibut_fixup(struct tag *tags, char **cmdline,
|
||||
struct meminfo *mi)
|
||||
{
|
||||
mi->nr_banks=1;
|
||||
mi->bank[0].start = PHYS_OFFSET;
|
||||
mi->bank[0].size = (101*1024*1024);
|
||||
}
|
||||
|
||||
static void __init halibut_map_io(void)
|
||||
|
|
|
@ -12,6 +12,7 @@
|
|||
|
||||
#include <asm/io.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/system_info.h>
|
||||
|
||||
#include <mach/msm_fb.h>
|
||||
#include <mach/vreg.h>
|
||||
|
|
|
@ -19,6 +19,7 @@
|
|||
#include <linux/platform_device.h>
|
||||
#include <linux/clkdev.h>
|
||||
|
||||
#include <asm/system_info.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
|
|
@ -121,7 +121,7 @@ int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2)
|
|||
* and unknown state. This function should be called early to
|
||||
* wait on the ARM9.
|
||||
*/
|
||||
void __init proc_comm_boot_wait(void)
|
||||
void __devinit proc_comm_boot_wait(void)
|
||||
{
|
||||
void __iomem *base = MSM_SHARED_RAM_BASE;
|
||||
|
||||
|
|
|
@ -27,6 +27,7 @@
|
|||
#include <linux/io.h>
|
||||
#include <linux/spinlock.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include <plat/mux.h>
|
||||
|
||||
|
|
|
@ -47,9 +47,9 @@ static int omap1_dm_timer_set_src(struct platform_device *pdev,
|
|||
int n = (pdev->id - 1) << 1;
|
||||
u32 l;
|
||||
|
||||
l = __raw_readl(MOD_CONF_CTRL_1) & ~(0x03 << n);
|
||||
l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n);
|
||||
l |= source << n;
|
||||
__raw_writel(l, MOD_CONF_CTRL_1);
|
||||
omap_writel(l, MOD_CONF_CTRL_1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -20,6 +20,7 @@
|
|||
#include <linux/usb/otg.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/i2c/twl.h>
|
||||
#include <linux/mfd/twl6040.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
#include <linux/regulator/fixed.h>
|
||||
|
@ -560,7 +561,7 @@ static struct regulator_init_data sdp4430_vusim = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct twl4030_codec_data twl6040_codec = {
|
||||
static struct twl6040_codec_data twl6040_codec = {
|
||||
/* single-step ramp for headset and handsfree */
|
||||
.hs_left_step = 0x0f,
|
||||
.hs_right_step = 0x0f,
|
||||
|
@ -568,7 +569,7 @@ static struct twl4030_codec_data twl6040_codec = {
|
|||
.hf_right_step = 0x1d,
|
||||
};
|
||||
|
||||
static struct twl4030_vibra_data twl6040_vibra = {
|
||||
static struct twl6040_vibra_data twl6040_vibra = {
|
||||
.vibldrv_res = 8,
|
||||
.vibrdrv_res = 3,
|
||||
.viblmotor_res = 10,
|
||||
|
@ -577,16 +578,14 @@ static struct twl4030_vibra_data twl6040_vibra = {
|
|||
.vddvibr_uV = 0, /* fixed volt supply - VBAT */
|
||||
};
|
||||
|
||||
static struct twl4030_audio_data twl6040_audio = {
|
||||
static struct twl6040_platform_data twl6040_data = {
|
||||
.codec = &twl6040_codec,
|
||||
.vibra = &twl6040_vibra,
|
||||
.audpwron_gpio = 127,
|
||||
.naudint_irq = OMAP44XX_IRQ_SYS_2N,
|
||||
.irq_base = TWL6040_CODEC_IRQ_BASE,
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data sdp4430_twldata = {
|
||||
.audio = &twl6040_audio,
|
||||
/* Regulators */
|
||||
.vusim = &sdp4430_vusim,
|
||||
.vaux1 = &sdp4430_vaux1,
|
||||
|
@ -617,7 +616,8 @@ static int __init omap4_i2c_init(void)
|
|||
TWL_COMMON_REGULATOR_VCXIO |
|
||||
TWL_COMMON_REGULATOR_VUSB |
|
||||
TWL_COMMON_REGULATOR_CLK32KG);
|
||||
omap4_pmic_init("twl6030", &sdp4430_twldata);
|
||||
omap4_pmic_init("twl6030", &sdp4430_twldata,
|
||||
&twl6040_data, OMAP44XX_IRQ_SYS_2N);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo,
|
||||
ARRAY_SIZE(sdp4430_i2c_3_boardinfo));
|
||||
|
|
|
@ -137,7 +137,7 @@ static struct twl4030_platform_data sdp4430_twldata = {
|
|||
|
||||
static void __init omap4_i2c_init(void)
|
||||
{
|
||||
omap4_pmic_init("twl6030", &sdp4430_twldata);
|
||||
omap4_pmic_init("twl6030", &sdp4430_twldata, NULL, 0);
|
||||
}
|
||||
|
||||
static void __init omap4_init(void)
|
||||
|
|
|
@ -25,6 +25,7 @@
|
|||
#include <linux/gpio.h>
|
||||
#include <linux/usb/otg.h>
|
||||
#include <linux/i2c/twl.h>
|
||||
#include <linux/mfd/twl6040.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
#include <linux/regulator/fixed.h>
|
||||
#include <linux/wl12xx.h>
|
||||
|
@ -284,7 +285,7 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static struct twl4030_codec_data twl6040_codec = {
|
||||
static struct twl6040_codec_data twl6040_codec = {
|
||||
/* single-step ramp for headset and handsfree */
|
||||
.hs_left_step = 0x0f,
|
||||
.hs_right_step = 0x0f,
|
||||
|
@ -292,17 +293,14 @@ static struct twl4030_codec_data twl6040_codec = {
|
|||
.hf_right_step = 0x1d,
|
||||
};
|
||||
|
||||
static struct twl4030_audio_data twl6040_audio = {
|
||||
static struct twl6040_platform_data twl6040_data = {
|
||||
.codec = &twl6040_codec,
|
||||
.audpwron_gpio = 127,
|
||||
.naudint_irq = OMAP44XX_IRQ_SYS_2N,
|
||||
.irq_base = TWL6040_CODEC_IRQ_BASE,
|
||||
};
|
||||
|
||||
/* Panda board uses the common PMIC configuration */
|
||||
static struct twl4030_platform_data omap4_panda_twldata = {
|
||||
.audio = &twl6040_audio,
|
||||
};
|
||||
static struct twl4030_platform_data omap4_panda_twldata;
|
||||
|
||||
/*
|
||||
* Display monitor features are burnt in their EEPROM as EDID data. The EEPROM
|
||||
|
@ -326,7 +324,8 @@ static int __init omap4_panda_i2c_init(void)
|
|||
TWL_COMMON_REGULATOR_VCXIO |
|
||||
TWL_COMMON_REGULATOR_VUSB |
|
||||
TWL_COMMON_REGULATOR_CLK32KG);
|
||||
omap4_pmic_init("twl6030", &omap4_panda_twldata);
|
||||
omap4_pmic_init("twl6030", &omap4_panda_twldata,
|
||||
&twl6040_data, OMAP44XX_IRQ_SYS_2N);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
/*
|
||||
* Bus 3 is attached to the DVI port where devices like the pico DLP
|
||||
|
|
|
@ -165,83 +165,3 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate)
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CPU_FREQ
|
||||
/*
|
||||
* Walk PRCM rate table and fillout cpufreq freq_table
|
||||
* XXX This should be replaced by an OPP layer in the near future
|
||||
*/
|
||||
static struct cpufreq_frequency_table *freq_table;
|
||||
|
||||
void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
|
||||
{
|
||||
const struct prcm_config *prcm;
|
||||
int i = 0;
|
||||
int tbl_sz = 0;
|
||||
|
||||
if (!cpu_is_omap24xx())
|
||||
return;
|
||||
|
||||
for (prcm = rate_table; prcm->mpu_speed; prcm++) {
|
||||
if (!(prcm->flags & cpu_mask))
|
||||
continue;
|
||||
if (prcm->xtal_speed != sclk->rate)
|
||||
continue;
|
||||
|
||||
/* don't put bypass rates in table */
|
||||
if (prcm->dpll_speed == prcm->xtal_speed)
|
||||
continue;
|
||||
|
||||
tbl_sz++;
|
||||
}
|
||||
|
||||
/*
|
||||
* XXX Ensure that we're doing what CPUFreq expects for this error
|
||||
* case and the following one
|
||||
*/
|
||||
if (tbl_sz == 0) {
|
||||
pr_warning("%s: no matching entries in rate_table\n",
|
||||
__func__);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Include the CPUFREQ_TABLE_END terminator entry */
|
||||
tbl_sz++;
|
||||
|
||||
freq_table = kzalloc(sizeof(struct cpufreq_frequency_table) * tbl_sz,
|
||||
GFP_ATOMIC);
|
||||
if (!freq_table) {
|
||||
pr_err("%s: could not kzalloc frequency table\n", __func__);
|
||||
return;
|
||||
}
|
||||
|
||||
for (prcm = rate_table; prcm->mpu_speed; prcm++) {
|
||||
if (!(prcm->flags & cpu_mask))
|
||||
continue;
|
||||
if (prcm->xtal_speed != sclk->rate)
|
||||
continue;
|
||||
|
||||
/* don't put bypass rates in table */
|
||||
if (prcm->dpll_speed == prcm->xtal_speed)
|
||||
continue;
|
||||
|
||||
freq_table[i].index = i;
|
||||
freq_table[i].frequency = prcm->mpu_speed / 1000;
|
||||
i++;
|
||||
}
|
||||
|
||||
freq_table[i].index = i;
|
||||
freq_table[i].frequency = CPUFREQ_TABLE_END;
|
||||
|
||||
*table = &freq_table[0];
|
||||
}
|
||||
|
||||
void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
|
||||
{
|
||||
if (!cpu_is_omap24xx())
|
||||
return;
|
||||
|
||||
kfree(freq_table);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
@ -536,10 +536,5 @@ struct clk_functions omap2_clk_functions = {
|
|||
.clk_set_rate = omap2_clk_set_rate,
|
||||
.clk_set_parent = omap2_clk_set_parent,
|
||||
.clk_disable_unused = omap2_clk_disable_unused,
|
||||
#ifdef CONFIG_CPU_FREQ
|
||||
/* These will be removed when the OPP code is integrated */
|
||||
.clk_init_cpufreq_table = omap2_clk_init_cpufreq_table,
|
||||
.clk_exit_cpufreq_table = omap2_clk_exit_cpufreq_table,
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
|
@ -146,14 +146,6 @@ extern const struct clksel_rate gpt_sys_rates[];
|
|||
extern const struct clksel_rate gfx_l3_rates[];
|
||||
extern const struct clksel_rate dsp_ick_rates[];
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_CPU_FREQ)
|
||||
extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
|
||||
extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
|
||||
#else
|
||||
#define omap2_clk_init_cpufreq_table 0
|
||||
#define omap2_clk_exit_cpufreq_table 0
|
||||
#endif
|
||||
|
||||
extern const struct clkops clkops_omap2_iclk_dflt_wait;
|
||||
extern const struct clkops clkops_omap2_iclk_dflt;
|
||||
extern const struct clkops clkops_omap2_iclk_idle_only;
|
||||
|
|
|
@ -1422,6 +1422,9 @@ static int _ocp_softreset(struct omap_hwmod *oh)
|
|||
goto dis_opt_clks;
|
||||
_write_sysconfig(v, oh);
|
||||
|
||||
if (oh->class->sysc->srst_udelay)
|
||||
udelay(oh->class->sysc->srst_udelay);
|
||||
|
||||
if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
|
||||
omap_test_timeout((omap_hwmod_read(oh,
|
||||
oh->class->sysc->syss_offs)
|
||||
|
@ -1903,10 +1906,20 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
|
|||
*/
|
||||
int omap_hwmod_softreset(struct omap_hwmod *oh)
|
||||
{
|
||||
if (!oh)
|
||||
u32 v;
|
||||
int ret;
|
||||
|
||||
if (!oh || !(oh->_sysc_cache))
|
||||
return -EINVAL;
|
||||
|
||||
return _ocp_softreset(oh);
|
||||
v = oh->_sysc_cache;
|
||||
ret = _set_softreset(oh, &v);
|
||||
if (ret)
|
||||
goto error;
|
||||
_write_sysconfig(v, oh);
|
||||
|
||||
error:
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -1000,7 +1000,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
|
|||
.flags = OMAP_FIREWALL_L4,
|
||||
}
|
||||
},
|
||||
.flags = OCPIF_SWSUP_IDLE,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
|
|
|
@ -1049,7 +1049,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
|
|||
.slave = &omap2430_dss_venc_hwmod,
|
||||
.clk = "dss_ick",
|
||||
.addr = omap2_dss_venc_addrs,
|
||||
.flags = OCPIF_SWSUP_IDLE,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
|
|
|
@ -1676,7 +1676,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
|
|||
.flags = OMAP_FIREWALL_L4,
|
||||
}
|
||||
},
|
||||
.flags = OCPIF_SWSUP_IDLE,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
|
|
|
@ -2594,6 +2594,15 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
|
|||
static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = {
|
||||
.rev_offs = 0x0000,
|
||||
.sysc_offs = 0x0010,
|
||||
/*
|
||||
* ISS needs 100 OCP clk cycles delay after a softreset before
|
||||
* accessing sysconfig again.
|
||||
* The lowest frequency at the moment for L3 bus is 100 MHz, so
|
||||
* 1usec delay is needed. Add an x2 margin to be safe (2 usecs).
|
||||
*
|
||||
* TODO: Indicate errata when available.
|
||||
*/
|
||||
.srst_udelay = 2,
|
||||
.sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS |
|
||||
SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
|
|
|
@ -108,8 +108,14 @@ static void omap_uart_set_noidle(struct platform_device *pdev)
|
|||
static void omap_uart_set_smartidle(struct platform_device *pdev)
|
||||
{
|
||||
struct omap_device *od = to_omap_device(pdev);
|
||||
u8 idlemode;
|
||||
|
||||
omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_SMART);
|
||||
if (od->hwmods[0]->class->sysc->idlemodes & SIDLE_SMART_WKUP)
|
||||
idlemode = HWMOD_IDLEMODE_SMART_WKUP;
|
||||
else
|
||||
idlemode = HWMOD_IDLEMODE_SMART;
|
||||
|
||||
omap_hwmod_set_slave_idlemode(od->hwmods[0], idlemode);
|
||||
}
|
||||
|
||||
#else
|
||||
|
@ -120,124 +126,8 @@ static void omap_uart_set_smartidle(struct platform_device *pdev) {}
|
|||
#endif /* CONFIG_PM */
|
||||
|
||||
#ifdef CONFIG_OMAP_MUX
|
||||
static struct omap_device_pad default_uart1_pads[] __initdata = {
|
||||
{
|
||||
.name = "uart1_cts.uart1_cts",
|
||||
.enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
|
||||
},
|
||||
{
|
||||
.name = "uart1_rts.uart1_rts",
|
||||
.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
|
||||
},
|
||||
{
|
||||
.name = "uart1_tx.uart1_tx",
|
||||
.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
|
||||
},
|
||||
{
|
||||
.name = "uart1_rx.uart1_rx",
|
||||
.flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
|
||||
.enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
|
||||
.idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
|
||||
},
|
||||
};
|
||||
|
||||
static struct omap_device_pad default_uart2_pads[] __initdata = {
|
||||
{
|
||||
.name = "uart2_cts.uart2_cts",
|
||||
.enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
|
||||
},
|
||||
{
|
||||
.name = "uart2_rts.uart2_rts",
|
||||
.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
|
||||
},
|
||||
{
|
||||
.name = "uart2_tx.uart2_tx",
|
||||
.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
|
||||
},
|
||||
{
|
||||
.name = "uart2_rx.uart2_rx",
|
||||
.flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
|
||||
.enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
|
||||
.idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
|
||||
},
|
||||
};
|
||||
|
||||
static struct omap_device_pad default_uart3_pads[] __initdata = {
|
||||
{
|
||||
.name = "uart3_cts_rctx.uart3_cts_rctx",
|
||||
.enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
|
||||
},
|
||||
{
|
||||
.name = "uart3_rts_sd.uart3_rts_sd",
|
||||
.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
|
||||
},
|
||||
{
|
||||
.name = "uart3_tx_irtx.uart3_tx_irtx",
|
||||
.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
|
||||
},
|
||||
{
|
||||
.name = "uart3_rx_irrx.uart3_rx_irrx",
|
||||
.flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
|
||||
.enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
|
||||
.idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
|
||||
},
|
||||
};
|
||||
|
||||
static struct omap_device_pad default_omap36xx_uart4_pads[] __initdata = {
|
||||
{
|
||||
.name = "gpmc_wait2.uart4_tx",
|
||||
.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
|
||||
},
|
||||
{
|
||||
.name = "gpmc_wait3.uart4_rx",
|
||||
.flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
|
||||
.enable = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
|
||||
.idle = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
|
||||
},
|
||||
};
|
||||
|
||||
static struct omap_device_pad default_omap4_uart4_pads[] __initdata = {
|
||||
{
|
||||
.name = "uart4_tx.uart4_tx",
|
||||
.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
|
||||
},
|
||||
{
|
||||
.name = "uart4_rx.uart4_rx",
|
||||
.flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
|
||||
.enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
|
||||
.idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
|
||||
},
|
||||
};
|
||||
|
||||
static void omap_serial_fill_default_pads(struct omap_board_data *bdata)
|
||||
{
|
||||
switch (bdata->id) {
|
||||
case 0:
|
||||
bdata->pads = default_uart1_pads;
|
||||
bdata->pads_cnt = ARRAY_SIZE(default_uart1_pads);
|
||||
break;
|
||||
case 1:
|
||||
bdata->pads = default_uart2_pads;
|
||||
bdata->pads_cnt = ARRAY_SIZE(default_uart2_pads);
|
||||
break;
|
||||
case 2:
|
||||
bdata->pads = default_uart3_pads;
|
||||
bdata->pads_cnt = ARRAY_SIZE(default_uart3_pads);
|
||||
break;
|
||||
case 3:
|
||||
if (cpu_is_omap44xx()) {
|
||||
bdata->pads = default_omap4_uart4_pads;
|
||||
bdata->pads_cnt =
|
||||
ARRAY_SIZE(default_omap4_uart4_pads);
|
||||
} else if (cpu_is_omap3630()) {
|
||||
bdata->pads = default_omap36xx_uart4_pads;
|
||||
bdata->pads_cnt =
|
||||
ARRAY_SIZE(default_omap36xx_uart4_pads);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
#else
|
||||
static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {}
|
||||
|
|
|
@ -37,6 +37,16 @@ static struct i2c_board_info __initdata pmic_i2c_board_info = {
|
|||
.flags = I2C_CLIENT_WAKE,
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata omap4_i2c1_board_info[] = {
|
||||
{
|
||||
.addr = 0x48,
|
||||
.flags = I2C_CLIENT_WAKE,
|
||||
},
|
||||
{
|
||||
I2C_BOARD_INFO("twl6040", 0x4b),
|
||||
},
|
||||
};
|
||||
|
||||
void __init omap_pmic_init(int bus, u32 clkrate,
|
||||
const char *pmic_type, int pmic_irq,
|
||||
struct twl4030_platform_data *pmic_data)
|
||||
|
@ -49,13 +59,30 @@ void __init omap_pmic_init(int bus, u32 clkrate,
|
|||
omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
|
||||
}
|
||||
|
||||
void __init omap4_pmic_init(const char *pmic_type,
|
||||
struct twl4030_platform_data *pmic_data,
|
||||
struct twl6040_platform_data *twl6040_data, int twl6040_irq)
|
||||
{
|
||||
/* PMIC part*/
|
||||
strncpy(omap4_i2c1_board_info[0].type, pmic_type,
|
||||
sizeof(omap4_i2c1_board_info[0].type));
|
||||
omap4_i2c1_board_info[0].irq = OMAP44XX_IRQ_SYS_1N;
|
||||
omap4_i2c1_board_info[0].platform_data = pmic_data;
|
||||
|
||||
/* TWL6040 audio IC part */
|
||||
omap4_i2c1_board_info[1].irq = twl6040_irq;
|
||||
omap4_i2c1_board_info[1].platform_data = twl6040_data;
|
||||
|
||||
omap_register_i2c_bus(1, 400, omap4_i2c1_board_info, 2);
|
||||
|
||||
}
|
||||
|
||||
void __init omap_pmic_late_init(void)
|
||||
{
|
||||
/* Init the OMAP TWL parameters (if PMIC has been registerd) */
|
||||
if (!pmic_i2c_board_info.irq)
|
||||
return;
|
||||
|
||||
if (pmic_i2c_board_info.irq)
|
||||
omap3_twl_init();
|
||||
if (omap4_i2c1_board_info[0].irq)
|
||||
omap4_twl_init();
|
||||
}
|
||||
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
|
||||
|
||||
struct twl4030_platform_data;
|
||||
struct twl6040_platform_data;
|
||||
|
||||
void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
|
||||
struct twl4030_platform_data *pmic_data);
|
||||
|
@ -46,12 +47,9 @@ static inline void omap3_pmic_init(const char *pmic_type,
|
|||
omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data);
|
||||
}
|
||||
|
||||
static inline void omap4_pmic_init(const char *pmic_type,
|
||||
struct twl4030_platform_data *pmic_data)
|
||||
{
|
||||
/* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */
|
||||
omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data);
|
||||
}
|
||||
void omap4_pmic_init(const char *pmic_type,
|
||||
struct twl4030_platform_data *pmic_data,
|
||||
struct twl6040_platform_data *audio_data, int twl6040_irq);
|
||||
|
||||
void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
|
||||
u32 pdata_flags, u32 regulators_flags);
|
||||
|
|
|
@ -33,8 +33,6 @@
|
|||
#include <mach/irqs.h>
|
||||
#include <mach/dma.h>
|
||||
|
||||
static u64 dma_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static u8 pdma0_peri[] = {
|
||||
DMACH_UART0_RX,
|
||||
DMACH_UART0_TX,
|
||||
|
|
|
@ -484,8 +484,8 @@ static struct wm8994_pdata wm8994_platform_data = {
|
|||
.gpio_defaults[8] = 0x0100,
|
||||
.gpio_defaults[9] = 0x0100,
|
||||
.gpio_defaults[10] = 0x0100,
|
||||
.ldo[0] = { S5PV210_MP03(6), NULL, &wm8994_ldo1_data }, /* XM0FRNB_2 */
|
||||
.ldo[1] = { 0, NULL, &wm8994_ldo2_data },
|
||||
.ldo[0] = { S5PV210_MP03(6), &wm8994_ldo1_data }, /* XM0FRNB_2 */
|
||||
.ldo[1] = { 0, &wm8994_ldo2_data },
|
||||
};
|
||||
|
||||
/* GPIO I2C PMIC */
|
||||
|
|
|
@ -674,8 +674,8 @@ static struct wm8994_pdata wm8994_platform_data = {
|
|||
.gpio_defaults[8] = 0x0100,
|
||||
.gpio_defaults[9] = 0x0100,
|
||||
.gpio_defaults[10] = 0x0100,
|
||||
.ldo[0] = { S5PV210_MP03(6), NULL, &wm8994_ldo1_data }, /* XM0FRNB_2 */
|
||||
.ldo[1] = { 0, NULL, &wm8994_ldo2_data },
|
||||
.ldo[0] = { S5PV210_MP03(6), &wm8994_ldo1_data }, /* XM0FRNB_2 */
|
||||
.ldo[1] = { 0, &wm8994_ldo2_data },
|
||||
};
|
||||
|
||||
/* GPIO I2C PMIC */
|
||||
|
|
|
@ -17,6 +17,7 @@ config UX500_SOC_DB5500
|
|||
config UX500_SOC_DB8500
|
||||
bool
|
||||
select MFD_DB8500_PRCMU
|
||||
select REGULATOR
|
||||
select REGULATOR_DB8500_PRCMU
|
||||
select CPU_FREQ_TABLE if CPU_FREQ
|
||||
|
||||
|
|
|
@ -99,7 +99,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
|
|||
*/
|
||||
write_pen_release(cpu_logical_map(cpu));
|
||||
|
||||
gic_raise_softirq(cpumask_of(cpu), 1);
|
||||
smp_send_reschedule(cpu);
|
||||
|
||||
timeout = jiffies + (1 * HZ);
|
||||
while (time_before(jiffies, timeout)) {
|
||||
|
|
|
@ -723,7 +723,7 @@ config CPU_HIGH_VECTOR
|
|||
bool "Select the High exception vector"
|
||||
help
|
||||
Say Y here to select high exception vector(0xFFFF0000~).
|
||||
The exception vector can be vary depending on the platform
|
||||
The exception vector can vary depending on the platform
|
||||
design in nommu mode. If your platform needs to select
|
||||
high exception vector, say Y.
|
||||
Otherwise or if you are unsure, say N, and the low exception
|
||||
|
|
|
@ -320,7 +320,7 @@ retry:
|
|||
*/
|
||||
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
|
||||
if (flags & FAULT_FLAG_ALLOW_RETRY) {
|
||||
if (!(fault & VM_FAULT_ERROR) && flags & FAULT_FLAG_ALLOW_RETRY) {
|
||||
if (fault & VM_FAULT_MAJOR) {
|
||||
tsk->maj_flt++;
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
#include <asm/sections.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/traps.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
#include "mm.h"
|
||||
|
@ -39,6 +40,7 @@ void __init sanity_check_meminfo(void)
|
|||
*/
|
||||
void __init paging_init(struct machine_desc *mdesc)
|
||||
{
|
||||
early_trap_init((void *)CONFIG_VECTORS_BASE);
|
||||
bootmem_init();
|
||||
}
|
||||
|
||||
|
|
|
@ -254,6 +254,18 @@ __v7_setup:
|
|||
ldr r6, =NMRR @ NMRR
|
||||
mcr p15, 0, r5, c10, c2, 0 @ write PRRR
|
||||
mcr p15, 0, r6, c10, c2, 1 @ write NMRR
|
||||
#endif
|
||||
#ifndef CONFIG_ARM_THUMBEE
|
||||
mrc p15, 0, r0, c0, c1, 0 @ read ID_PFR0 for ThumbEE
|
||||
and r0, r0, #(0xf << 12) @ ThumbEE enabled field
|
||||
teq r0, #(1 << 12) @ check if ThumbEE is present
|
||||
bne 1f
|
||||
mov r5, #0
|
||||
mcr p14, 6, r5, c1, c0, 0 @ Initialize TEEHBR to 0
|
||||
mrc p14, 6, r0, c0, c0, 0 @ load TEECR
|
||||
orr r0, r0, #1 @ set the 1st bit in order to
|
||||
mcr p14, 6, r0, c0, c0, 0 @ stop userspace TEEHBR access
|
||||
1:
|
||||
#endif
|
||||
adr r5, v7_crval
|
||||
ldmia r5, {r5, r6}
|
||||
|
|
|
@ -398,32 +398,6 @@ struct clk dummy_ck = {
|
|||
.ops = &clkops_null,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_CPU_FREQ
|
||||
void clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
if (!arch_clock || !arch_clock->clk_init_cpufreq_table)
|
||||
return;
|
||||
|
||||
spin_lock_irqsave(&clockfw_lock, flags);
|
||||
arch_clock->clk_init_cpufreq_table(table);
|
||||
spin_unlock_irqrestore(&clockfw_lock, flags);
|
||||
}
|
||||
|
||||
void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
if (!arch_clock || !arch_clock->clk_exit_cpufreq_table)
|
||||
return;
|
||||
|
||||
spin_lock_irqsave(&clockfw_lock, flags);
|
||||
arch_clock->clk_exit_cpufreq_table(table);
|
||||
spin_unlock_irqrestore(&clockfw_lock, flags);
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
*
|
||||
*/
|
||||
|
|
|
@ -272,8 +272,6 @@ struct clk {
|
|||
#endif
|
||||
};
|
||||
|
||||
struct cpufreq_frequency_table;
|
||||
|
||||
struct clk_functions {
|
||||
int (*clk_enable)(struct clk *clk);
|
||||
void (*clk_disable)(struct clk *clk);
|
||||
|
@ -283,10 +281,6 @@ struct clk_functions {
|
|||
void (*clk_allow_idle)(struct clk *clk);
|
||||
void (*clk_deny_idle)(struct clk *clk);
|
||||
void (*clk_disable_unused)(struct clk *clk);
|
||||
#ifdef CONFIG_CPU_FREQ
|
||||
void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **);
|
||||
void (*clk_exit_cpufreq_table)(struct cpufreq_frequency_table **);
|
||||
#endif
|
||||
};
|
||||
|
||||
extern int mpurate;
|
||||
|
@ -301,10 +295,6 @@ extern void recalculate_root_clocks(void);
|
|||
extern unsigned long followparent_recalc(struct clk *clk);
|
||||
extern void clk_enable_init_clocks(void);
|
||||
unsigned long omap_fixed_divisor_recalc(struct clk *clk);
|
||||
#ifdef CONFIG_CPU_FREQ
|
||||
extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
|
||||
extern void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
|
||||
#endif
|
||||
extern struct clk *omap_clk_get_by_name(const char *name);
|
||||
extern int omap_clk_enable_autoidle_all(void);
|
||||
extern int omap_clk_disable_autoidle_all(void);
|
||||
|
|
|
@ -305,6 +305,7 @@ struct omap_hwmod_sysc_fields {
|
|||
* @rev_offs: IP block revision register offset (from module base addr)
|
||||
* @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
|
||||
* @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
|
||||
* @srst_udelay: Delay needed after doing a softreset in usecs
|
||||
* @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
|
||||
* @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
|
||||
* @clockact: the default value of the module CLOCKACTIVITY bits
|
||||
|
@ -330,9 +331,10 @@ struct omap_hwmod_class_sysconfig {
|
|||
u16 sysc_offs;
|
||||
u16 syss_offs;
|
||||
u16 sysc_flags;
|
||||
struct omap_hwmod_sysc_fields *sysc_fields;
|
||||
u8 srst_udelay;
|
||||
u8 idlemodes;
|
||||
u8 clockact;
|
||||
struct omap_hwmod_sysc_fields *sysc_fields;
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
|
@ -348,7 +348,6 @@ u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc,
|
|||
sdrc_actim_ctrl_b_1, sdrc_mr_1);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
void omap3_sram_restore_context(void)
|
||||
{
|
||||
omap_sram_ceil = omap_sram_base + omap_sram_size;
|
||||
|
@ -358,17 +357,18 @@ void omap3_sram_restore_context(void)
|
|||
omap3_sram_configure_core_dpll_sz);
|
||||
omap_push_sram_idle();
|
||||
}
|
||||
#endif /* CONFIG_PM */
|
||||
|
||||
#endif /* CONFIG_ARCH_OMAP3 */
|
||||
|
||||
static inline int omap34xx_sram_init(void)
|
||||
{
|
||||
#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
|
||||
omap3_sram_restore_context();
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
static inline int omap34xx_sram_init(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif /* CONFIG_ARCH_OMAP3 */
|
||||
|
||||
static inline int am33xx_sram_init(void)
|
||||
{
|
||||
|
|
|
@ -302,6 +302,7 @@ comment "Power management"
|
|||
config SAMSUNG_PM_DEBUG
|
||||
bool "S3C2410 PM Suspend debug"
|
||||
depends on PM
|
||||
select DEBUG_LL
|
||||
help
|
||||
Say Y here if you want verbose debugging from the PM Suspend and
|
||||
Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
|
||||
|
|
|
@ -42,10 +42,6 @@
|
|||
/* This number is used when no interrupt has been assigned */
|
||||
#define NO_IRQ 0
|
||||
|
||||
struct irq_data;
|
||||
extern irq_hw_number_t irqd_to_hwirq(struct irq_data *d);
|
||||
extern irq_hw_number_t virq_to_hw(unsigned int virq);
|
||||
|
||||
extern void __init init_pic_c64xplus(void);
|
||||
|
||||
extern void init_IRQ(void);
|
||||
|
|
|
@ -130,16 +130,3 @@ int arch_show_interrupts(struct seq_file *p, int prec)
|
|||
seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
|
||||
return 0;
|
||||
}
|
||||
|
||||
irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
|
||||
{
|
||||
return d->hwirq;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(irqd_to_hwirq);
|
||||
|
||||
irq_hw_number_t virq_to_hw(unsigned int virq)
|
||||
{
|
||||
struct irq_data *irq_data = irq_get_irq_data(virq);
|
||||
return WARN_ON(!irq_data) ? 0 : irq_data->hwirq;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(virq_to_hw);
|
||||
|
|
|
@ -1 +1,147 @@
|
|||
#include <asm/intrinsics.h>
|
||||
#ifndef _ASM_IA64_CMPXCHG_H
|
||||
#define _ASM_IA64_CMPXCHG_H
|
||||
|
||||
/*
|
||||
* Compare/Exchange, forked from asm/intrinsics.h
|
||||
* which was:
|
||||
*
|
||||
* Copyright (C) 2002-2003 Hewlett-Packard Co
|
||||
* David Mosberger-Tang <davidm@hpl.hp.com>
|
||||
*/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <linux/types.h>
|
||||
/* include compiler specific intrinsics */
|
||||
#include <asm/ia64regs.h>
|
||||
#ifdef __INTEL_COMPILER
|
||||
# include <asm/intel_intrin.h>
|
||||
#else
|
||||
# include <asm/gcc_intrin.h>
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This function doesn't exist, so you'll get a linker error if
|
||||
* something tries to do an invalid xchg().
|
||||
*/
|
||||
extern void ia64_xchg_called_with_bad_pointer(void);
|
||||
|
||||
#define __xchg(x, ptr, size) \
|
||||
({ \
|
||||
unsigned long __xchg_result; \
|
||||
\
|
||||
switch (size) { \
|
||||
case 1: \
|
||||
__xchg_result = ia64_xchg1((__u8 *)ptr, x); \
|
||||
break; \
|
||||
\
|
||||
case 2: \
|
||||
__xchg_result = ia64_xchg2((__u16 *)ptr, x); \
|
||||
break; \
|
||||
\
|
||||
case 4: \
|
||||
__xchg_result = ia64_xchg4((__u32 *)ptr, x); \
|
||||
break; \
|
||||
\
|
||||
case 8: \
|
||||
__xchg_result = ia64_xchg8((__u64 *)ptr, x); \
|
||||
break; \
|
||||
default: \
|
||||
ia64_xchg_called_with_bad_pointer(); \
|
||||
} \
|
||||
__xchg_result; \
|
||||
})
|
||||
|
||||
#define xchg(ptr, x) \
|
||||
((__typeof__(*(ptr))) __xchg((unsigned long) (x), (ptr), sizeof(*(ptr))))
|
||||
|
||||
/*
|
||||
* Atomic compare and exchange. Compare OLD with MEM, if identical,
|
||||
* store NEW in MEM. Return the initial value in MEM. Success is
|
||||
* indicated by comparing RETURN with OLD.
|
||||
*/
|
||||
|
||||
#define __HAVE_ARCH_CMPXCHG 1
|
||||
|
||||
/*
|
||||
* This function doesn't exist, so you'll get a linker error
|
||||
* if something tries to do an invalid cmpxchg().
|
||||
*/
|
||||
extern long ia64_cmpxchg_called_with_bad_pointer(void);
|
||||
|
||||
#define ia64_cmpxchg(sem, ptr, old, new, size) \
|
||||
({ \
|
||||
__u64 _o_, _r_; \
|
||||
\
|
||||
switch (size) { \
|
||||
case 1: \
|
||||
_o_ = (__u8) (long) (old); \
|
||||
break; \
|
||||
case 2: \
|
||||
_o_ = (__u16) (long) (old); \
|
||||
break; \
|
||||
case 4: \
|
||||
_o_ = (__u32) (long) (old); \
|
||||
break; \
|
||||
case 8: \
|
||||
_o_ = (__u64) (long) (old); \
|
||||
break; \
|
||||
default: \
|
||||
break; \
|
||||
} \
|
||||
switch (size) { \
|
||||
case 1: \
|
||||
_r_ = ia64_cmpxchg1_##sem((__u8 *) ptr, new, _o_); \
|
||||
break; \
|
||||
\
|
||||
case 2: \
|
||||
_r_ = ia64_cmpxchg2_##sem((__u16 *) ptr, new, _o_); \
|
||||
break; \
|
||||
\
|
||||
case 4: \
|
||||
_r_ = ia64_cmpxchg4_##sem((__u32 *) ptr, new, _o_); \
|
||||
break; \
|
||||
\
|
||||
case 8: \
|
||||
_r_ = ia64_cmpxchg8_##sem((__u64 *) ptr, new, _o_); \
|
||||
break; \
|
||||
\
|
||||
default: \
|
||||
_r_ = ia64_cmpxchg_called_with_bad_pointer(); \
|
||||
break; \
|
||||
} \
|
||||
(__typeof__(old)) _r_; \
|
||||
})
|
||||
|
||||
#define cmpxchg_acq(ptr, o, n) \
|
||||
ia64_cmpxchg(acq, (ptr), (o), (n), sizeof(*(ptr)))
|
||||
#define cmpxchg_rel(ptr, o, n) \
|
||||
ia64_cmpxchg(rel, (ptr), (o), (n), sizeof(*(ptr)))
|
||||
|
||||
/* for compatibility with other platforms: */
|
||||
#define cmpxchg(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
|
||||
#define cmpxchg64(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
|
||||
|
||||
#define cmpxchg_local cmpxchg
|
||||
#define cmpxchg64_local cmpxchg64
|
||||
|
||||
#ifdef CONFIG_IA64_DEBUG_CMPXCHG
|
||||
# define CMPXCHG_BUGCHECK_DECL int _cmpxchg_bugcheck_count = 128;
|
||||
# define CMPXCHG_BUGCHECK(v) \
|
||||
do { \
|
||||
if (_cmpxchg_bugcheck_count-- <= 0) { \
|
||||
void *ip; \
|
||||
extern int printk(const char *fmt, ...); \
|
||||
ip = (void *) ia64_getreg(_IA64_REG_IP); \
|
||||
printk("CMPXCHG_BUGCHECK: stuck at %p on word %p\n", ip, (v));\
|
||||
break; \
|
||||
} \
|
||||
} while (0)
|
||||
#else /* !CONFIG_IA64_DEBUG_CMPXCHG */
|
||||
# define CMPXCHG_BUGCHECK_DECL
|
||||
# define CMPXCHG_BUGCHECK(v)
|
||||
#endif /* !CONFIG_IA64_DEBUG_CMPXCHG */
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
#endif /* _ASM_IA64_CMPXCHG_H */
|
||||
|
|
|
@ -106,15 +106,16 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
|
|||
return -EFAULT;
|
||||
|
||||
{
|
||||
register unsigned long r8 __asm ("r8") = 0;
|
||||
register unsigned long r8 __asm ("r8");
|
||||
unsigned long prev;
|
||||
__asm__ __volatile__(
|
||||
" mf;; \n"
|
||||
" mov ar.ccv=%3;; \n"
|
||||
"[1:] cmpxchg4.acq %0=[%1],%2,ar.ccv \n"
|
||||
" mov %0=r0 \n"
|
||||
" mov ar.ccv=%4;; \n"
|
||||
"[1:] cmpxchg4.acq %1=[%2],%3,ar.ccv \n"
|
||||
" .xdata4 \"__ex_table\", 1b-., 2f-. \n"
|
||||
"[2:]"
|
||||
: "=r" (prev)
|
||||
: "=r" (r8), "=r" (prev)
|
||||
: "r" (uaddr), "r" (newval),
|
||||
"rO" ((long) (unsigned) oldval)
|
||||
: "memory");
|
||||
|
|
|
@ -18,6 +18,7 @@
|
|||
#else
|
||||
# include <asm/gcc_intrin.h>
|
||||
#endif
|
||||
#include <asm/cmpxchg.h>
|
||||
|
||||
#define ia64_native_get_psr_i() (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I)
|
||||
|
||||
|
@ -81,119 +82,6 @@ extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
|
|||
|
||||
#define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, rel) + (i)) /* return new value */
|
||||
|
||||
/*
|
||||
* This function doesn't exist, so you'll get a linker error if
|
||||
* something tries to do an invalid xchg().
|
||||
*/
|
||||
extern void ia64_xchg_called_with_bad_pointer (void);
|
||||
|
||||
#define __xchg(x,ptr,size) \
|
||||
({ \
|
||||
unsigned long __xchg_result; \
|
||||
\
|
||||
switch (size) { \
|
||||
case 1: \
|
||||
__xchg_result = ia64_xchg1((__u8 *)ptr, x); \
|
||||
break; \
|
||||
\
|
||||
case 2: \
|
||||
__xchg_result = ia64_xchg2((__u16 *)ptr, x); \
|
||||
break; \
|
||||
\
|
||||
case 4: \
|
||||
__xchg_result = ia64_xchg4((__u32 *)ptr, x); \
|
||||
break; \
|
||||
\
|
||||
case 8: \
|
||||
__xchg_result = ia64_xchg8((__u64 *)ptr, x); \
|
||||
break; \
|
||||
default: \
|
||||
ia64_xchg_called_with_bad_pointer(); \
|
||||
} \
|
||||
__xchg_result; \
|
||||
})
|
||||
|
||||
#define xchg(ptr,x) \
|
||||
((__typeof__(*(ptr))) __xchg ((unsigned long) (x), (ptr), sizeof(*(ptr))))
|
||||
|
||||
/*
|
||||
* Atomic compare and exchange. Compare OLD with MEM, if identical,
|
||||
* store NEW in MEM. Return the initial value in MEM. Success is
|
||||
* indicated by comparing RETURN with OLD.
|
||||
*/
|
||||
|
||||
#define __HAVE_ARCH_CMPXCHG 1
|
||||
|
||||
/*
|
||||
* This function doesn't exist, so you'll get a linker error
|
||||
* if something tries to do an invalid cmpxchg().
|
||||
*/
|
||||
extern long ia64_cmpxchg_called_with_bad_pointer (void);
|
||||
|
||||
#define ia64_cmpxchg(sem,ptr,old,new,size) \
|
||||
({ \
|
||||
__u64 _o_, _r_; \
|
||||
\
|
||||
switch (size) { \
|
||||
case 1: _o_ = (__u8 ) (long) (old); break; \
|
||||
case 2: _o_ = (__u16) (long) (old); break; \
|
||||
case 4: _o_ = (__u32) (long) (old); break; \
|
||||
case 8: _o_ = (__u64) (long) (old); break; \
|
||||
default: break; \
|
||||
} \
|
||||
switch (size) { \
|
||||
case 1: \
|
||||
_r_ = ia64_cmpxchg1_##sem((__u8 *) ptr, new, _o_); \
|
||||
break; \
|
||||
\
|
||||
case 2: \
|
||||
_r_ = ia64_cmpxchg2_##sem((__u16 *) ptr, new, _o_); \
|
||||
break; \
|
||||
\
|
||||
case 4: \
|
||||
_r_ = ia64_cmpxchg4_##sem((__u32 *) ptr, new, _o_); \
|
||||
break; \
|
||||
\
|
||||
case 8: \
|
||||
_r_ = ia64_cmpxchg8_##sem((__u64 *) ptr, new, _o_); \
|
||||
break; \
|
||||
\
|
||||
default: \
|
||||
_r_ = ia64_cmpxchg_called_with_bad_pointer(); \
|
||||
break; \
|
||||
} \
|
||||
(__typeof__(old)) _r_; \
|
||||
})
|
||||
|
||||
#define cmpxchg_acq(ptr, o, n) \
|
||||
ia64_cmpxchg(acq, (ptr), (o), (n), sizeof(*(ptr)))
|
||||
#define cmpxchg_rel(ptr, o, n) \
|
||||
ia64_cmpxchg(rel, (ptr), (o), (n), sizeof(*(ptr)))
|
||||
|
||||
/* for compatibility with other platforms: */
|
||||
#define cmpxchg(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
|
||||
#define cmpxchg64(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
|
||||
|
||||
#define cmpxchg_local cmpxchg
|
||||
#define cmpxchg64_local cmpxchg64
|
||||
|
||||
#ifdef CONFIG_IA64_DEBUG_CMPXCHG
|
||||
# define CMPXCHG_BUGCHECK_DECL int _cmpxchg_bugcheck_count = 128;
|
||||
# define CMPXCHG_BUGCHECK(v) \
|
||||
do { \
|
||||
if (_cmpxchg_bugcheck_count-- <= 0) { \
|
||||
void *ip; \
|
||||
extern int printk(const char *fmt, ...); \
|
||||
ip = (void *) ia64_getreg(_IA64_REG_IP); \
|
||||
printk("CMPXCHG_BUGCHECK: stuck at %p on word %p\n", ip, (v)); \
|
||||
break; \
|
||||
} \
|
||||
} while (0)
|
||||
#else /* !CONFIG_IA64_DEBUG_CMPXCHG */
|
||||
# define CMPXCHG_BUGCHECK_DECL
|
||||
# define CMPXCHG_BUGCHECK(v)
|
||||
#endif /* !CONFIG_IA64_DEBUG_CMPXCHG */
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
|
|
@ -604,12 +604,6 @@ pfm_unprotect_ctx_ctxsw(pfm_context_t *x, unsigned long f)
|
|||
spin_unlock(&(x)->ctx_lock);
|
||||
}
|
||||
|
||||
static inline unsigned int
|
||||
pfm_do_munmap(struct mm_struct *mm, unsigned long addr, size_t len, int acct)
|
||||
{
|
||||
return do_munmap(mm, addr, len);
|
||||
}
|
||||
|
||||
static inline unsigned long
|
||||
pfm_get_unmapped_area(struct file *file, unsigned long addr, unsigned long len, unsigned long pgoff, unsigned long flags, unsigned long exec)
|
||||
{
|
||||
|
@ -1458,8 +1452,9 @@ pfm_unreserve_session(pfm_context_t *ctx, int is_syswide, unsigned int cpu)
|
|||
* a PROTECT_CTX() section.
|
||||
*/
|
||||
static int
|
||||
pfm_remove_smpl_mapping(struct task_struct *task, void *vaddr, unsigned long size)
|
||||
pfm_remove_smpl_mapping(void *vaddr, unsigned long size)
|
||||
{
|
||||
struct task_struct *task = current;
|
||||
int r;
|
||||
|
||||
/* sanity checks */
|
||||
|
@ -1473,13 +1468,8 @@ pfm_remove_smpl_mapping(struct task_struct *task, void *vaddr, unsigned long siz
|
|||
/*
|
||||
* does the actual unmapping
|
||||
*/
|
||||
down_write(&task->mm->mmap_sem);
|
||||
r = vm_munmap((unsigned long)vaddr, size);
|
||||
|
||||
DPRINT(("down_write done smpl_vaddr=%p size=%lu\n", vaddr, size));
|
||||
|
||||
r = pfm_do_munmap(task->mm, (unsigned long)vaddr, size, 0);
|
||||
|
||||
up_write(&task->mm->mmap_sem);
|
||||
if (r !=0) {
|
||||
printk(KERN_ERR "perfmon: [%d] unable to unmap sampling buffer @%p size=%lu\n", task_pid_nr(task), vaddr, size);
|
||||
}
|
||||
|
@ -1945,7 +1935,7 @@ pfm_flush(struct file *filp, fl_owner_t id)
|
|||
* because some VM function reenables interrupts.
|
||||
*
|
||||
*/
|
||||
if (smpl_buf_vaddr) pfm_remove_smpl_mapping(current, smpl_buf_vaddr, smpl_buf_size);
|
||||
if (smpl_buf_vaddr) pfm_remove_smpl_mapping(smpl_buf_vaddr, smpl_buf_size);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -49,7 +49,6 @@ CONFIG_BLK_DEV_RAM=y
|
|||
CONFIG_NETDEVICES=y
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_FEC=y
|
||||
CONFIG_FEC2=y
|
||||
# CONFIG_NETDEV_1000 is not set
|
||||
# CONFIG_NETDEV_10000 is not set
|
||||
CONFIG_PPP=y
|
||||
|
|
|
@ -74,9 +74,7 @@ static void __init m527x_fec_init(void)
|
|||
writew(par | 0xf00, MCF_IPSBAR + 0x100082);
|
||||
v = readb(MCF_IPSBAR + 0x100078);
|
||||
writeb(v | 0xc0, MCF_IPSBAR + 0x100078);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_FEC2
|
||||
/* Set multi-function pins to ethernet mode for fec1 */
|
||||
par = readw(MCF_IPSBAR + 0x100082);
|
||||
writew(par | 0xa0, MCF_IPSBAR + 0x100082);
|
||||
|
|
|
@ -3,9 +3,3 @@
|
|||
#
|
||||
|
||||
obj-y := config.o
|
||||
|
||||
extra-y := bootlogo.rh
|
||||
|
||||
$(obj)/bootlogo.rh: $(src)/bootlogo.h
|
||||
perl $(src)/../68328/bootlogo.pl < $(src)/bootlogo.h \
|
||||
> $(obj)/bootlogo.rh
|
||||
|
|
|
@ -3,14 +3,9 @@
|
|||
#
|
||||
|
||||
obj-y := config.o
|
||||
logo-$(UCDIMM) := bootlogo.rh
|
||||
logo-$(DRAGEN2) := screen.h
|
||||
extra-y := $(logo-y)
|
||||
|
||||
$(obj)/bootlogo.rh: $(src)/../68EZ328/bootlogo.h
|
||||
perl $(src)/bootlogo.pl < $(src)/../68328/bootlogo.h > $(obj)/bootlogo.rh
|
||||
extra-$(DRAGEN2):= screen.h
|
||||
|
||||
$(obj)/screen.h: $(src)/screen.xbm $(src)/xbm2lcd.pl
|
||||
perl $(src)/xbm2lcd.pl < $(src)/screen.xbm > $(obj)/screen.h
|
||||
|
||||
clean-files := $(obj)/screen.h $(obj)/bootlogo.rh
|
||||
clean-files := $(obj)/screen.h
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
#define splash_width 640
|
||||
#define splash_height 480
|
||||
static unsigned char splash_bits[] = {
|
||||
unsigned char __attribute__ ((aligned(16))) bootlogo_bits[] = {
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
@ -114,7 +114,7 @@ static struct resource mcf_fec1_resources[] = {
|
|||
|
||||
static struct platform_device mcf_fec1 = {
|
||||
.name = "fec",
|
||||
.id = 0,
|
||||
.id = 1,
|
||||
.num_resources = ARRAY_SIZE(mcf_fec1_resources),
|
||||
.resource = mcf_fec1_resources,
|
||||
};
|
||||
|
|
|
@ -1325,7 +1325,7 @@ static int mipsxx_pmu_handle_shared_irq(void)
|
|||
|
||||
regs = get_irq_regs();
|
||||
|
||||
perf_sample_data_init(&data, 0);
|
||||
perf_sample_data_init(&data, 0, 0);
|
||||
|
||||
switch (counters) {
|
||||
#define HANDLE_COUNTER(n) \
|
||||
|
|
|
@ -32,7 +32,7 @@ CONFIG_RD_LZMA=y
|
|||
CONFIG_INITRAMFS_COMPRESSION_GZIP=y
|
||||
CONFIG_KALLSYMS_ALL=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_PERF_COUNTERS=y
|
||||
CONFIG_PERF_EVENTS=y
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_OPROFILE=y
|
||||
CONFIG_KPROBES=y
|
||||
|
|
|
@ -8,7 +8,7 @@ CONFIG_BLK_DEV_INITRD=y
|
|||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||
CONFIG_EXPERT=y
|
||||
# CONFIG_ELF_CORE is not set
|
||||
CONFIG_PERF_COUNTERS=y
|
||||
CONFIG_PERF_EVENTS=y
|
||||
# CONFIG_VM_EVENT_COUNTERS is not set
|
||||
CONFIG_SLAB=y
|
||||
CONFIG_MODULES=y
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show More
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Reference in New Issue