mei: rename interface to hw-me
Rename hw-me.h to hw-me-regs.h as this file contains only register definitions. Files hw-me.[ch] now contains ME hw dependant functionality Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Tomas Winkler
Greg Kroah-Hartman
parent
37e7d6e74f
commit
9dc64d6a26
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@ -6,7 +6,7 @@ obj-$(CONFIG_INTEL_MEI) += mei.o
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mei-objs := init.o
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mei-objs += hbm.o
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mei-objs += interrupt.o
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mei-objs += interface.o
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mei-objs += hw-me.o
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mei-objs += main.o
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mei-objs += amthif.o
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mei-objs += wd.o
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@ -35,7 +35,7 @@
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#include "mei_dev.h"
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#include "hbm.h"
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#include "interface.h"
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#include "hw-me.h"
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#include "client.h"
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const uuid_le mei_amthi_guid = UUID_LE(0x12f80028, 0xb4b7, 0x4b2d, 0xac,
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@ -23,7 +23,6 @@
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#include "mei_dev.h"
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#include "hbm.h"
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#include "interface.h"
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#include "client.h"
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/**
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@ -21,7 +21,7 @@
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#include "mei_dev.h"
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#include "hbm.h"
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#include "interface.h"
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#include "hw-me.h"
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/**
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* mei_hbm_cl_hdr - construct client hbm header
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@ -0,0 +1,167 @@
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/******************************************************************************
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* Intel Management Engine Interface (Intel MEI) Linux driver
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* Intel MEI Interface Header
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2003 - 2012 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
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* USA
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*
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* The full GNU General Public License is included in this distribution
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* in the file called LICENSE.GPL.
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*
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* Contact Information:
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* Intel Corporation.
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* linux-mei@linux.intel.com
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* http://www.intel.com
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*
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* BSD LICENSE
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*
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* Copyright(c) 2003 - 2012 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*****************************************************************************/
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#ifndef _MEI_HW_MEI_REGS_H_
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#define _MEI_HW_MEI_REGS_H_
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/*
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* MEI device IDs
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*/
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#define MEI_DEV_ID_82946GZ 0x2974 /* 82946GZ/GL */
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#define MEI_DEV_ID_82G35 0x2984 /* 82G35 Express */
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#define MEI_DEV_ID_82Q965 0x2994 /* 82Q963/Q965 */
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#define MEI_DEV_ID_82G965 0x29A4 /* 82P965/G965 */
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#define MEI_DEV_ID_82GM965 0x2A04 /* Mobile PM965/GM965 */
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#define MEI_DEV_ID_82GME965 0x2A14 /* Mobile GME965/GLE960 */
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#define MEI_DEV_ID_ICH9_82Q35 0x29B4 /* 82Q35 Express */
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#define MEI_DEV_ID_ICH9_82G33 0x29C4 /* 82G33/G31/P35/P31 Express */
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#define MEI_DEV_ID_ICH9_82Q33 0x29D4 /* 82Q33 Express */
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#define MEI_DEV_ID_ICH9_82X38 0x29E4 /* 82X38/X48 Express */
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#define MEI_DEV_ID_ICH9_3200 0x29F4 /* 3200/3210 Server */
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#define MEI_DEV_ID_ICH9_6 0x28B4 /* Bearlake */
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#define MEI_DEV_ID_ICH9_7 0x28C4 /* Bearlake */
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#define MEI_DEV_ID_ICH9_8 0x28D4 /* Bearlake */
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#define MEI_DEV_ID_ICH9_9 0x28E4 /* Bearlake */
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#define MEI_DEV_ID_ICH9_10 0x28F4 /* Bearlake */
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#define MEI_DEV_ID_ICH9M_1 0x2A44 /* Cantiga */
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#define MEI_DEV_ID_ICH9M_2 0x2A54 /* Cantiga */
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#define MEI_DEV_ID_ICH9M_3 0x2A64 /* Cantiga */
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#define MEI_DEV_ID_ICH9M_4 0x2A74 /* Cantiga */
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#define MEI_DEV_ID_ICH10_1 0x2E04 /* Eaglelake */
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#define MEI_DEV_ID_ICH10_2 0x2E14 /* Eaglelake */
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#define MEI_DEV_ID_ICH10_3 0x2E24 /* Eaglelake */
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#define MEI_DEV_ID_ICH10_4 0x2E34 /* Eaglelake */
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#define MEI_DEV_ID_IBXPK_1 0x3B64 /* Calpella */
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#define MEI_DEV_ID_IBXPK_2 0x3B65 /* Calpella */
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#define MEI_DEV_ID_CPT_1 0x1C3A /* Couger Point */
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#define MEI_DEV_ID_PBG_1 0x1D3A /* C600/X79 Patsburg */
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#define MEI_DEV_ID_PPT_1 0x1E3A /* Panther Point */
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#define MEI_DEV_ID_PPT_2 0x1CBA /* Panther Point */
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#define MEI_DEV_ID_PPT_3 0x1DBA /* Panther Point */
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#define MEI_DEV_ID_LPT 0x8C3A /* Lynx Point */
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#define MEI_DEV_ID_LPT_LP 0x9C3A /* Lynx Point LP */
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/*
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* MEI HW Section
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*/
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/* MEI registers */
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/* H_CB_WW - Host Circular Buffer (CB) Write Window register */
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#define H_CB_WW 0
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/* H_CSR - Host Control Status register */
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#define H_CSR 4
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/* ME_CB_RW - ME Circular Buffer Read Window register (read only) */
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#define ME_CB_RW 8
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/* ME_CSR_HA - ME Control Status Host Access register (read only) */
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#define ME_CSR_HA 0xC
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/* register bits of H_CSR (Host Control Status register) */
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/* Host Circular Buffer Depth - maximum number of 32-bit entries in CB */
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#define H_CBD 0xFF000000
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/* Host Circular Buffer Write Pointer */
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#define H_CBWP 0x00FF0000
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/* Host Circular Buffer Read Pointer */
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#define H_CBRP 0x0000FF00
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/* Host Reset */
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#define H_RST 0x00000010
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/* Host Ready */
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#define H_RDY 0x00000008
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/* Host Interrupt Generate */
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#define H_IG 0x00000004
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/* Host Interrupt Status */
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#define H_IS 0x00000002
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/* Host Interrupt Enable */
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#define H_IE 0x00000001
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/* register bits of ME_CSR_HA (ME Control Status Host Access register) */
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/* ME CB (Circular Buffer) Depth HRA (Host Read Access) - host read only
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access to ME_CBD */
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#define ME_CBD_HRA 0xFF000000
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/* ME CB Write Pointer HRA - host read only access to ME_CBWP */
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#define ME_CBWP_HRA 0x00FF0000
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/* ME CB Read Pointer HRA - host read only access to ME_CBRP */
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#define ME_CBRP_HRA 0x0000FF00
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/* ME Reset HRA - host read only access to ME_RST */
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#define ME_RST_HRA 0x00000010
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/* ME Ready HRA - host read only access to ME_RDY */
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#define ME_RDY_HRA 0x00000008
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/* ME Interrupt Generate HRA - host read only access to ME_IG */
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#define ME_IG_HRA 0x00000004
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/* ME Interrupt Status HRA - host read only access to ME_IS */
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#define ME_IS_HRA 0x00000002
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/* ME Interrupt Enable HRA - host read only access to ME_IE */
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#define ME_IE_HRA 0x00000001
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#endif /* _MEI_HW_MEI_REGS_H_ */
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@ -18,7 +18,7 @@
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#include <linux/mei.h>
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#include "mei_dev.h"
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#include "interface.h"
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#include "hw-me.h"
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/**
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* mei_reg_read - Reads 32bit data from the mei device
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@ -1,167 +1,52 @@
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/******************************************************************************
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/*
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*
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* Intel Management Engine Interface (Intel MEI) Linux driver
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* Intel MEI Interface Header
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* Copyright (c) 2003-2012, Intel Corporation.
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* GPL LICENSE SUMMARY
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* Copyright(c) 2003 - 2012 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
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* USA
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*
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* The full GNU General Public License is included in this distribution
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* in the file called LICENSE.GPL.
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*
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* Contact Information:
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* Intel Corporation.
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* linux-mei@linux.intel.com
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* http://www.intel.com
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*
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* BSD LICENSE
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*
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* Copyright(c) 2003 - 2012 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
|
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*****************************************************************************/
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#ifndef _MEI_HW_MEI_H_
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#define _MEI_HW_MEI_H_
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/*
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* MEI device IDs
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*/
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#define MEI_DEV_ID_82946GZ 0x2974 /* 82946GZ/GL */
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#define MEI_DEV_ID_82G35 0x2984 /* 82G35 Express */
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#define MEI_DEV_ID_82Q965 0x2994 /* 82Q963/Q965 */
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#define MEI_DEV_ID_82G965 0x29A4 /* 82P965/G965 */
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#define MEI_DEV_ID_82GM965 0x2A04 /* Mobile PM965/GM965 */
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#define MEI_DEV_ID_82GME965 0x2A14 /* Mobile GME965/GLE960 */
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#define MEI_DEV_ID_ICH9_82Q35 0x29B4 /* 82Q35 Express */
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#define MEI_DEV_ID_ICH9_82G33 0x29C4 /* 82G33/G31/P35/P31 Express */
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#define MEI_DEV_ID_ICH9_82Q33 0x29D4 /* 82Q33 Express */
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#define MEI_DEV_ID_ICH9_82X38 0x29E4 /* 82X38/X48 Express */
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#define MEI_DEV_ID_ICH9_3200 0x29F4 /* 3200/3210 Server */
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#define MEI_DEV_ID_ICH9_6 0x28B4 /* Bearlake */
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#define MEI_DEV_ID_ICH9_7 0x28C4 /* Bearlake */
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#define MEI_DEV_ID_ICH9_8 0x28D4 /* Bearlake */
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#define MEI_DEV_ID_ICH9_9 0x28E4 /* Bearlake */
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#define MEI_DEV_ID_ICH9_10 0x28F4 /* Bearlake */
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#define MEI_DEV_ID_ICH9M_1 0x2A44 /* Cantiga */
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#define MEI_DEV_ID_ICH9M_2 0x2A54 /* Cantiga */
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#define MEI_DEV_ID_ICH9M_3 0x2A64 /* Cantiga */
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#define MEI_DEV_ID_ICH9M_4 0x2A74 /* Cantiga */
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#define MEI_DEV_ID_ICH10_1 0x2E04 /* Eaglelake */
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#define MEI_DEV_ID_ICH10_2 0x2E14 /* Eaglelake */
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#define MEI_DEV_ID_ICH10_3 0x2E24 /* Eaglelake */
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#define MEI_DEV_ID_ICH10_4 0x2E34 /* Eaglelake */
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#define MEI_DEV_ID_IBXPK_1 0x3B64 /* Calpella */
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#define MEI_DEV_ID_IBXPK_2 0x3B65 /* Calpella */
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#define MEI_DEV_ID_CPT_1 0x1C3A /* Couger Point */
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#define MEI_DEV_ID_PBG_1 0x1D3A /* C600/X79 Patsburg */
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#define MEI_DEV_ID_PPT_1 0x1E3A /* Panther Point */
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#define MEI_DEV_ID_PPT_2 0x1CBA /* Panther Point */
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#define MEI_DEV_ID_PPT_3 0x1DBA /* Panther Point */
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#define MEI_DEV_ID_LPT 0x8C3A /* Lynx Point */
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#define MEI_DEV_ID_LPT_LP 0x9C3A /* Lynx Point LP */
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/*
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* MEI HW Section
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*/
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/* MEI registers */
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/* H_CB_WW - Host Circular Buffer (CB) Write Window register */
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#define H_CB_WW 0
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/* H_CSR - Host Control Status register */
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#define H_CSR 4
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/* ME_CB_RW - ME Circular Buffer Read Window register (read only) */
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#define ME_CB_RW 8
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/* ME_CSR_HA - ME Control Status Host Access register (read only) */
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#define ME_CSR_HA 0xC
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/* register bits of H_CSR (Host Control Status register) */
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/* Host Circular Buffer Depth - maximum number of 32-bit entries in CB */
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#define H_CBD 0xFF000000
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/* Host Circular Buffer Write Pointer */
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#define H_CBWP 0x00FF0000
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/* Host Circular Buffer Read Pointer */
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#define H_CBRP 0x0000FF00
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/* Host Reset */
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#define H_RST 0x00000010
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/* Host Ready */
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#define H_RDY 0x00000008
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/* Host Interrupt Generate */
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#define H_IG 0x00000004
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/* Host Interrupt Status */
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#define H_IS 0x00000002
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/* Host Interrupt Enable */
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#define H_IE 0x00000001
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#ifndef _MEI_INTERFACE_H_
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#define _MEI_INTERFACE_H_
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#include <linux/mei.h>
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#include "mei_dev.h"
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/* register bits of ME_CSR_HA (ME Control Status Host Access register) */
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/* ME CB (Circular Buffer) Depth HRA (Host Read Access) - host read only
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access to ME_CBD */
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#define ME_CBD_HRA 0xFF000000
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/* ME CB Write Pointer HRA - host read only access to ME_CBWP */
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#define ME_CBWP_HRA 0x00FF0000
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/* ME CB Read Pointer HRA - host read only access to ME_CBRP */
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#define ME_CBRP_HRA 0x0000FF00
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/* ME Reset HRA - host read only access to ME_RST */
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#define ME_RST_HRA 0x00000010
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/* ME Ready HRA - host read only access to ME_RDY */
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#define ME_RDY_HRA 0x00000008
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/* ME Interrupt Generate HRA - host read only access to ME_IG */
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#define ME_IG_HRA 0x00000004
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/* ME Interrupt Status HRA - host read only access to ME_IS */
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#define ME_IS_HRA 0x00000002
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/* ME Interrupt Enable HRA - host read only access to ME_IE */
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#define ME_IE_HRA 0x00000001
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#endif /* _MEI_HW_MEI_H_ */
|
||||
void mei_read_slots(struct mei_device *dev,
|
||||
unsigned char *buffer,
|
||||
unsigned long buffer_length);
|
||||
|
||||
int mei_write_message(struct mei_device *dev,
|
||||
struct mei_msg_hdr *header,
|
||||
unsigned char *buf);
|
||||
|
||||
bool mei_hbuf_is_empty(struct mei_device *dev);
|
||||
|
||||
int mei_hbuf_empty_slots(struct mei_device *dev);
|
||||
|
||||
static inline size_t mei_hbuf_max_data(const struct mei_device *dev)
|
||||
{
|
||||
return dev->hbuf_depth * sizeof(u32) - sizeof(struct mei_msg_hdr);
|
||||
}
|
||||
|
||||
/* get slots (dwords) from a message length + header (bytes) */
|
||||
static inline unsigned char mei_data2slots(size_t length)
|
||||
{
|
||||
return DIV_ROUND_UP(sizeof(struct mei_msg_hdr) + length, 4);
|
||||
}
|
||||
|
||||
int mei_count_full_read_slots(struct mei_device *dev);
|
||||
|
||||
#endif /* _MEI_INTERFACE_H_ */
|
||||
|
|
|
|||
|
|
@ -22,7 +22,6 @@
|
|||
#include <linux/mei.h>
|
||||
|
||||
#include "mei_dev.h"
|
||||
#include "interface.h"
|
||||
#include "client.h"
|
||||
|
||||
const char *mei_dev_state_str(int state)
|
||||
|
|
|
|||
|
|
@ -1,52 +0,0 @@
|
|||
/*
|
||||
*
|
||||
* Intel Management Engine Interface (Intel MEI) Linux driver
|
||||
* Copyright (c) 2003-2012, Intel Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifndef _MEI_INTERFACE_H_
|
||||
#define _MEI_INTERFACE_H_
|
||||
|
||||
#include <linux/mei.h>
|
||||
#include "mei_dev.h"
|
||||
|
||||
|
||||
|
||||
void mei_read_slots(struct mei_device *dev,
|
||||
unsigned char *buffer,
|
||||
unsigned long buffer_length);
|
||||
|
||||
int mei_write_message(struct mei_device *dev,
|
||||
struct mei_msg_hdr *header,
|
||||
unsigned char *buf);
|
||||
|
||||
bool mei_hbuf_is_empty(struct mei_device *dev);
|
||||
|
||||
int mei_hbuf_empty_slots(struct mei_device *dev);
|
||||
|
||||
static inline size_t mei_hbuf_max_data(const struct mei_device *dev)
|
||||
{
|
||||
return dev->hbuf_depth * sizeof(u32) - sizeof(struct mei_msg_hdr);
|
||||
}
|
||||
|
||||
/* get slots (dwords) from a message length + header (bytes) */
|
||||
static inline unsigned char mei_data2slots(size_t length)
|
||||
{
|
||||
return DIV_ROUND_UP(sizeof(struct mei_msg_hdr) + length, 4);
|
||||
}
|
||||
|
||||
int mei_count_full_read_slots(struct mei_device *dev);
|
||||
|
||||
#endif /* _MEI_INTERFACE_H_ */
|
||||
|
|
@ -25,7 +25,7 @@
|
|||
|
||||
#include "mei_dev.h"
|
||||
#include "hbm.h"
|
||||
#include "interface.h"
|
||||
#include "hw-me.h"
|
||||
#include "client.h"
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -40,7 +40,7 @@
|
|||
#include <linux/mei.h>
|
||||
|
||||
#include "mei_dev.h"
|
||||
#include "interface.h"
|
||||
#include "hw-me.h"
|
||||
#include "client.h"
|
||||
|
||||
/* AMT device is a singleton on the platform */
|
||||
|
|
|
|||
|
|
@ -23,7 +23,7 @@
|
|||
#include <linux/mei.h>
|
||||
|
||||
#include "hw.h"
|
||||
#include "hw-me.h"
|
||||
#include "hw-me-regs.h"
|
||||
|
||||
/*
|
||||
* watch dog definition
|
||||
|
|
|
|||
|
|
@ -25,7 +25,7 @@
|
|||
|
||||
#include "mei_dev.h"
|
||||
#include "hbm.h"
|
||||
#include "interface.h"
|
||||
#include "hw-me.h"
|
||||
#include "client.h"
|
||||
|
||||
static const u8 mei_start_wd_params[] = { 0x02, 0x12, 0x13, 0x10 };
|
||||
|
|
|
|||
Loading…
Reference in New Issue