perf_counter: Accurate period data
We currently log hw.sample_period for PERF_SAMPLE_PERIOD, however this is incorrect. When we adjust the period, it will only take effect the next cycle but report it for the current cycle. So when we adjust the period for every cycle, we're always wrong. Solve this by keeping track of the last_period. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Mike Galbraith <efault@gmx.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -767,6 +767,7 @@ static void power_pmu_unthrottle(struct perf_counter *counter)
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perf_disable();
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power_pmu_read(counter);
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left = counter->hw.sample_period;
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counter->hw.last_period = left;
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val = 0;
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if (left < 0x80000000L)
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val = 0x80000000L - left;
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@ -937,7 +938,8 @@ const struct pmu *hw_perf_counter_init(struct perf_counter *counter)
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counter->hw.config = events[n];
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counter->hw.counter_base = cflags[n];
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atomic64_set(&counter->hw.period_left, counter->hw.sample_period);
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counter->hw.last_period = counter->hw.sample_period;
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atomic64_set(&counter->hw.period_left, counter->hw.last_period);
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/*
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* See if we need to reserve the PMU.
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@ -1004,6 +1006,7 @@ static void record_and_restart(struct perf_counter *counter, long val,
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struct perf_sample_data data = {
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.regs = regs,
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.addr = 0,
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.period = counter->hw.last_period,
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};
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if (counter->attr.sample_type & PERF_SAMPLE_ADDR) {
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@ -698,6 +698,7 @@ static int __hw_perf_counter_init(struct perf_counter *counter)
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if (!hwc->sample_period) {
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hwc->sample_period = x86_pmu.max_period;
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hwc->last_period = hwc->sample_period;
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atomic64_set(&hwc->period_left, hwc->sample_period);
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}
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@ -880,12 +881,14 @@ x86_perf_counter_set_period(struct perf_counter *counter,
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if (unlikely(left <= -period)) {
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left = period;
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atomic64_set(&hwc->period_left, left);
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hwc->last_period = period;
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ret = 1;
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}
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if (unlikely(left <= 0)) {
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left += period;
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atomic64_set(&hwc->period_left, left);
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hwc->last_period = period;
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ret = 1;
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}
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/*
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@ -1257,9 +1260,12 @@ static int amd_pmu_handle_irq(struct pt_regs *regs)
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if (val & (1ULL << (x86_pmu.counter_bits - 1)))
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continue;
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/* counter overflow */
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/*
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* counter overflow
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*/
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handled = 1;
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inc_irq_stat(apic_perf_irqs);
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data.period = counter->hw.last_period;
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if (!x86_perf_counter_set_period(counter, hwc, idx))
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continue;
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@ -1267,6 +1273,9 @@ static int amd_pmu_handle_irq(struct pt_regs *regs)
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amd_pmu_disable_counter(hwc, idx);
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}
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if (handled)
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inc_irq_stat(apic_perf_irqs);
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return handled;
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}
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@ -366,6 +366,7 @@ struct hw_perf_counter {
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};
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atomic64_t prev_count;
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u64 sample_period;
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u64 last_period;
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atomic64_t period_left;
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u64 interrupts;
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@ -608,6 +609,7 @@ extern void perf_counter_update_userpage(struct perf_counter *counter);
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struct perf_sample_data {
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struct pt_regs *regs;
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u64 addr;
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u64 period;
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};
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extern int perf_counter_overflow(struct perf_counter *counter, int nmi,
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@ -2495,7 +2495,7 @@ static void perf_counter_output(struct perf_counter *counter, int nmi,
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perf_output_put(&handle, cpu_entry);
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if (sample_type & PERF_SAMPLE_PERIOD)
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perf_output_put(&handle, counter->hw.sample_period);
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perf_output_put(&handle, data->period);
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/*
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* XXX PERF_SAMPLE_GROUP vs inherited counters seems difficult.
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@ -3040,11 +3040,13 @@ static void perf_swcounter_set_period(struct perf_counter *counter)
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if (unlikely(left <= -period)) {
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left = period;
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atomic64_set(&hwc->period_left, left);
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hwc->last_period = period;
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}
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if (unlikely(left <= 0)) {
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left += period;
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atomic64_add(period, &hwc->period_left);
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hwc->last_period = period;
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}
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atomic64_set(&hwc->prev_count, -left);
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@ -3088,6 +3090,7 @@ static void perf_swcounter_overflow(struct perf_counter *counter,
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struct perf_sample_data data = {
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.regs = regs,
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.addr = addr,
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.period = counter->hw.last_period,
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};
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perf_swcounter_update(counter);
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