RISC-V: Make __NR_riscv_flush_icache visible to userspace

We were hoping to avoid making this visible to userspace, but it looks
like we're going to have to because QEMU's user-mode emulation doesn't
want to emulate a vDSO.  Having vDSO-only system calls was a bit
unothodox anyway, so I think in this case it's OK to just make the
actual system call number public.

This patch simply moves the definition of __NR_riscv_flush_icache
availiable to userspace, which results in the deletion of the now empty
vdso-syscalls.h.

Changes since v1:

* I've moved the definition into uapi/asm/syscalls.h rathen than
  uapi/asm/unistd.h.  This allows me to keep asm/unistd.h, so we can
  keep the syscall table macros sane.
* As a side effect of the above, this no longer disables all system
  calls on RISC-V.  Whoops!

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
This commit is contained in:
Palmer Dabbelt 2017-12-26 19:11:22 -08:00
parent 33c57c0d3c
commit 9e49a4ed07
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5 changed files with 27 additions and 30 deletions

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@ -14,3 +14,4 @@
#define __ARCH_HAVE_MMU #define __ARCH_HAVE_MMU
#define __ARCH_WANT_SYS_CLONE #define __ARCH_WANT_SYS_CLONE
#include <uapi/asm/unistd.h> #include <uapi/asm/unistd.h>
#include <uapi/asm/syscalls.h>

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@ -1,28 +0,0 @@
/*
* Copyright (C) 2017 SiFive
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _ASM_RISCV_VDSO_SYSCALLS_H
#define _ASM_RISCV_VDSO_SYSCALLS_H
#ifdef CONFIG_SMP
/* These syscalls are only used by the vDSO and are not in the uapi. */
#define __NR_riscv_flush_icache (__NR_arch_specific_syscall + 15)
__SYSCALL(__NR_riscv_flush_icache, sys_riscv_flush_icache)
#endif
#endif /* _ASM_RISCV_VDSO_H */

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@ -0,0 +1,26 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2017 SiFive
*/
#ifndef _ASM__UAPI__SYSCALLS_H
#define _ASM__UAPI__SYSCALLS_H
/*
* Allows the instruction cache to be flushed from userspace. Despite RISC-V
* having a direct 'fence.i' instruction available to userspace (which we
* can't trap!), that's not actually viable when running on Linux because the
* kernel might schedule a process on another hart. There is no way for
* userspace to handle this without invoking the kernel (as it doesn't know the
* thread->hart mappings), so we've defined a RISC-V specific system call to
* flush the instruction cache.
*
* __NR_riscv_flush_icache is defined to flush the instruction cache over an
* address range, with the flush applying to either all threads or just the
* caller. We don't currently do anything with the address range, that's just
* in there for forwards compatibility.
*/
#define __NR_riscv_flush_icache (__NR_arch_specific_syscall + 15)
__SYSCALL(__NR_riscv_flush_icache, sys_riscv_flush_icache)
#endif

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@ -23,5 +23,4 @@
void *sys_call_table[__NR_syscalls] = { void *sys_call_table[__NR_syscalls] = {
[0 ... __NR_syscalls - 1] = sys_ni_syscall, [0 ... __NR_syscalls - 1] = sys_ni_syscall,
#include <asm/unistd.h> #include <asm/unistd.h>
#include <asm/vdso-syscalls.h>
}; };

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@ -13,7 +13,6 @@
#include <linux/linkage.h> #include <linux/linkage.h>
#include <asm/unistd.h> #include <asm/unistd.h>
#include <asm/vdso-syscalls.h>
.text .text
/* int __vdso_flush_icache(void *start, void *end, unsigned long flags); */ /* int __vdso_flush_icache(void *start, void *end, unsigned long flags); */