PCI: use dev_printk in x86 quirk messages
Convert quirk printks to dev_printk(). Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
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f0fda801da
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9ed885541b
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@ -30,8 +30,8 @@ static void __devinit quirk_intel_irqbalance(struct pci_dev *dev)
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raw_pci_ops->read(0, 0, 0x40, 0x4c, 2, &word);
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if (!(word & (1 << 13))) {
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printk(KERN_INFO "Intel E7520/7320/7525 detected. "
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"Disabling irq balancing and affinity\n");
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dev_info(&dev->dev, "Intel E7520/7320/7525 detected; "
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"disabling irq balancing and affinity\n");
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#ifdef CONFIG_IRQBALANCE
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irqbalance_disable("");
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#endif
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@ -104,14 +104,16 @@ static void ich_force_enable_hpet(struct pci_dev *dev)
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pci_read_config_dword(dev, 0xF0, &rcba);
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rcba &= 0xFFFFC000;
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if (rcba == 0) {
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printk(KERN_DEBUG "RCBA disabled. Cannot force enable HPET\n");
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dev_printk(KERN_DEBUG, &dev->dev, "RCBA disabled; "
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"cannot force enable HPET\n");
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return;
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}
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/* use bits 31:14, 16 kB aligned */
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rcba_base = ioremap_nocache(rcba, 0x4000);
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if (rcba_base == NULL) {
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printk(KERN_DEBUG "ioremap failed. Cannot force enable HPET\n");
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dev_printk(KERN_DEBUG, &dev->dev, "ioremap failed; "
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"cannot force enable HPET\n");
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return;
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}
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@ -122,8 +124,8 @@ static void ich_force_enable_hpet(struct pci_dev *dev)
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/* HPET is enabled in HPTC. Just not reported by BIOS */
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val = val & 0x3;
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force_hpet_address = 0xFED00000 | (val << 12);
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printk(KERN_DEBUG "Force enabled HPET at base address 0x%lx\n",
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force_hpet_address);
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dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at "
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"0x%lx\n", force_hpet_address);
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iounmap(rcba_base);
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return;
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}
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@ -142,11 +144,12 @@ static void ich_force_enable_hpet(struct pci_dev *dev)
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if (err) {
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force_hpet_address = 0;
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iounmap(rcba_base);
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printk(KERN_DEBUG "Failed to force enable HPET\n");
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dev_printk(KERN_DEBUG, &dev->dev,
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"Failed to force enable HPET\n");
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} else {
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force_hpet_resume_type = ICH_FORCE_HPET_RESUME;
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printk(KERN_DEBUG "Force enabled HPET at base address 0x%lx\n",
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force_hpet_address);
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dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at "
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"0x%lx\n", force_hpet_address);
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}
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}
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@ -208,8 +211,8 @@ static void old_ich_force_enable_hpet(struct pci_dev *dev)
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if (val & 0x4) {
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val &= 0x3;
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force_hpet_address = 0xFED00000 | (val << 12);
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printk(KERN_DEBUG "HPET at base address 0x%lx\n",
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force_hpet_address);
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dev_printk(KERN_DEBUG, &dev->dev, "HPET at 0x%lx\n",
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force_hpet_address);
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return;
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}
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@ -229,14 +232,14 @@ static void old_ich_force_enable_hpet(struct pci_dev *dev)
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/* HPET is enabled in HPTC. Just not reported by BIOS */
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val &= 0x3;
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force_hpet_address = 0xFED00000 | (val << 12);
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printk(KERN_DEBUG "Force enabled HPET at base address 0x%lx\n",
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force_hpet_address);
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dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at "
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"0x%lx\n", force_hpet_address);
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cached_dev = dev;
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force_hpet_resume_type = OLD_ICH_FORCE_HPET_RESUME;
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return;
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}
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printk(KERN_DEBUG "Failed to force enable HPET\n");
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dev_printk(KERN_DEBUG, &dev->dev, "Failed to force enable HPET\n");
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}
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/*
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@ -294,8 +297,8 @@ static void vt8237_force_enable_hpet(struct pci_dev *dev)
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*/
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if (val & 0x80) {
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force_hpet_address = (val & ~0x3ff);
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printk(KERN_DEBUG "HPET at base address 0x%lx\n",
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force_hpet_address);
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dev_printk(KERN_DEBUG, &dev->dev, "HPET at 0x%lx\n",
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force_hpet_address);
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return;
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}
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@ -309,14 +312,14 @@ static void vt8237_force_enable_hpet(struct pci_dev *dev)
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pci_read_config_dword(dev, 0x68, &val);
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if (val & 0x80) {
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force_hpet_address = (val & ~0x3ff);
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printk(KERN_DEBUG "Force enabled HPET at base address 0x%lx\n",
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force_hpet_address);
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dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at "
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"0x%lx\n", force_hpet_address);
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cached_dev = dev;
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force_hpet_resume_type = VT8237_FORCE_HPET_RESUME;
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return;
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}
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printk(KERN_DEBUG "Failed to force enable HPET\n");
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dev_printk(KERN_DEBUG, &dev->dev, "Failed to force enable HPET\n");
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235,
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@ -344,7 +347,7 @@ static void nvidia_force_enable_hpet(struct pci_dev *dev)
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pci_read_config_dword(dev, 0x44, &val);
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force_hpet_address = val & 0xfffffffe;
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force_hpet_resume_type = NVIDIA_FORCE_HPET_RESUME;
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printk(KERN_DEBUG "Force enabled HPET at base address 0x%lx\n",
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dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at 0x%lx\n",
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force_hpet_address);
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cached_dev = dev;
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return;
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@ -17,7 +17,7 @@ static void __devinit pci_fixup_i450nx(struct pci_dev *d)
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int pxb, reg;
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u8 busno, suba, subb;
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printk(KERN_WARNING "PCI: Searching for i450NX host bridges on %s\n", pci_name(d));
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dev_warn(&d->dev, "Searching for i450NX host bridges\n");
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reg = 0xd0;
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for(pxb = 0; pxb < 2; pxb++) {
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pci_read_config_byte(d, reg++, &busno);
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@ -41,7 +41,7 @@ static void __devinit pci_fixup_i450gx(struct pci_dev *d)
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*/
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u8 busno;
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pci_read_config_byte(d, 0x4a, &busno);
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printk(KERN_INFO "PCI: i440KX/GX host bridge %s: secondary bus %02x\n", pci_name(d), busno);
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dev_info(&d->dev, "i440KX/GX host bridge; secondary bus %02x\n", busno);
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pci_scan_bus_with_sysdata(busno);
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pcibios_last_bus = -1;
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}
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@ -55,7 +55,7 @@ static void __devinit pci_fixup_umc_ide(struct pci_dev *d)
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*/
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int i;
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printk(KERN_WARNING "PCI: Fixing base address flags for device %s\n", pci_name(d));
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dev_warn(&d->dev, "Fixing base address flags\n");
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for(i = 0; i < 4; i++)
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d->resource[i].flags |= PCI_BASE_ADDRESS_SPACE_IO;
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}
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@ -68,7 +68,7 @@ static void __devinit pci_fixup_ncr53c810(struct pci_dev *d)
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* Fix class to be PCI_CLASS_STORAGE_SCSI
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*/
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if (!d->class) {
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printk(KERN_WARNING "PCI: fixing NCR 53C810 class code for %s\n", pci_name(d));
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dev_warn(&d->dev, "Fixing NCR 53C810 class code\n");
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d->class = PCI_CLASS_STORAGE_SCSI << 8;
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}
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}
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@ -80,7 +80,7 @@ static void __devinit pci_fixup_latency(struct pci_dev *d)
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* SiS 5597 and 5598 chipsets require latency timer set to
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* at most 32 to avoid lockups.
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*/
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DBG("PCI: Setting max latency to 32\n");
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dev_dbg(&d->dev, "Setting max latency to 32\n");
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pcibios_max_latency = 32;
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5597, pci_fixup_latency);
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@ -138,7 +138,7 @@ static void pci_fixup_via_northbridge_bug(struct pci_dev *d)
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pci_read_config_byte(d, where, &v);
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if (v & ~mask) {
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printk(KERN_WARNING "Disabling VIA memory write queue (PCI ID %04x, rev %02x): [%02x] %02x & %02x -> %02x\n", \
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dev_warn(&d->dev, "Disabling VIA memory write queue (PCI ID %04x, rev %02x): [%02x] %02x & %02x -> %02x\n", \
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d->device, d->revision, where, v, mask, v & mask);
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v &= mask;
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pci_write_config_byte(d, where, v);
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@ -200,7 +200,7 @@ static void pci_fixup_nforce2(struct pci_dev *dev)
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* Apply fixup if needed, but don't touch disconnect state
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*/
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if ((val & 0x00FF0000) != 0x00010000) {
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printk(KERN_WARNING "PCI: nForce2 C1 Halt Disconnect fixup\n");
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dev_warn(&dev->dev, "nForce2 C1 Halt Disconnect fixup\n");
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pci_write_config_dword(dev, 0x6c, (val & 0xFF00FFFF) | 0x00010000);
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}
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}
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@ -348,7 +348,7 @@ static void __devinit pci_fixup_video(struct pci_dev *pdev)
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pci_read_config_word(pdev, PCI_COMMAND, &config);
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if (config & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) {
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pdev->resource[PCI_ROM_RESOURCE].flags |= IORESOURCE_ROM_SHADOW;
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printk(KERN_DEBUG "Boot video device is %s\n", pci_name(pdev));
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dev_printk(KERN_DEBUG, &pdev->dev, "Boot video device\n");
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}
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_video);
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@ -388,11 +388,11 @@ static void __devinit pci_fixup_msi_k8t_onboard_sound(struct pci_dev *dev)
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/* verify the change for status output */
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pci_read_config_byte(dev, 0x50, &val);
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if (val & 0x40)
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printk(KERN_INFO "PCI: Detected MSI K8T Neo2-FIR, "
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dev_info(&dev->dev, "Detected MSI K8T Neo2-FIR; "
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"can't enable onboard soundcard!\n");
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else
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printk(KERN_INFO "PCI: Detected MSI K8T Neo2-FIR, "
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"enabled onboard soundcard.\n");
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dev_info(&dev->dev, "Detected MSI K8T Neo2-FIR; "
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"enabled onboard soundcard\n");
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}
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237,
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