ARM: mmp: enable tauros2 cache in pxa910
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
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@ -25,6 +25,11 @@
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interrupt-parent = <&intc>;
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interrupt-parent = <&intc>;
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ranges;
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ranges;
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L2: l2-cache {
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compatible = "marvell,tauros2-cache";
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marvell,tauros2-cache-features = <0x3>;
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};
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axi@d4200000 { /* AXI */
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axi@d4200000 { /* AXI */
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compatible = "mrvl,axi-bus", "simple-bus";
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compatible = "mrvl,axi-bus", "simple-bus";
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#address-cells = <1>;
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#address-cells = <1>;
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@ -14,6 +14,7 @@
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#include <linux/io.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#include <asm/hardware/cache-tauros2.h>
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#include <asm/mach/time.h>
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#include <asm/mach/time.h>
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#include <mach/addr-map.h>
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#include <mach/addr-map.h>
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#include <mach/regs-apbc.h>
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#include <mach/regs-apbc.h>
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@ -116,6 +117,9 @@ static struct clk_lookup pxa910_clkregs[] = {
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static int __init pxa910_init(void)
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static int __init pxa910_init(void)
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{
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{
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if (cpu_is_pxa910()) {
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if (cpu_is_pxa910()) {
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#ifdef CONFIG_CACHE_TAUROS2
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tauros2_init(0);
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#endif
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mfp_init_base(MFPR_VIRT_BASE);
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mfp_init_base(MFPR_VIRT_BASE);
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mfp_init_addr(pxa910_mfp_addr_map);
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mfp_init_addr(pxa910_mfp_addr_map);
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pxa_init_dma(IRQ_PXA910_DMA_INT0, 32);
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pxa_init_dma(IRQ_PXA910_DMA_INT0, 32);
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