MIPS: perf: ath79: Fix perfcount IRQ assignment
Currently it's not possible to use perf on ath79 due to genirq flags mismatch happening on static virtual IRQ 13 which is used for performance counters hardware IRQ 5. On TP-Link Archer C7v5: CPU0 2: 0 MIPS 2 ath9k 4: 318 MIPS 4 19000000.eth 7: 55034 MIPS 7 timer 8: 1236 MISC 3 ttyS0 12: 0 INTC 1 ehci_hcd:usb1 13: 0 gpio-ath79 2 keys 14: 0 gpio-ath79 5 keys 15: 31 AR724X PCI 1 ath10k_pci $ perf top genirq: Flags mismatch irq 13. 00014c83 (mips_perf_pmu) vs. 00002003 (keys) On TP-Link Archer C7v4: CPU0 4: 0 MIPS 4 19000000.eth 5: 7135 MIPS 5 1a000000.eth 7: 98379 MIPS 7 timer 8: 30 MISC 3 ttyS0 12: 90028 INTC 0 ath9k 13: 5520 INTC 1 ehci_hcd:usb1 14: 4623 INTC 2 ehci_hcd:usb2 15: 32844 AR724X PCI 1 ath10k_pci 16: 0 gpio-ath79 16 keys 23: 0 gpio-ath79 23 keys $ perf top genirq: Flags mismatch irq 13. 00014c80 (mips_perf_pmu) vs. 00000080 (ehci_hcd:usb1) This problem is happening, because currently statically assigned virtual IRQ 13 for performance counters is not claimed during the initialization of MIPS PMU during the bootup, so the IRQ subsystem doesn't know, that this interrupt isn't available for further use. So this patch fixes the issue by simply booking hardware IRQ 5 for MIPS PMU. Tested-by: Kevin 'ldir' Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk> Signed-off-by: Petr Štetiar <ynezz@true.cz> Acked-by: John Crispin <john@phrozen.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net>
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@ -210,12 +210,6 @@ const char *get_system_type(void)
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return ath79_sys_type;
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return ath79_sys_type;
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}
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}
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int get_c0_perfcount_int(void)
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{
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return ATH79_MISC_IRQ(5);
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}
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EXPORT_SYMBOL_GPL(get_c0_perfcount_int);
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unsigned int get_c0_compare_int(void)
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unsigned int get_c0_compare_int(void)
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{
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{
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return CP0_LEGACY_COMPARE_IRQ;
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return CP0_LEGACY_COMPARE_IRQ;
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@ -22,6 +22,15 @@
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#define AR71XX_RESET_REG_MISC_INT_ENABLE 4
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#define AR71XX_RESET_REG_MISC_INT_ENABLE 4
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#define ATH79_MISC_IRQ_COUNT 32
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#define ATH79_MISC_IRQ_COUNT 32
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#define ATH79_MISC_PERF_IRQ 5
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static int ath79_perfcount_irq;
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int get_c0_perfcount_int(void)
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{
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return ath79_perfcount_irq;
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}
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EXPORT_SYMBOL_GPL(get_c0_perfcount_int);
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static void ath79_misc_irq_handler(struct irq_desc *desc)
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static void ath79_misc_irq_handler(struct irq_desc *desc)
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{
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{
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@ -113,6 +122,8 @@ static void __init ath79_misc_intc_domain_init(
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{
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{
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void __iomem *base = domain->host_data;
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void __iomem *base = domain->host_data;
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ath79_perfcount_irq = irq_create_mapping(domain, ATH79_MISC_PERF_IRQ);
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/* Disable and clear all interrupts */
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/* Disable and clear all interrupts */
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__raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE);
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__raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE);
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__raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS);
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__raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS);
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