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i2c-au1550: Fix a misused register problem 

Fix a "mis-used register" problem on the AMD MIPS Alchemy au1550
I2C interface.

In summary, the programmable serial controller seems to hang the kernel
when I send a single 'address' byte on the I2C bus.  The patch
essentially uses the PSC_SMBSTAT register's TE (transmit FIFO empty)
bit to check when the transmit FIFO is empty, instead of using the
PSC_SMBEVNT register's TU (transmit underflow) bit.  Using the TE bit
fixed the hang problem.

Signed-off-by: Chris David <cd@chrisdavid.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
This commit is contained in:
Chris David 2007-10-13 23:56:33 +02:00 committed by Jean Delvare
parent 6662cbb989
commit a202707e71
1 changed files with 4 additions and 7 deletions
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11
drivers/i2c/busses/i2c-au1550.c
View File

@ -48,17 +48,14 @@ wait_xfer_done(struct i2c_au1550_data *adap)
sp = (volatile psc_smb_t *)(adap->psc_base);
/* Wait for Tx FIFO Underflow.
/* Wait for Tx Buffer Empty
*/
for (i = 0; i < adap->xfer_timeout; i++) {
stat = sp->psc_smbevnt;
stat = sp->psc_smbstat;
au_sync();
if ((stat & PSC_SMBEVNT_TU) != 0) {
/* Clear it. */
sp->psc_smbevnt = PSC_SMBEVNT_TU;
au_sync();
if ((stat & PSC_SMBSTAT_TE) != 0)
return 0;
}
udelay(1);
}