serial: sh-sci: Dynamic clock management depends on HAVE_CLK.
Presently this is conditionalized on sh, and disabled for sh64. Now that SH-5 ties in to the clock framework, the sh64 exception can be dropped. Additionally, ARM will want to use the same hooks once SH-Mobile G3 grows clock framework support, so switch these paths over to HAVE_CLK now. Once the H8 and ARM sh-sci users hook up HAVE_CLK, the driver can be switched over to having an outright dependency on it and the ifdefs can go away. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt
parent
bdeb3be7cc
commit
a2159b5221
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@ -78,7 +78,7 @@ struct sci_port {
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struct timer_list break_timer;
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int break_flag;
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#ifdef CONFIG_SUPERH
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#ifdef CONFIG_HAVE_CLK
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/* Port clock */
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struct clk *clk;
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#endif
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@ -831,7 +831,7 @@ static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
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return IRQ_HANDLED;
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}
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#ifdef CONFIG_CPU_FREQ
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#if defined(CONFIG_CPU_FREQ) && defined(CONFIG_HAVE_CLK)
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/*
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* Here we define a transistion notifier so that we can update all of our
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* ports' baud rate when the peripheral clock changes.
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@ -860,7 +860,7 @@ static int sci_notifier(struct notifier_block *self,
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* Clean this up later..
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*/
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clk = clk_get(NULL, "module_clk");
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port->uartclk = clk_get_rate(clk) * 16;
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port->uartclk = clk_get_rate(clk);
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clk_put(clk);
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}
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@ -873,7 +873,7 @@ static int sci_notifier(struct notifier_block *self,
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}
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static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 };
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#endif /* CONFIG_CPU_FREQ */
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#endif /* CONFIG_CPU_FREQ && CONFIG_HAVE_CLK */
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static int sci_request_irq(struct sci_port *port)
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{
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@ -1008,7 +1008,7 @@ static int sci_startup(struct uart_port *port)
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if (s->enable)
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s->enable(port);
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#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
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#ifdef CONFIG_HAVE_CLK
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s->clk = clk_get(NULL, "module_clk");
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#endif
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@ -1030,7 +1030,7 @@ static void sci_shutdown(struct uart_port *port)
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if (s->disable)
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s->disable(port);
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#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
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#ifdef CONFIG_HAVE_CLK
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clk_put(s->clk);
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s->clk = NULL;
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#endif
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@ -1041,24 +1041,11 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
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{
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struct sci_port *s = &sci_ports[port->line];
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unsigned int status, baud, smr_val;
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int t;
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int t = -1;
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baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
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switch (baud) {
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case 0:
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t = -1;
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break;
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default:
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{
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#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
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t = SCBRR_VALUE(baud, clk_get_rate(s->clk));
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#else
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t = SCBRR_VALUE(baud);
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#endif
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break;
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}
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}
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if (likely(baud))
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t = SCBRR_VALUE(baud, port->uartclk);
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do {
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status = sci_in(port, SCxSR);
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@ -1207,17 +1194,17 @@ static void __init sci_init_ports(void)
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sci_ports[i].disable = h8300_sci_disable;
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#endif
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sci_ports[i].port.uartclk = CONFIG_CPU_CLOCK;
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#elif defined(CONFIG_SUPERH64)
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sci_ports[i].port.uartclk = current_cpu_data.module_clock * 16;
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#else
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#elif defined(CONFIG_HAVE_CLK)
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/*
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* XXX: We should use a proper SCI/SCIF clock
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*/
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{
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struct clk *clk = clk_get(NULL, "module_clk");
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sci_ports[i].port.uartclk = clk_get_rate(clk) * 16;
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sci_ports[i].port.uartclk = clk_get_rate(clk);
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clk_put(clk);
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}
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#else
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#error "Need a valid uartclk"
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#endif
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sci_ports[i].break_timer.data = (unsigned long)&sci_ports[i];
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@ -1285,7 +1272,7 @@ static int __init serial_console_setup(struct console *co, char *options)
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port->type = serial_console_port->type;
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#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
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#ifdef CONFIG_HAVE_CLK
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if (!serial_console_port->clk)
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serial_console_port->clk = clk_get(NULL, "module_clk");
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#endif
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@ -1479,7 +1466,7 @@ static int __devinit sci_probe(struct platform_device *dev)
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kgdb_putchar = kgdb_sci_putchar;
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#endif
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#ifdef CONFIG_CPU_FREQ
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#if defined(CONFIG_CPU_FREQ) && defined(CONFIG_HAVE_CLK)
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cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER);
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dev_info(&dev->dev, "CPU frequency notifier registered\n");
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#endif
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@ -793,9 +793,7 @@ static inline int sci_rxd_in(struct uart_port *port)
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#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
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#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(16*bps)-1)
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#elif defined(__H8300H__) || defined(__H8300S__)
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#define SCBRR_VALUE(bps) (((CONFIG_CPU_CLOCK*1000/32)/bps)-1)
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#elif defined(CONFIG_SUPERH64)
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#define SCBRR_VALUE(bps) ((current_cpu_data.module_clock+16*bps)/(32*bps)-1)
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#define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1)
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#else /* Generic SH */
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#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1)
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#endif
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