iio:ad5064: Fix address of the second channel for ad5065/ad5045/ad5025
The ad5065, ad5045, ad5025 use address '3' for the second channel, so they need their own channel spec. Note that ad5064_sync_powerdown_mode() also needs to be slightly updated since it was relying on the fact that chan->address always equaled chan->channel. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
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@ -27,7 +27,6 @@
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#define AD5064_ADDR(x) ((x) << 20)
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#define AD5064_CMD(x) ((x) << 24)
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#define AD5064_ADDR_DAC(chan) (chan)
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#define AD5064_ADDR_ALL_DAC 0xF
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#define AD5064_CMD_WRITE_INPUT_N 0x0
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@ -131,15 +130,15 @@ static int ad5064_write(struct ad5064_state *st, unsigned int cmd,
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}
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static int ad5064_sync_powerdown_mode(struct ad5064_state *st,
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unsigned int channel)
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const struct iio_chan_spec *chan)
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{
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unsigned int val;
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int ret;
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val = (0x1 << channel);
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val = (0x1 << chan->address);
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if (st->pwr_down[channel])
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val |= st->pwr_down_mode[channel] << 8;
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if (st->pwr_down[chan->channel])
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val |= st->pwr_down_mode[chan->channel] << 8;
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ret = ad5064_write(st, AD5064_CMD_POWERDOWN_DAC, 0, val, 0);
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@ -169,7 +168,7 @@ static int ad5064_set_powerdown_mode(struct iio_dev *indio_dev,
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mutex_lock(&indio_dev->mlock);
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st->pwr_down_mode[chan->channel] = mode + 1;
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ret = ad5064_sync_powerdown_mode(st, chan->channel);
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ret = ad5064_sync_powerdown_mode(st, chan);
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mutex_unlock(&indio_dev->mlock);
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return ret;
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@ -205,7 +204,7 @@ static ssize_t ad5064_write_dac_powerdown(struct iio_dev *indio_dev,
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mutex_lock(&indio_dev->mlock);
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st->pwr_down[chan->channel] = pwr_down;
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ret = ad5064_sync_powerdown_mode(st, chan->channel);
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ret = ad5064_sync_powerdown_mode(st, chan);
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mutex_unlock(&indio_dev->mlock);
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return ret ? ret : len;
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}
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@ -292,34 +291,44 @@ static const struct iio_chan_spec_ext_info ad5064_ext_info[] = {
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{ },
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};
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#define AD5064_CHANNEL(chan, bits) { \
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#define AD5064_CHANNEL(chan, addr, bits) { \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.output = 1, \
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.channel = (chan), \
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.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
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IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
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.address = AD5064_ADDR_DAC(chan), \
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.address = addr, \
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.scan_type = IIO_ST('u', (bits), 16, 20 - (bits)), \
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.ext_info = ad5064_ext_info, \
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}
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#define DECLARE_AD5064_CHANNELS(name, bits) \
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const struct iio_chan_spec name[] = { \
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AD5064_CHANNEL(0, bits), \
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AD5064_CHANNEL(1, bits), \
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AD5064_CHANNEL(2, bits), \
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AD5064_CHANNEL(3, bits), \
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AD5064_CHANNEL(4, bits), \
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AD5064_CHANNEL(5, bits), \
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AD5064_CHANNEL(6, bits), \
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AD5064_CHANNEL(7, bits), \
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AD5064_CHANNEL(0, 0, bits), \
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AD5064_CHANNEL(1, 1, bits), \
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AD5064_CHANNEL(2, 2, bits), \
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AD5064_CHANNEL(3, 3, bits), \
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AD5064_CHANNEL(4, 4, bits), \
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AD5064_CHANNEL(5, 5, bits), \
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AD5064_CHANNEL(6, 6, bits), \
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AD5064_CHANNEL(7, 7, bits), \
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}
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#define DECLARE_AD5065_CHANNELS(name, bits) \
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const struct iio_chan_spec name[] = { \
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AD5064_CHANNEL(0, 0, bits), \
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AD5064_CHANNEL(1, 3, bits), \
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}
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static DECLARE_AD5064_CHANNELS(ad5024_channels, 12);
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static DECLARE_AD5064_CHANNELS(ad5044_channels, 14);
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static DECLARE_AD5064_CHANNELS(ad5064_channels, 16);
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static DECLARE_AD5065_CHANNELS(ad5025_channels, 12);
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static DECLARE_AD5065_CHANNELS(ad5045_channels, 14);
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static DECLARE_AD5065_CHANNELS(ad5065_channels, 16);
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static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
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[ID_AD5024] = {
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.shared_vref = false,
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@ -328,7 +337,7 @@ static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
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},
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[ID_AD5025] = {
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.shared_vref = false,
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.channels = ad5024_channels,
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.channels = ad5025_channels,
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.num_channels = 2,
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},
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[ID_AD5044] = {
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@ -338,7 +347,7 @@ static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
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},
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[ID_AD5045] = {
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.shared_vref = false,
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.channels = ad5044_channels,
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.channels = ad5045_channels,
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.num_channels = 2,
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},
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[ID_AD5064] = {
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@ -353,7 +362,7 @@ static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
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},
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[ID_AD5065] = {
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.shared_vref = false,
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.channels = ad5064_channels,
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.channels = ad5065_channels,
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.num_channels = 2,
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},
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[ID_AD5628_1] = {
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