ARM: LPC32xx: Cleanup USB clock init
Move most of usb clock initialization from lpc32xx_udc and ohci-nxp to clock.c. Also adds ohci clocks and otg clocks. Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Signed-off-by: Roland Stigge <stigge@antcom.de>
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@ -739,14 +739,77 @@ static struct clk clk_rtc = {
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.get_rate = local_return_parent_rate,
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};
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static int local_usb_enable(struct clk *clk, int enable)
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{
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u32 tmp;
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if (enable) {
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/* Set up I2C pull levels */
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tmp = __raw_readl(LPC32XX_CLKPWR_I2C_CLK_CTRL);
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tmp |= LPC32XX_CLKPWR_I2CCLK_USBI2CHI_DRIVE;
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__raw_writel(tmp, LPC32XX_CLKPWR_I2C_CLK_CTRL);
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}
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return local_onoff_enable(clk, enable);
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}
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static struct clk clk_usbd = {
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.parent = &clk_usbpll,
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.enable = local_onoff_enable,
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.enable = local_usb_enable,
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.enable_reg = LPC32XX_CLKPWR_USB_CTRL,
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.enable_mask = LPC32XX_CLKPWR_USBCTRL_HCLK_EN,
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.get_rate = local_return_parent_rate,
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};
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#define OTG_ALWAYS_MASK (LPC32XX_USB_OTG_OTG_CLOCK_ON | \
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LPC32XX_USB_OTG_I2C_CLOCK_ON)
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static int local_usb_otg_enable(struct clk *clk, int enable)
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{
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int to = 1000;
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if (enable) {
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__raw_writel(clk->enable_mask, clk->enable_reg);
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while (((__raw_readl(LPC32XX_USB_OTG_CLK_STAT) &
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clk->enable_mask) != clk->enable_mask) && (to > 0))
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to--;
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} else {
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__raw_writel(OTG_ALWAYS_MASK, clk->enable_reg);
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while (((__raw_readl(LPC32XX_USB_OTG_CLK_STAT) &
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OTG_ALWAYS_MASK) != OTG_ALWAYS_MASK) && (to > 0))
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to--;
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}
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if (to)
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return 0;
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else
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return -1;
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}
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static struct clk clk_usb_otg_dev = {
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.parent = &clk_usbpll,
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.enable = local_usb_otg_enable,
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.enable_reg = LPC32XX_USB_OTG_CLK_CTRL,
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.enable_mask = LPC32XX_USB_OTG_AHB_M_CLOCK_ON |
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LPC32XX_USB_OTG_OTG_CLOCK_ON |
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LPC32XX_USB_OTG_DEV_CLOCK_ON |
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LPC32XX_USB_OTG_I2C_CLOCK_ON,
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.get_rate = local_return_parent_rate,
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};
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static struct clk clk_usb_otg_host = {
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.parent = &clk_usbpll,
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.enable = local_usb_otg_enable,
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.enable_reg = LPC32XX_USB_OTG_CLK_CTRL,
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.enable_mask = LPC32XX_USB_OTG_AHB_M_CLOCK_ON |
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LPC32XX_USB_OTG_OTG_CLOCK_ON |
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LPC32XX_USB_OTG_HOST_CLOCK_ON |
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LPC32XX_USB_OTG_I2C_CLOCK_ON,
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.get_rate = local_return_parent_rate,
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};
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static int tsc_onoff_enable(struct clk *clk, int enable)
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{
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u32 tmp;
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@ -1145,6 +1208,9 @@ static struct clk_lookup lookups[] = {
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CLKDEV_INIT("31060000.ethernet", NULL, &clk_net),
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CLKDEV_INIT("dev:clcd", NULL, &clk_lcd),
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CLKDEV_INIT("31020000.usbd", "ck_usbd", &clk_usbd),
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CLKDEV_INIT("31020000.ohci", "ck_usbd", &clk_usbd),
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CLKDEV_INIT("31020000.usbd", "ck_usb_otg", &clk_usb_otg_dev),
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CLKDEV_INIT("31020000.ohci", "ck_usb_otg", &clk_usb_otg_host),
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CLKDEV_INIT("lpc32xx_rtc", NULL, &clk_rtc),
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};
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@ -694,4 +694,18 @@
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#define LPC32XX_GPIO_P2_MUX_CLR _GPREG(0x02C)
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#define LPC32XX_GPIO_P2_MUX_STATE _GPREG(0x030)
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/*
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* USB Otg Registers
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*/
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#define _OTGREG(x) io_p2v(LPC32XX_USB_OTG_BASE + (x))
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#define LPC32XX_USB_OTG_CLK_CTRL _OTGREG(0xFF4)
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#define LPC32XX_USB_OTG_CLK_STAT _OTGREG(0xFF8)
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/* USB OTG CLK CTRL bit defines */
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#define LPC32XX_USB_OTG_AHB_M_CLOCK_ON _BIT(4)
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#define LPC32XX_USB_OTG_OTG_CLOCK_ON _BIT(3)
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#define LPC32XX_USB_OTG_I2C_CLOCK_ON _BIT(2)
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#define LPC32XX_USB_OTG_DEV_CLOCK_ON _BIT(1)
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#define LPC32XX_USB_OTG_HOST_CLOCK_ON _BIT(0)
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#endif
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