ARM: OMAP: Map SRAM later on with ioremap_exec()
This allows us to remove omap hacks for map_io. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -21,6 +21,7 @@
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#include <mach/hardware.h>
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#include <asm/mach/map.h>
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#include <plat/common.h>
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#include <plat/tc.h>
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#include <plat/board.h>
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#include <plat/mux.h>
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@ -291,6 +292,8 @@ static int __init omap1_init_devices(void)
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if (!cpu_class_is_omap1())
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return -ENODEV;
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omap_sram_init();
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/* please keep these calls, and their implementations above,
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* in alphabetical order so they're easier to sort through.
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*/
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@ -21,7 +21,6 @@
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#include "clock.h"
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extern void omap_check_revision(void);
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extern void omap_sram_init(void);
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/*
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* The machine specific code may provide the extra mapping besides the
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@ -133,7 +132,6 @@ void omap1_init_early(void)
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*/
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omap1_clk_init();
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omap1_mux_init();
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omap_sram_init();
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}
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/*
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@ -35,8 +35,8 @@
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#include "clock2xxx.h"
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#include "clock3xxx.h"
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#include "clock44xx.h"
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#include "io.h"
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#include <plat/common.h>
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#include <plat/omap-pm.h>
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#include "voltage.h"
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#include "powerdomain.h"
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@ -240,22 +240,11 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
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};
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#endif
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static void __init _omap2_map_common_io(void)
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{
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/* Normally devicemaps_init() would flush caches and tlb after
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* mdesc->map_io(), but we must also do it here because of the CPU
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* revision check below.
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*/
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local_flush_tlb_all();
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flush_cache_all();
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}
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#ifdef CONFIG_SOC_OMAP2420
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void __init omap242x_map_common_io(void)
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{
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iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
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iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
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_omap2_map_common_io();
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}
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#endif
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@ -264,7 +253,6 @@ void __init omap243x_map_common_io(void)
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{
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iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
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iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
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_omap2_map_common_io();
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}
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#endif
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@ -272,7 +260,6 @@ void __init omap243x_map_common_io(void)
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void __init omap34xx_map_common_io(void)
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{
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iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
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_omap2_map_common_io();
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}
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#endif
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@ -280,7 +267,6 @@ void __init omap34xx_map_common_io(void)
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void __init omapti816x_map_common_io(void)
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{
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iotable_init(omapti816x_io_desc, ARRAY_SIZE(omapti816x_io_desc));
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_omap2_map_common_io();
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}
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#endif
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@ -288,7 +274,6 @@ void __init omapti816x_map_common_io(void)
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void __init omap44xx_map_common_io(void)
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{
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iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
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_omap2_map_common_io();
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}
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#endif
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@ -337,7 +322,6 @@ void __iomem *omap_irq_base;
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static void __init omap_common_init_early(void)
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{
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omap2_check_revision();
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omap_sram_init();
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}
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static void __init omap_hwmod_init_postsetup(void)
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@ -449,11 +433,12 @@ void __init omap4430_init_early(void)
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void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
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struct omap_sdrc_params *sdrc_cs1)
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{
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omap_sram_init();
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if (cpu_is_omap24xx() || omap3_has_sdrc()) {
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omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
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_omap2_init_reprogram_sdrc();
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}
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}
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/*
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@ -1,7 +0,0 @@
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#ifndef __MACH_OMAP2_IO_H__
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#define __MACH_OMAP2_IO_H__
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extern int __init omap_sram_init(void);
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#endif /* __MACH_OMAP2_IO_H__ */
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@ -55,6 +55,8 @@ void am35xx_init_early(void);
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void ti816x_init_early(void);
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void omap4430_init_early(void);
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void omap_sram_init(void);
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/*
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* IO bases for various OMAP processors
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* Except the tap base, rest all the io bases
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@ -38,16 +38,9 @@
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#endif
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#define OMAP1_SRAM_PA 0x20000000
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#define OMAP1_SRAM_VA VMALLOC_END
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#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
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#define OMAP2_SRAM_VA 0xfe400000
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#define OMAP2_SRAM_PUB_VA (OMAP2_SRAM_VA + 0x800)
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#define OMAP3_SRAM_VA 0xfe400000
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#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000)
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#define OMAP3_SRAM_PUB_VA (OMAP3_SRAM_VA + 0x8000)
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#define OMAP4_SRAM_VA 0xfe400000
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#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000)
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#define OMAP4_SRAM_PUB_VA (OMAP4_SRAM_VA + 0x4000)
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#if defined(CONFIG_ARCH_OMAP2PLUS)
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#define SRAM_BOOTLOADER_SZ 0x00
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@ -70,9 +63,9 @@
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#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
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static unsigned long omap_sram_start;
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static unsigned long omap_sram_base;
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static void __iomem *omap_sram_base;
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static unsigned long omap_sram_size;
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static unsigned long omap_sram_ceil;
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static void __iomem *omap_sram_ceil;
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/*
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* Depending on the target RAMFS firewall setup, the public usable amount of
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@ -112,7 +105,6 @@ static void __init omap_detect_sram(void)
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if (cpu_class_is_omap2()) {
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if (is_sram_locked()) {
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if (cpu_is_omap34xx()) {
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omap_sram_base = OMAP3_SRAM_PUB_VA;
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omap_sram_start = OMAP3_SRAM_PUB_PA;
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if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
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(omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
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@ -121,25 +113,20 @@ static void __init omap_detect_sram(void)
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omap_sram_size = 0x8000; /* 32K */
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}
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} else if (cpu_is_omap44xx()) {
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omap_sram_base = OMAP4_SRAM_PUB_VA;
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omap_sram_start = OMAP4_SRAM_PUB_PA;
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omap_sram_size = 0xa000; /* 40K */
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} else {
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omap_sram_base = OMAP2_SRAM_PUB_VA;
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omap_sram_start = OMAP2_SRAM_PUB_PA;
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omap_sram_size = 0x800; /* 2K */
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}
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} else {
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if (cpu_is_omap34xx()) {
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omap_sram_base = OMAP3_SRAM_VA;
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omap_sram_start = OMAP3_SRAM_PA;
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omap_sram_size = 0x10000; /* 64K */
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} else if (cpu_is_omap44xx()) {
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omap_sram_base = OMAP4_SRAM_VA;
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omap_sram_start = OMAP4_SRAM_PA;
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omap_sram_size = 0xe000; /* 56K */
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} else {
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omap_sram_base = OMAP2_SRAM_VA;
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omap_sram_start = OMAP2_SRAM_PA;
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if (cpu_is_omap242x())
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omap_sram_size = 0xa0000; /* 640K */
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@ -148,7 +135,6 @@ static void __init omap_detect_sram(void)
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}
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}
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} else {
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omap_sram_base = OMAP1_SRAM_VA;
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omap_sram_start = OMAP1_SRAM_PA;
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if (cpu_is_omap7xx())
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@ -165,24 +151,14 @@ static void __init omap_detect_sram(void)
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omap_sram_size = 0x4000;
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}
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}
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omap_sram_ceil = omap_sram_base + omap_sram_size;
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}
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static struct map_desc omap_sram_io_desc[] __initdata = {
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{ /* .length gets filled in at runtime */
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.virtual = OMAP1_SRAM_VA,
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.pfn = __phys_to_pfn(OMAP1_SRAM_PA),
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.type = MT_MEMORY
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}
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};
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/*
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* Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
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*/
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static void __init omap_map_sram(void)
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{
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unsigned long base;
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int cached = 1;
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if (omap_sram_size == 0)
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return;
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@ -195,28 +171,18 @@ static void __init omap_map_sram(void)
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* the ARM may attempt to write cache lines back to SDRAM
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* which will cause the system to hang.
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*/
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omap_sram_io_desc[0].type = MT_MEMORY_NONCACHED;
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cached = 0;
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}
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omap_sram_io_desc[0].virtual = omap_sram_base;
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base = omap_sram_start;
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base = ROUND_DOWN(base, PAGE_SIZE);
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omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
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omap_sram_io_desc[0].length = ROUND_DOWN(omap_sram_size, PAGE_SIZE);
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iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
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omap_sram_start = ROUND_DOWN(omap_sram_start, PAGE_SIZE);
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omap_sram_base = __arm_ioremap_exec(omap_sram_start, omap_sram_size,
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cached);
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if (!omap_sram_base) {
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pr_err("SRAM: Could not map\n");
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return;
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}
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pr_info("SRAM: Mapped pa 0x%08llx to va 0x%08lx size: 0x%lx\n",
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(long long) __pfn_to_phys(omap_sram_io_desc[0].pfn),
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omap_sram_io_desc[0].virtual,
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omap_sram_io_desc[0].length);
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/*
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* Normally devicemaps_init() would flush caches and tlb after
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* mdesc->map_io(), but since we're called from map_io(), we
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* must do it here.
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*/
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local_flush_tlb_all();
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flush_cache_all();
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omap_sram_ceil = omap_sram_base + omap_sram_size;
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/*
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* Looks like we need to preserve some bootloader code at the
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@ -235,13 +201,18 @@ static void __init omap_map_sram(void)
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*/
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void *omap_sram_push_address(unsigned long size)
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{
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if (size > (omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ))) {
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unsigned long available, new_ceil = (unsigned long)omap_sram_ceil;
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available = omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ);
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if (size > available) {
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pr_err("Not enough space in SRAM\n");
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return NULL;
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}
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omap_sram_ceil -= size;
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omap_sram_ceil = ROUND_DOWN(omap_sram_ceil, FNCPY_ALIGN);
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new_ceil -= size;
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new_ceil = ROUND_DOWN(new_ceil, FNCPY_ALIGN);
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omap_sram_ceil = IOMEM(new_ceil);
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return (void *)omap_sram_ceil;
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}
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