pinctrl/coh901: use irqdomain, allocate irqdescs
This switches the COH 901 pinctrl driver to allocate its GPIO IRQs dynamically, and start to use a linear irqdomain to map from the hardware IRQs. This way we can cut away the complex allocation of IRQ numbers from the <mach/irqs.h> file. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Linus Walleij
parent
d4a31ee899
commit
a6c45b99a6
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@ -1445,7 +1445,6 @@ static struct platform_device pinctrl_device = {
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static struct u300_gpio_platform u300_gpio_plat = {
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.ports = 7,
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.gpio_base = 0,
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.gpio_irq_base = IRQ_U300_GPIO_BASE,
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.pinctrl_device = &pinctrl_device,
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};
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@ -77,14 +77,4 @@
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#define IRQ_U300_GPIO_PORT6 87
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#define U300_VIC_IRQS_END 88
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/* Maximum 8*7 GPIO lines */
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#ifdef CONFIG_PINCTRL_COH901
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#define IRQ_U300_GPIO_BASE (U300_VIC_IRQS_END)
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#define IRQ_U300_GPIO_END (IRQ_U300_GPIO_BASE + 56)
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#else
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#define IRQ_U300_GPIO_END (U300_VIC_IRQS_END)
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#endif
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#define NR_IRQS_U300 (IRQ_U300_GPIO_END - IRQ_U300_INTCON0_START)
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#endif
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@ -13,6 +13,7 @@
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/io.h>
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#include <linux/irqdomain.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/platform_device.h>
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@ -67,7 +68,6 @@ struct u300_gpio {
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struct resource *memres;
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void __iomem *base;
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struct device *dev;
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int irq_base;
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u32 stride;
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/* Register offsets */
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u32 pcr;
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@ -83,6 +83,7 @@ struct u300_gpio_port {
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struct list_head node;
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struct u300_gpio *gpio;
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char name[8];
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struct irq_domain *domain;
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int irq;
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int number;
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u8 toggle_edge_mode;
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@ -314,10 +315,30 @@ static int u300_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
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static int u300_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
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{
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struct u300_gpio *gpio = to_u300_gpio(chip);
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int retirq = gpio->irq_base + offset;
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int portno = offset >> 3;
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struct u300_gpio_port *port = NULL;
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struct list_head *p;
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int retirq;
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dev_dbg(gpio->dev, "request IRQ for GPIO %d, return %d\n", offset,
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retirq);
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list_for_each(p, &gpio->port_list) {
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port = list_entry(p, struct u300_gpio_port, node);
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if (port->number == portno)
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break;
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}
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if (port == NULL) {
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dev_err(gpio->dev, "could not locate port for GPIO %d IRQ\n",
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offset);
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return -EINVAL;
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}
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/*
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* The local hwirqs on the port are the lower three bits, there
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* are exactly 8 IRQs per port since they are 8-bit
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*/
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retirq = irq_find_mapping(port->domain, (offset & 0x7));
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dev_dbg(gpio->dev, "request IRQ for GPIO %d, return %d from port %d\n",
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offset, retirq, port->number);
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return retirq;
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}
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@ -467,7 +488,7 @@ static int u300_gpio_irq_type(struct irq_data *d, unsigned trigger)
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{
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struct u300_gpio_port *port = irq_data_get_irq_chip_data(d);
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struct u300_gpio *gpio = port->gpio;
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int offset = d->irq - gpio->irq_base;
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int offset = (port->number << 3) + d->hwirq;
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u32 val;
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if ((trigger & IRQF_TRIGGER_RISING) &&
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@ -503,10 +524,12 @@ static void u300_gpio_irq_enable(struct irq_data *d)
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{
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struct u300_gpio_port *port = irq_data_get_irq_chip_data(d);
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struct u300_gpio *gpio = port->gpio;
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int offset = d->irq - gpio->irq_base;
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int offset = (port->number << 3) + d->hwirq;
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u32 val;
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unsigned long flags;
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dev_dbg(gpio->dev, "enable IRQ for hwirq %lu on port %s, offset %d\n",
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d->hwirq, port->name, offset);
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local_irq_save(flags);
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val = readl(U300_PIN_REG(offset, ien));
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writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, ien));
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@ -517,7 +540,7 @@ static void u300_gpio_irq_disable(struct irq_data *d)
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{
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struct u300_gpio_port *port = irq_data_get_irq_chip_data(d);
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struct u300_gpio *gpio = port->gpio;
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int offset = d->irq - gpio->irq_base;
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int offset = (port->number << 3) + d->hwirq;
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u32 val;
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unsigned long flags;
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@ -555,8 +578,7 @@ static void u300_gpio_irq_handler(unsigned irq, struct irq_desc *desc)
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int irqoffset;
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for_each_set_bit(irqoffset, &val, U300_GPIO_PINS_PER_PORT) {
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int pin_irq = gpio->irq_base + (port->number << 3)
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+ irqoffset;
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int pin_irq = irq_find_mapping(port->domain, irqoffset);
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int offset = pinoffset + irqoffset;
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dev_dbg(gpio->dev, "GPIO IRQ %d on pin %d\n",
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@ -631,6 +653,8 @@ static inline void u300_gpio_free_ports(struct u300_gpio *gpio)
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list_for_each_safe(p, n, &gpio->port_list) {
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port = list_entry(p, struct u300_gpio_port, node);
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list_del(&port->node);
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if (port->domain)
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irq_domain_remove(port->domain);
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kfree(port);
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}
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}
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@ -653,7 +677,6 @@ static int __init u300_gpio_probe(struct platform_device *pdev)
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gpio->chip = u300_gpio_chip;
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gpio->chip.ngpio = plat->ports * U300_GPIO_PINS_PER_PORT;
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gpio->irq_base = plat->gpio_irq_base;
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gpio->chip.dev = &pdev->dev;
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gpio->chip.base = plat->gpio_base;
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gpio->dev = &pdev->dev;
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@ -732,18 +755,26 @@ static int __init u300_gpio_probe(struct platform_device *pdev)
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port->irq = platform_get_irq_byname(pdev,
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port->name);
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dev_dbg(gpio->dev, "register IRQ %d for %s\n", port->irq,
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dev_dbg(gpio->dev, "register IRQ %d for port %s\n", port->irq,
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port->name);
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port->domain = irq_domain_add_linear(pdev->dev.of_node,
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U300_GPIO_PINS_PER_PORT,
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&irq_domain_simple_ops,
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port);
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if (!port->domain)
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goto err_no_domain;
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irq_set_chained_handler(port->irq, u300_gpio_irq_handler);
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irq_set_handler_data(port->irq, port);
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/* For each GPIO pin set the unique IRQ handler */
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for (i = 0; i < U300_GPIO_PINS_PER_PORT; i++) {
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int irqno = gpio->irq_base + (portno << 3) + i;
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int irqno = irq_create_mapping(port->domain, i);
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dev_dbg(gpio->dev, "handler for IRQ %d on %s\n",
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irqno, port->name);
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dev_dbg(gpio->dev, "GPIO%d on port %s gets IRQ %d\n",
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gpio->chip.base + (port->number << 3) + i,
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port->name, irqno);
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irq_set_chip_and_handler(irqno, &u300_gpio_irqchip,
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handle_simple_irq);
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set_irq_flags(irqno, IRQF_VALID);
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@ -776,6 +807,7 @@ static int __init u300_gpio_probe(struct platform_device *pdev)
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err_no_pinctrl:
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err = gpiochip_remove(&gpio->chip);
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err_no_chip:
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err_no_domain:
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err_no_port:
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u300_gpio_free_ports(gpio);
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iounmap(gpio->base);
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@ -13,13 +13,11 @@
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* struct u300_gpio_platform - U300 GPIO platform data
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* @ports: number of GPIO block ports
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* @gpio_base: first GPIO number for this block (use a free range)
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* @gpio_irq_base: first GPIO IRQ number for this block (use a free range)
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* @pinctrl_device: pin control device to spawn as child
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*/
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struct u300_gpio_platform {
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u8 ports;
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int gpio_base;
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int gpio_irq_base;
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struct platform_device *pinctrl_device;
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};
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