ARM: 5757/1: Thumb-2: Correct "mov.w pc, lr" instruction which is unpredictable
The 32-bit wide variant of "mov pc, reg" in Thumb-2 is unpredictable causing improper handling of the undefined instructions not caught by the kernel. This patch adds a movw_pc macro for such situations (currently only used in call_fpe). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -608,33 +608,33 @@ call_fpe:
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THUMB( add pc, r8 )
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nop
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W(mov) pc, lr @ CP#0
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movw_pc lr @ CP#0
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W(b) do_fpe @ CP#1 (FPE)
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W(b) do_fpe @ CP#2 (FPE)
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W(mov) pc, lr @ CP#3
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movw_pc lr @ CP#3
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#ifdef CONFIG_CRUNCH
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b crunch_task_enable @ CP#4 (MaverickCrunch)
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b crunch_task_enable @ CP#5 (MaverickCrunch)
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b crunch_task_enable @ CP#6 (MaverickCrunch)
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#else
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W(mov) pc, lr @ CP#4
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W(mov) pc, lr @ CP#5
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W(mov) pc, lr @ CP#6
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movw_pc lr @ CP#4
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movw_pc lr @ CP#5
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movw_pc lr @ CP#6
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#endif
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W(mov) pc, lr @ CP#7
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W(mov) pc, lr @ CP#8
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W(mov) pc, lr @ CP#9
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movw_pc lr @ CP#7
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movw_pc lr @ CP#8
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movw_pc lr @ CP#9
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#ifdef CONFIG_VFP
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W(b) do_vfp @ CP#10 (VFP)
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W(b) do_vfp @ CP#11 (VFP)
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#else
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W(mov) pc, lr @ CP#10 (VFP)
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W(mov) pc, lr @ CP#11 (VFP)
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movw_pc lr @ CP#10 (VFP)
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movw_pc lr @ CP#11 (VFP)
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#endif
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W(mov) pc, lr @ CP#12
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W(mov) pc, lr @ CP#13
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W(mov) pc, lr @ CP#14 (Debug)
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W(mov) pc, lr @ CP#15 (Control)
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movw_pc lr @ CP#12
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movw_pc lr @ CP#13
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movw_pc lr @ CP#14 (Debug)
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movw_pc lr @ CP#15 (Control)
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#ifdef CONFIG_NEON
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.align 6
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@ -110,6 +110,13 @@
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mov \rd, sp, lsr #13
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mov \rd, \rd, lsl #13
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.endm
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@
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@ 32-bit wide "mov pc, reg"
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@
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.macro movw_pc, reg
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mov pc, \reg
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.endm
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#else /* CONFIG_THUMB2_KERNEL */
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.macro svc_exit, rpsr
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clrex @ clear the exclusive monitor
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@ -146,6 +153,14 @@
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lsr \rd, \rd, #13
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mov \rd, \rd, lsl #13
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.endm
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@
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@ 32-bit wide "mov pc, reg"
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@
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.macro movw_pc, reg
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mov pc, \reg
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nop
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.endm
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#endif /* !CONFIG_THUMB2_KERNEL */
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/*
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