Merge back earlier powercap material for v4.8.
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commit
a8165a21b7
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@ -336,14 +336,14 @@ static int release_zone(struct powercap_zone *power_zone)
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static int find_nr_power_limit(struct rapl_domain *rd)
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{
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int i;
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int i, nr_pl = 0;
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for (i = 0; i < NR_POWER_LIMITS; i++) {
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if (rd->rpl[i].name == NULL)
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break;
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if (rd->rpl[i].name)
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nr_pl++;
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}
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return i;
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return nr_pl;
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}
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static int set_domain_enable(struct powercap_zone *power_zone, bool mode)
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@ -426,15 +426,38 @@ static const struct powercap_zone_ops zone_ops[] = {
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},
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};
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static int set_power_limit(struct powercap_zone *power_zone, int id,
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/*
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* Constraint index used by powercap can be different than power limit (PL)
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* index in that some PLs maybe missing due to non-existant MSRs. So we
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* need to convert here by finding the valid PLs only (name populated).
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*/
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static int contraint_to_pl(struct rapl_domain *rd, int cid)
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{
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int i, j;
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for (i = 0, j = 0; i < NR_POWER_LIMITS; i++) {
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if ((rd->rpl[i].name) && j++ == cid) {
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pr_debug("%s: index %d\n", __func__, i);
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return i;
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}
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}
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return -EINVAL;
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}
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static int set_power_limit(struct powercap_zone *power_zone, int cid,
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u64 power_limit)
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{
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struct rapl_domain *rd;
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struct rapl_package *rp;
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int ret = 0;
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int id;
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get_online_cpus();
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rd = power_zone_to_rapl_domain(power_zone);
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id = contraint_to_pl(rd, cid);
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rp = rd->rp;
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if (rd->state & DOMAIN_STATE_BIOS_LOCKED) {
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@ -461,16 +484,18 @@ set_exit:
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return ret;
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}
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static int get_current_power_limit(struct powercap_zone *power_zone, int id,
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static int get_current_power_limit(struct powercap_zone *power_zone, int cid,
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u64 *data)
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{
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struct rapl_domain *rd;
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u64 val;
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int prim;
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int ret = 0;
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int id;
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get_online_cpus();
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rd = power_zone_to_rapl_domain(power_zone);
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id = contraint_to_pl(rd, cid);
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switch (rd->rpl[id].prim_id) {
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case PL1_ENABLE:
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prim = POWER_LIMIT1;
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@ -492,14 +517,17 @@ static int get_current_power_limit(struct powercap_zone *power_zone, int id,
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return ret;
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}
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static int set_time_window(struct powercap_zone *power_zone, int id,
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static int set_time_window(struct powercap_zone *power_zone, int cid,
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u64 window)
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{
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struct rapl_domain *rd;
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int ret = 0;
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int id;
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get_online_cpus();
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rd = power_zone_to_rapl_domain(power_zone);
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id = contraint_to_pl(rd, cid);
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switch (rd->rpl[id].prim_id) {
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case PL1_ENABLE:
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rapl_write_data_raw(rd, TIME_WINDOW1, window);
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@ -514,14 +542,17 @@ static int set_time_window(struct powercap_zone *power_zone, int id,
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return ret;
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}
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static int get_time_window(struct powercap_zone *power_zone, int id, u64 *data)
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static int get_time_window(struct powercap_zone *power_zone, int cid, u64 *data)
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{
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struct rapl_domain *rd;
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u64 val;
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int ret = 0;
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int id;
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get_online_cpus();
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rd = power_zone_to_rapl_domain(power_zone);
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id = contraint_to_pl(rd, cid);
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switch (rd->rpl[id].prim_id) {
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case PL1_ENABLE:
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ret = rapl_read_data_raw(rd, TIME_WINDOW1, true, &val);
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@ -540,15 +571,17 @@ static int get_time_window(struct powercap_zone *power_zone, int id, u64 *data)
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return ret;
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}
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static const char *get_constraint_name(struct powercap_zone *power_zone, int id)
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static const char *get_constraint_name(struct powercap_zone *power_zone, int cid)
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{
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struct rapl_power_limit *rpl;
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struct rapl_domain *rd;
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int id;
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rd = power_zone_to_rapl_domain(power_zone);
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rpl = (struct rapl_power_limit *) &rd->rpl[id];
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id = contraint_to_pl(rd, cid);
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if (id >= 0)
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return rd->rpl[id].name;
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return rpl->name;
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return NULL;
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}
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@ -1381,6 +1414,37 @@ static int rapl_check_domain(int cpu, int domain)
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return 0;
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}
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/*
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* Check if power limits are available. Two cases when they are not available:
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* 1. Locked by BIOS, in this case we still provide read-only access so that
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* users can see what limit is set by the BIOS.
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* 2. Some CPUs make some domains monitoring only which means PLx MSRs may not
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* exist at all. In this case, we do not show the contraints in powercap.
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*
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* Called after domains are detected and initialized.
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*/
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static void rapl_detect_powerlimit(struct rapl_domain *rd)
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{
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u64 val64;
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int i;
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/* check if the domain is locked by BIOS, ignore if MSR doesn't exist */
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if (!rapl_read_data_raw(rd, FW_LOCK, false, &val64)) {
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if (val64) {
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pr_info("RAPL package %d domain %s locked by BIOS\n",
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rd->rp->id, rd->name);
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rd->state |= DOMAIN_STATE_BIOS_LOCKED;
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}
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}
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/* check if power limit MSRs exists, otherwise domain is monitoring only */
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for (i = 0; i < NR_POWER_LIMITS; i++) {
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int prim = rd->rpl[i].prim_id;
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if (rapl_read_data_raw(rd, prim, false, &val64))
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rd->rpl[i].name = NULL;
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}
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}
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/* Detect active and valid domains for the given CPU, caller must
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* ensure the CPU belongs to the targeted package and CPU hotlug is disabled.
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*/
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@ -1389,7 +1453,6 @@ static int rapl_detect_domains(struct rapl_package *rp, int cpu)
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int i;
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int ret = 0;
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struct rapl_domain *rd;
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u64 locked;
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for (i = 0; i < RAPL_DOMAIN_MAX; i++) {
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/* use physical package id to read counters */
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@ -1400,7 +1463,7 @@ static int rapl_detect_domains(struct rapl_package *rp, int cpu)
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}
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rp->nr_domains = bitmap_weight(&rp->domain_map, RAPL_DOMAIN_MAX);
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if (!rp->nr_domains) {
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pr_err("no valid rapl domains found in package %d\n", rp->id);
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pr_debug("no valid rapl domains found in package %d\n", rp->id);
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ret = -ENODEV;
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goto done;
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}
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@ -1414,17 +1477,9 @@ static int rapl_detect_domains(struct rapl_package *rp, int cpu)
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}
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rapl_init_domains(rp);
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for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) {
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/* check if the domain is locked by BIOS */
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ret = rapl_read_data_raw(rd, FW_LOCK, false, &locked);
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if (ret)
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return ret;
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if (locked) {
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pr_info("RAPL package %d domain %s locked by BIOS\n",
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rp->id, rd->name);
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rd->state |= DOMAIN_STATE_BIOS_LOCKED;
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}
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}
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for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++)
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rapl_detect_powerlimit(rd);
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done:
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