[PATCH] ARM: 2831/1: S3C2440 - split s3c2440 clocks from central clock code
Patch from Ben Dooks Split the s3c2440 specific clocks from the arch clock support, to make the code clearer. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -24,6 +24,7 @@ obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o
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obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o
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obj-$(CONFIG_CPU_S3C2440) += s3c2440-irq.o
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obj-$(CONFIG_CPU_S3C2440) += s3c2440-clock.o
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# machine specific support
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@ -448,60 +448,3 @@ int __init s3c24xx_setup_clocks(unsigned long xtal,
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return 0;
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}
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/* S3C2440 extended clock support */
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#ifdef CONFIG_CPU_S3C2440
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static struct clk s3c2440_clk_upll = {
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.name = "upll",
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.id = -1,
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};
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static struct clk s3c2440_clk_cam = {
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.name = "camif",
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.parent = &clk_h,
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.id = -1,
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.enable = s3c24xx_clkcon_enable,
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.ctrlbit = S3C2440_CLKCON_CAMERA,
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};
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static struct clk s3c2440_clk_ac97 = {
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.name = "ac97",
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.parent = &clk_p,
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.id = -1,
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.enable = s3c24xx_clkcon_enable,
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.ctrlbit = S3C2440_CLKCON_CAMERA,
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};
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static int s3c2440_clk_add(struct sys_device *sysdev)
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{
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unsigned long upllcon = __raw_readl(S3C2410_UPLLCON);
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s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal.rate);
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printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz\n",
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print_mhz(s3c2440_clk_upll.rate));
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s3c24xx_register_clock(&s3c2440_clk_ac97);
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s3c24xx_register_clock(&s3c2440_clk_cam);
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s3c24xx_register_clock(&s3c2440_clk_upll);
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clk_disable(&s3c2440_clk_ac97);
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clk_disable(&s3c2440_clk_cam);
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return 0;
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}
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static struct sysdev_driver s3c2440_clk_driver = {
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.add = s3c2440_clk_add,
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};
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static int s3c24xx_clk_driver(void)
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{
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return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_clk_driver);
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}
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arch_initcall(s3c24xx_clk_driver);
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#endif /* CONFIG_CPU_S3C2440 */
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@ -0,0 +1,116 @@
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/* linux/arch/arm/mach-s3c2410/s3c2440-clock.c
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*
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* Copyright (c) 2004-2005 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C2440 Clock support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/device.h>
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#include <linux/sysdev.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <asm/hardware.h>
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#include <asm/atomic.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <asm/hardware/clock.h>
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#include <asm/arch/regs-clock.h>
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#include "clock.h"
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#include "cpu.h"
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/* S3C2440 extended clock support */
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static struct clk s3c2440_clk_upll = {
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.name = "upll",
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.id = -1,
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};
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static struct clk s3c2440_clk_cam = {
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.name = "camif",
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.id = -1,
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.enable = s3c24xx_clkcon_enable,
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.ctrlbit = S3C2440_CLKCON_CAMERA,
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};
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static struct clk s3c2440_clk_ac97 = {
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.name = "ac97",
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.id = -1,
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.enable = s3c24xx_clkcon_enable,
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.ctrlbit = S3C2440_CLKCON_CAMERA,
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};
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static int s3c2440_clk_add(struct sys_device *sysdev)
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{
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unsigned long upllcon = __raw_readl(S3C2410_UPLLCON);
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struct clk *clk_h;
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struct clk *clk_p;
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struct clk *clk_xtal;
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clk_xtal = clk_get(NULL, "xtal");
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if (IS_ERR(clk_xtal)) {
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printk(KERN_ERR "S3C2440: Failed to get clk_xtal\n");
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return -EINVAL;
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}
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s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal->rate);
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printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz\n",
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print_mhz(s3c2440_clk_upll.rate));
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clk_p = clk_get(NULL, "pclk");
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clk_h = clk_get(NULL, "hclk");
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if (IS_ERR(clk_p) || IS_ERR(clk_h)) {
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printk(KERN_ERR "S3C2440: Failed to get parent clocks\n");
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return -EINVAL;
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}
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s3c2440_clk_cam.parent = clk_h;
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s3c2440_clk_ac97.parent = clk_p;
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s3c24xx_register_clock(&s3c2440_clk_ac97);
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s3c24xx_register_clock(&s3c2440_clk_cam);
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s3c24xx_register_clock(&s3c2440_clk_upll);
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clk_disable(&s3c2440_clk_ac97);
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clk_disable(&s3c2440_clk_cam);
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return 0;
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}
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static struct sysdev_driver s3c2440_clk_driver = {
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.add = s3c2440_clk_add,
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};
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static __init int s3c24xx_clk_driver(void)
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{
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return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_clk_driver);
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}
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arch_initcall(s3c24xx_clk_driver);
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