OMAP: split plat-omap/common.c
Split plat-omap/common.c into three pieces: 1. the 32KiHz sync timer and clocksource code, which now lives in plat-omap/counter_32k.c; 2. the OMAP2+ common code, which has been moved to mach-omap2/common.c; 3. and the remainder of the OMAP-wide common code, which includes the deprecated ATAGs code and a deprecated video RAM reservation function. The primary motivation for doing this is to move the OMAP2+-specific parts into an OMAP2+-specific file, so that build breakage related to the System Control Module code can be resolved. Benoît Cousson <b-cousson@ti.com> suggested a new filename and found some bugs in the counter_32k.c comments - thanks Benoît. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com>
This commit is contained in:
Paul Walmsley
parent
d13586574d
commit
aa218dafd7
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@ -3,7 +3,8 @@
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#
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# Common support
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obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o
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obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o \
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common.o
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omap-2-3-common = irq.o sdrc.o prm2xxx_3xxx.o
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hwmod-common = omap_hwmod.o \
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@ -0,0 +1,135 @@
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/*
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* linux/arch/arm/mach-omap2/common.c
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*
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* Code common to all OMAP2+ machines.
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*
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* Copyright (C) 2009 Texas Instruments
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* Copyright (C) 2010 Nokia Corporation
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* Tony Lindgren <tony@atomide.com>
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* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <plat/common.h>
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#include <plat/board.h>
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#include <plat/control.h>
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#include <plat/mux.h>
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#include <plat/clock.h>
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#include "sdrc.h"
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/* Global address base setup code */
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
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static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
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{
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omap2_set_globals_tap(omap2_globals);
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omap2_set_globals_sdrc(omap2_globals);
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omap2_set_globals_control(omap2_globals);
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omap2_set_globals_prcm(omap2_globals);
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}
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#endif
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#if defined(CONFIG_ARCH_OMAP2420)
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static struct omap_globals omap242x_globals = {
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.class = OMAP242X_CLASS,
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.tap = OMAP2_L4_IO_ADDRESS(0x48014000),
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.sdrc = OMAP2420_SDRC_BASE,
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.sms = OMAP2420_SMS_BASE,
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.ctrl = OMAP242X_CTRL_BASE,
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.prm = OMAP2420_PRM_BASE,
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.cm = OMAP2420_CM_BASE,
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.uart1_phys = OMAP2_UART1_BASE,
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.uart2_phys = OMAP2_UART2_BASE,
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.uart3_phys = OMAP2_UART3_BASE,
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};
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void __init omap2_set_globals_242x(void)
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{
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__omap2_set_globals(&omap242x_globals);
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}
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#endif
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#if defined(CONFIG_ARCH_OMAP2430)
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static struct omap_globals omap243x_globals = {
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.class = OMAP243X_CLASS,
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.tap = OMAP2_L4_IO_ADDRESS(0x4900a000),
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.sdrc = OMAP243X_SDRC_BASE,
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.sms = OMAP243X_SMS_BASE,
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.ctrl = OMAP243X_CTRL_BASE,
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.prm = OMAP2430_PRM_BASE,
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.cm = OMAP2430_CM_BASE,
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.uart1_phys = OMAP2_UART1_BASE,
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.uart2_phys = OMAP2_UART2_BASE,
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.uart3_phys = OMAP2_UART3_BASE,
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};
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void __init omap2_set_globals_243x(void)
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{
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__omap2_set_globals(&omap243x_globals);
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}
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#endif
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#if defined(CONFIG_ARCH_OMAP3)
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static struct omap_globals omap3_globals = {
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.class = OMAP343X_CLASS,
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.tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
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.sdrc = OMAP343X_SDRC_BASE,
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.sms = OMAP343X_SMS_BASE,
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.ctrl = OMAP343X_CTRL_BASE,
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.prm = OMAP3430_PRM_BASE,
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.cm = OMAP3430_CM_BASE,
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.uart1_phys = OMAP3_UART1_BASE,
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.uart2_phys = OMAP3_UART2_BASE,
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.uart3_phys = OMAP3_UART3_BASE,
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.uart4_phys = OMAP3_UART4_BASE, /* Only on 3630 */
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};
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void __init omap2_set_globals_3xxx(void)
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{
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__omap2_set_globals(&omap3_globals);
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}
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void __init omap3_map_io(void)
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{
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omap2_set_globals_3xxx();
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omap34xx_map_common_io();
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}
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#endif
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#if defined(CONFIG_ARCH_OMAP4)
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static struct omap_globals omap4_globals = {
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.class = OMAP443X_CLASS,
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.tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
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.ctrl = OMAP443X_SCM_BASE,
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.ctrl_pad = OMAP443X_CTRL_BASE,
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.prm = OMAP4430_PRM_BASE,
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.cm = OMAP4430_CM_BASE,
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.cm2 = OMAP4430_CM2_BASE,
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.uart1_phys = OMAP4_UART1_BASE,
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.uart2_phys = OMAP4_UART2_BASE,
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.uart3_phys = OMAP4_UART3_BASE,
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.uart4_phys = OMAP4_UART4_BASE,
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};
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void __init omap2_set_globals_443x(void)
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{
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omap2_set_globals_tap(&omap4_globals);
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omap2_set_globals_control(&omap4_globals);
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omap2_set_globals_prcm(&omap4_globals);
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}
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#endif
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@ -4,7 +4,7 @@
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# Common support
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obj-y := common.o sram.o clock.o devices.o dma.o mux.o gpio.o \
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usb.o fb.o io.o
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usb.o fb.o io.o counter_32k.o
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obj-m :=
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obj-n :=
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obj- :=
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@ -11,38 +11,15 @@
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/console.h>
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#include <linux/serial.h>
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#include <linux/tty.h>
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#include <linux/serial_8250.h>
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#include <linux/serial_reg.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/omapfb.h>
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#include <mach/hardware.h>
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#include <asm/system.h>
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#include <asm/pgtable.h>
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#include <asm/mach/map.h>
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#include <asm/setup.h>
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#include <plat/common.h>
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#include <plat/board.h>
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#include <plat/control.h>
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#include <plat/mux.h>
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#include <plat/fpga.h>
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#include <plat/serial.h>
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#include <plat/vram.h>
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#include <plat/clock.h>
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
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# include "../mach-omap2/sdrc.h"
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#endif
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#define NO_LENGTH_CHECK 0xffffffff
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@ -88,255 +65,3 @@ void __init omap_reserve(void)
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omapfb_reserve_sdram_memblock();
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omap_vram_reserve_sdram_memblock();
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}
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/*
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* 32KHz clocksource ... always available, on pretty most chips except
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* OMAP 730 and 1510. Other timers could be used as clocksources, with
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* higher resolution in free-running counter modes (e.g. 12 MHz xtal),
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* but systems won't necessarily want to spend resources that way.
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*/
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#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
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#if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))
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#include <linux/clocksource.h>
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/*
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* offset_32k holds the init time counter value. It is then subtracted
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* from every counter read to achieve a counter that counts time from the
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* kernel boot (needed for sched_clock()).
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*/
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static u32 offset_32k __read_mostly;
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#ifdef CONFIG_ARCH_OMAP16XX
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static cycle_t omap16xx_32k_read(struct clocksource *cs)
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{
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return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k;
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}
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#else
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#define omap16xx_32k_read NULL
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#endif
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#ifdef CONFIG_ARCH_OMAP2420
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static cycle_t omap2420_32k_read(struct clocksource *cs)
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{
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return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k;
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}
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#else
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#define omap2420_32k_read NULL
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#endif
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#ifdef CONFIG_ARCH_OMAP2430
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static cycle_t omap2430_32k_read(struct clocksource *cs)
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{
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return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k;
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}
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#else
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#define omap2430_32k_read NULL
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#endif
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#ifdef CONFIG_ARCH_OMAP3
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static cycle_t omap34xx_32k_read(struct clocksource *cs)
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{
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return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k;
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}
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#else
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#define omap34xx_32k_read NULL
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#endif
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#ifdef CONFIG_ARCH_OMAP4
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static cycle_t omap44xx_32k_read(struct clocksource *cs)
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{
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return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k;
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}
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#else
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#define omap44xx_32k_read NULL
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#endif
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/*
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* Kernel assumes that sched_clock can be called early but may not have
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* things ready yet.
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*/
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static cycle_t omap_32k_read_dummy(struct clocksource *cs)
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{
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return 0;
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}
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static struct clocksource clocksource_32k = {
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.name = "32k_counter",
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.rating = 250,
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.read = omap_32k_read_dummy,
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.mask = CLOCKSOURCE_MASK(32),
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.shift = 10,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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/*
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* Returns current time from boot in nsecs. It's OK for this to wrap
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* around for now, as it's just a relative time stamp.
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*/
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unsigned long long sched_clock(void)
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{
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return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k),
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clocksource_32k.mult, clocksource_32k.shift);
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}
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/**
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* read_persistent_clock - Return time from a persistent clock.
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*
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* Reads the time from a source which isn't disabled during PM, the
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* 32k sync timer. Convert the cycles elapsed since last read into
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* nsecs and adds to a monotonically increasing timespec.
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*/
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static struct timespec persistent_ts;
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static cycles_t cycles, last_cycles;
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void read_persistent_clock(struct timespec *ts)
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{
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unsigned long long nsecs;
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cycles_t delta;
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struct timespec *tsp = &persistent_ts;
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last_cycles = cycles;
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cycles = clocksource_32k.read(&clocksource_32k);
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delta = cycles - last_cycles;
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nsecs = clocksource_cyc2ns(delta,
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clocksource_32k.mult, clocksource_32k.shift);
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timespec_add_ns(tsp, nsecs);
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*ts = *tsp;
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}
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static int __init omap_init_clocksource_32k(void)
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{
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static char err[] __initdata = KERN_ERR
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"%s: can't register clocksource!\n";
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if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
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struct clk *sync_32k_ick;
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if (cpu_is_omap16xx())
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clocksource_32k.read = omap16xx_32k_read;
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else if (cpu_is_omap2420())
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clocksource_32k.read = omap2420_32k_read;
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else if (cpu_is_omap2430())
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clocksource_32k.read = omap2430_32k_read;
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else if (cpu_is_omap34xx())
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clocksource_32k.read = omap34xx_32k_read;
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else if (cpu_is_omap44xx())
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clocksource_32k.read = omap44xx_32k_read;
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else
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return -ENODEV;
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sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
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if (sync_32k_ick)
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clk_enable(sync_32k_ick);
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clocksource_32k.mult = clocksource_hz2mult(32768,
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clocksource_32k.shift);
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offset_32k = clocksource_32k.read(&clocksource_32k);
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if (clocksource_register(&clocksource_32k))
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printk(err, clocksource_32k.name);
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}
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return 0;
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}
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arch_initcall(omap_init_clocksource_32k);
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#endif /* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
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/* Global address base setup code */
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
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static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
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{
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omap2_set_globals_tap(omap2_globals);
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omap2_set_globals_sdrc(omap2_globals);
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omap2_set_globals_control(omap2_globals);
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omap2_set_globals_prcm(omap2_globals);
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}
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#endif
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#if defined(CONFIG_ARCH_OMAP2420)
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static struct omap_globals omap242x_globals = {
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.class = OMAP242X_CLASS,
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.tap = OMAP2_L4_IO_ADDRESS(0x48014000),
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.sdrc = OMAP2420_SDRC_BASE,
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.sms = OMAP2420_SMS_BASE,
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.ctrl = OMAP242X_CTRL_BASE,
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.prm = OMAP2420_PRM_BASE,
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.cm = OMAP2420_CM_BASE,
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};
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void __init omap2_set_globals_242x(void)
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{
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__omap2_set_globals(&omap242x_globals);
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}
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#endif
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#if defined(CONFIG_ARCH_OMAP2430)
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static struct omap_globals omap243x_globals = {
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.class = OMAP243X_CLASS,
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.tap = OMAP2_L4_IO_ADDRESS(0x4900a000),
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.sdrc = OMAP243X_SDRC_BASE,
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.sms = OMAP243X_SMS_BASE,
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.ctrl = OMAP243X_CTRL_BASE,
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.prm = OMAP2430_PRM_BASE,
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.cm = OMAP2430_CM_BASE,
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};
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void __init omap2_set_globals_243x(void)
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{
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__omap2_set_globals(&omap243x_globals);
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}
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#endif
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#if defined(CONFIG_ARCH_OMAP3)
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static struct omap_globals omap3_globals = {
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.class = OMAP343X_CLASS,
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.tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
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.sdrc = OMAP343X_SDRC_BASE,
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.sms = OMAP343X_SMS_BASE,
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.ctrl = OMAP343X_CTRL_BASE,
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.prm = OMAP3430_PRM_BASE,
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.cm = OMAP3430_CM_BASE,
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};
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void __init omap2_set_globals_3xxx(void)
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{
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__omap2_set_globals(&omap3_globals);
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}
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void __init omap3_map_io(void)
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{
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omap2_set_globals_3xxx();
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omap34xx_map_common_io();
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}
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#endif
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#if defined(CONFIG_ARCH_OMAP4)
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static struct omap_globals omap4_globals = {
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.class = OMAP443X_CLASS,
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.tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
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.ctrl = OMAP443X_SCM_BASE,
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.ctrl_pad = OMAP443X_CTRL_BASE,
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.prm = OMAP4430_PRM_BASE,
|
||||
.cm = OMAP4430_CM_BASE,
|
||||
.cm2 = OMAP4430_CM2_BASE,
|
||||
};
|
||||
|
||||
void __init omap2_set_globals_443x(void)
|
||||
{
|
||||
omap2_set_globals_tap(&omap4_globals);
|
||||
omap2_set_globals_control(&omap4_globals);
|
||||
omap2_set_globals_prcm(&omap4_globals);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,183 @@
|
|||
/*
|
||||
* OMAP 32ksynctimer/counter_32k-related code
|
||||
*
|
||||
* Copyright (C) 2009 Texas Instruments
|
||||
* Copyright (C) 2010 Nokia Corporation
|
||||
* Tony Lindgren <tony@atomide.com>
|
||||
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* NOTE: This timer is not the same timer as the old OMAP1 MPU timer.
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <plat/common.h>
|
||||
#include <plat/board.h>
|
||||
|
||||
#include <plat/clock.h>
|
||||
|
||||
|
||||
/*
|
||||
* 32KHz clocksource ... always available, on pretty most chips except
|
||||
* OMAP 730 and 1510. Other timers could be used as clocksources, with
|
||||
* higher resolution in free-running counter modes (e.g. 12 MHz xtal),
|
||||
* but systems won't necessarily want to spend resources that way.
|
||||
*/
|
||||
|
||||
#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
|
||||
|
||||
#if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))
|
||||
|
||||
#include <linux/clocksource.h>
|
||||
|
||||
/*
|
||||
* offset_32k holds the init time counter value. It is then subtracted
|
||||
* from every counter read to achieve a counter that counts time from the
|
||||
* kernel boot (needed for sched_clock()).
|
||||
*/
|
||||
static u32 offset_32k __read_mostly;
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP16XX
|
||||
static cycle_t omap16xx_32k_read(struct clocksource *cs)
|
||||
{
|
||||
return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k;
|
||||
}
|
||||
#else
|
||||
#define omap16xx_32k_read NULL
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2420
|
||||
static cycle_t omap2420_32k_read(struct clocksource *cs)
|
||||
{
|
||||
return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k;
|
||||
}
|
||||
#else
|
||||
#define omap2420_32k_read NULL
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2430
|
||||
static cycle_t omap2430_32k_read(struct clocksource *cs)
|
||||
{
|
||||
return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k;
|
||||
}
|
||||
#else
|
||||
#define omap2430_32k_read NULL
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP3
|
||||
static cycle_t omap34xx_32k_read(struct clocksource *cs)
|
||||
{
|
||||
return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k;
|
||||
}
|
||||
#else
|
||||
#define omap34xx_32k_read NULL
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP4
|
||||
static cycle_t omap44xx_32k_read(struct clocksource *cs)
|
||||
{
|
||||
return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k;
|
||||
}
|
||||
#else
|
||||
#define omap44xx_32k_read NULL
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Kernel assumes that sched_clock can be called early but may not have
|
||||
* things ready yet.
|
||||
*/
|
||||
static cycle_t omap_32k_read_dummy(struct clocksource *cs)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct clocksource clocksource_32k = {
|
||||
.name = "32k_counter",
|
||||
.rating = 250,
|
||||
.read = omap_32k_read_dummy,
|
||||
.mask = CLOCKSOURCE_MASK(32),
|
||||
.shift = 10,
|
||||
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||
};
|
||||
|
||||
/*
|
||||
* Returns current time from boot in nsecs. It's OK for this to wrap
|
||||
* around for now, as it's just a relative time stamp.
|
||||
*/
|
||||
unsigned long long sched_clock(void)
|
||||
{
|
||||
return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k),
|
||||
clocksource_32k.mult, clocksource_32k.shift);
|
||||
}
|
||||
|
||||
/**
|
||||
* read_persistent_clock - Return time from a persistent clock.
|
||||
*
|
||||
* Reads the time from a source which isn't disabled during PM, the
|
||||
* 32k sync timer. Convert the cycles elapsed since last read into
|
||||
* nsecs and adds to a monotonically increasing timespec.
|
||||
*/
|
||||
static struct timespec persistent_ts;
|
||||
static cycles_t cycles, last_cycles;
|
||||
void read_persistent_clock(struct timespec *ts)
|
||||
{
|
||||
unsigned long long nsecs;
|
||||
cycles_t delta;
|
||||
struct timespec *tsp = &persistent_ts;
|
||||
|
||||
last_cycles = cycles;
|
||||
cycles = clocksource_32k.read(&clocksource_32k);
|
||||
delta = cycles - last_cycles;
|
||||
|
||||
nsecs = clocksource_cyc2ns(delta,
|
||||
clocksource_32k.mult, clocksource_32k.shift);
|
||||
|
||||
timespec_add_ns(tsp, nsecs);
|
||||
*ts = *tsp;
|
||||
}
|
||||
|
||||
static int __init omap_init_clocksource_32k(void)
|
||||
{
|
||||
static char err[] __initdata = KERN_ERR
|
||||
"%s: can't register clocksource!\n";
|
||||
|
||||
if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
|
||||
struct clk *sync_32k_ick;
|
||||
|
||||
if (cpu_is_omap16xx())
|
||||
clocksource_32k.read = omap16xx_32k_read;
|
||||
else if (cpu_is_omap2420())
|
||||
clocksource_32k.read = omap2420_32k_read;
|
||||
else if (cpu_is_omap2430())
|
||||
clocksource_32k.read = omap2430_32k_read;
|
||||
else if (cpu_is_omap34xx())
|
||||
clocksource_32k.read = omap34xx_32k_read;
|
||||
else if (cpu_is_omap44xx())
|
||||
clocksource_32k.read = omap44xx_32k_read;
|
||||
else
|
||||
return -ENODEV;
|
||||
|
||||
sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
|
||||
if (sync_32k_ick)
|
||||
clk_enable(sync_32k_ick);
|
||||
|
||||
clocksource_32k.mult = clocksource_hz2mult(32768,
|
||||
clocksource_32k.shift);
|
||||
|
||||
offset_32k = clocksource_32k.read(&clocksource_32k);
|
||||
|
||||
if (clocksource_register(&clocksource_32k))
|
||||
printk(err, clocksource_32k.name);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(omap_init_clocksource_32k);
|
||||
|
||||
#endif /* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
|
||||
|
||||
|
|
@ -21,7 +21,6 @@
|
|||
#include <asm/mach/map.h>
|
||||
|
||||
#include <plat/tc.h>
|
||||
#include <plat/control.h>
|
||||
#include <plat/board.h>
|
||||
#include <plat/mmc.h>
|
||||
#include <mach/gpio.h>
|
||||
|
|
|
|||
|
|
@ -31,10 +31,8 @@
|
|||
#include <plat/cpu.h>
|
||||
#include <plat/vram.h>
|
||||
|
||||
#include <plat/control.h>
|
||||
#include "sram.h"
|
||||
#include "fb.h"
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
|
||||
# include "../mach-omap2/prm.h"
|
||||
# include "../mach-omap2/cm.h"
|
||||
|
|
@ -71,7 +69,6 @@
|
|||
#define OMAP34XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68012858)
|
||||
#define OMAP34XX_VA_ADDR_MATCH2 OMAP2_L3_IO_ADDRESS(0x68012880)
|
||||
#define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_L3_IO_ADDRESS(0x6C000048)
|
||||
#define OMAP34XX_VA_CONTROL_STAT OMAP2_L4_IO_ADDRESS(0x480022F0)
|
||||
|
||||
#define GP_DEVICE 0x300
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue