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ARM: zynq: Allow UART1 to be used as DEBUG_LL console. 

The main UART on the Xilinx ZC702 board is UART1, located at address
e0001000.  Add a Kconfig option to select this device as the low-level
debugging port.  This allows the really early boot printouts to reach
the USB serial adaptor on this board.

For consistency's sake, add a choice entry for UART0 even though it is
the the default if UART1 is not selected.

Signed-off-by: Nick Bowler <nbowler@elliptictech.com>
Tested-by: Josh Cartwright <josh.cartwright@ni.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Nick Bowler 2012-11-05 16:45:49 -05:00 committed by Michal Simek
parent 78d6785db1
commit aaf5e0be79
3 changed files with 31 additions and 8 deletions
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17
arch/arm/Kconfig.debug
View File

@ -132,6 +132,23 @@ choice
their output to UART1 serial port on DaVinci TNETV107X
devices.
config DEBUG_ZYNQ_UART0
bool "Kernel low-level debugging on Xilinx Zynq using UART0"
depends on ARCH_ZYNQ
help
Say Y here if you want the debug print routines to direct
their output to UART0 on the Zynq platform.
config DEBUG_ZYNQ_UART1
bool "Kernel low-level debugging on Xilinx Zynq using UART1"
depends on ARCH_ZYNQ
help
Say Y here if you want the debug print routines to direct
their output to UART1 on the Zynq platform.
If you have a ZC702 board and want early boot messages to
appear on the USB serial adaptor, select this option.
config DEBUG_DC21285_PORT
bool "Kernel low-level debugging messages via footbridge serial port"
depends on FOOTBRIDGE

6
arch/arm/mach-zynq/common.c
View File

@ -85,9 +85,9 @@ static struct map_desc io_desc[] __initdata = {
#ifdef CONFIG_DEBUG_LL
{
.virtual = UART0_VIRT,
.pfn = __phys_to_pfn(UART0_PHYS),
.length = UART0_SIZE,
.virtual = LL_UART_VADDR,
.pfn = __phys_to_pfn(LL_UART_PADDR),
.length = UART_SIZE,
.type = MT_DEVICE,
},
#endif

16
arch/arm/mach-zynq/include/mach/zynq_soc.h
View File

@ -25,8 +25,9 @@
* address that is known to work.
*/
#define UART0_PHYS 0xE0000000
#define UART0_SIZE SZ_4K
#define UART0_VIRT 0xF0001000
#define UART1_PHYS 0xE0001000
#define UART_SIZE SZ_4K
#define UART_VIRT 0xF0001000
#define TTC0_PHYS 0xF8001000
#define TTC0_SIZE SZ_4K
@ -36,12 +37,17 @@
#define SCU_PERIPH_SIZE SZ_8K
#define SCU_PERIPH_VIRT (TTC0_VIRT - SCU_PERIPH_SIZE)
#if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1)
# define LL_UART_PADDR UART1_PHYS
#else
# define LL_UART_PADDR UART0_PHYS
#endif
#define LL_UART_VADDR UART_VIRT
/* The following are intended for the devices that are mapped early */
#define TTC0_BASE IOMEM(TTC0_VIRT)
#define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT)
#define LL_UART_PADDR UART0_PHYS
#define LL_UART_VADDR UART0_VIRT
#endif