ARM: mx31: use generic function for displaying silicon revision
Update to use generic function for displaying silicon revision Tested on mx31pdk board as print the following information: CPU identified as i.MX31, silicon rev 2.0 Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -611,11 +611,11 @@ int __init mx31_clocks_init(unsigned long fref)
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clk_enable(&gpt_clk);
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clk_enable(&emi_clk);
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clk_enable(&iim_clk);
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mx31_revision();
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clk_disable(&iim_clk);
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clk_enable(&serial_pll_clk);
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mx31_read_cpu_rev();
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if (mx31_revision() >= IMX_CHIP_REVISION_2_0) {
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reg = __raw_readl(MXC_CCM_PMCR1);
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/* No PLL restart on DVFS switch; enable auto EMI handshake */
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@ -13,45 +13,50 @@
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <mach/iim.h>
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#include <mach/common.h>
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unsigned int mx31_cpu_rev;
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EXPORT_SYMBOL(mx31_cpu_rev);
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static int mx31_cpu_rev = -1;
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static struct {
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u8 srev;
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const char *name;
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const char *v;
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unsigned int rev;
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} mx31_cpu_type[] __initdata = {
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{ .srev = 0x00, .name = "i.MX31(L)", .v = "1.0", .rev = IMX_CHIP_REVISION_1_0 },
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{ .srev = 0x10, .name = "i.MX31", .v = "1.1", .rev = IMX_CHIP_REVISION_1_1 },
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{ .srev = 0x11, .name = "i.MX31L", .v = "1.1", .rev = IMX_CHIP_REVISION_1_1 },
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{ .srev = 0x12, .name = "i.MX31", .v = "1.15", .rev = IMX_CHIP_REVISION_1_1 },
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{ .srev = 0x13, .name = "i.MX31L", .v = "1.15", .rev = IMX_CHIP_REVISION_1_1 },
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{ .srev = 0x14, .name = "i.MX31", .v = "1.2", .rev = IMX_CHIP_REVISION_1_2 },
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{ .srev = 0x15, .name = "i.MX31L", .v = "1.2", .rev = IMX_CHIP_REVISION_1_2 },
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{ .srev = 0x28, .name = "i.MX31", .v = "2.0", .rev = IMX_CHIP_REVISION_2_0 },
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{ .srev = 0x29, .name = "i.MX31L", .v = "2.0", .rev = IMX_CHIP_REVISION_2_0 },
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} mx31_cpu_type[] = {
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{ .srev = 0x00, .name = "i.MX31(L)", .rev = IMX_CHIP_REVISION_1_0 },
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{ .srev = 0x10, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
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{ .srev = 0x11, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 },
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{ .srev = 0x12, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
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{ .srev = 0x13, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 },
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{ .srev = 0x14, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_2 },
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{ .srev = 0x15, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_2 },
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{ .srev = 0x28, .name = "i.MX31", .rev = IMX_CHIP_REVISION_2_0 },
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{ .srev = 0x29, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_2_0 },
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};
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void __init mx31_read_cpu_rev(void)
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static int mx31_read_cpu_rev(void)
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{
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u32 i, srev;
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/* read SREV register from IIM module */
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srev = __raw_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV));
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srev &= 0xff;
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for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
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if (srev == mx31_cpu_type[i].srev) {
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printk(KERN_INFO
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"CPU identified as %s, silicon rev %s\n",
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mx31_cpu_type[i].name, mx31_cpu_type[i].v);
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mx31_cpu_rev = mx31_cpu_type[i].rev;
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return;
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imx_print_silicon_rev(mx31_cpu_type[i].name,
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mx31_cpu_type[i].rev);
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return mx31_cpu_type[i].rev;
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}
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mx31_cpu_rev = IMX_CHIP_REVISION_UNKNOWN;
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printk(KERN_WARNING "Unknown CPU identifier. srev = %02x\n", srev);
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imx_print_silicon_rev("i.MX31", IMX_CHIP_REVISION_UNKNOWN);
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return IMX_CHIP_REVISION_UNKNOWN;
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}
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int mx31_revision(void)
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{
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if (mx31_cpu_rev == -1)
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mx31_cpu_rev = mx31_read_cpu_rev();
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return mx31_cpu_rev;
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}
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EXPORT_SYMBOL(mx31_revision);
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@ -187,15 +187,6 @@
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/* Mandatory defines used globally */
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#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
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extern unsigned int mx31_cpu_rev;
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extern void mx31_read_cpu_rev(void);
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static inline int mx31_revision(void)
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{
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return mx31_cpu_rev;
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}
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extern unsigned int mx35_cpu_rev;
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extern void mx35_read_cpu_rev(void);
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@ -203,6 +194,8 @@ static inline int mx35_revision(void)
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{
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return mx35_cpu_rev;
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}
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extern int mx31_revision(void);
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#endif
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#endif /* ifndef __MACH_MX3x_H__ */
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