Qualcomm ARM64 Updates for v4.21
* Add QCS404 base platform and nodes * Add QCS404 EVB boards * Add external SD and dependencies for MSM8998-mtp * Add default scm compatible for MSM8998 * Fix XO clk name on MSM8998 * Add prng-ee nodes for SDM845 and MSM8996 * Add ADC die temp node for pm8998 * Fix documentation on QCOM ADC sample -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJcBYHXAAoJEFKiBbHx2RXV79YQAKs+razLklv833WWQbUgucWu CvqIrZST3+sXxE2KQbZMev69HQY3G1+rEqnI1kIKoq4yEAiC9+XRRF4xoWfFGTQe X3JJGeBj7VL3ZPgKynB85wgXExSBJV1d28Uj2fIwqTf9tswLHk0QvmUvMVOJVbB/ N/rEeyoVBDW8YuvkQNvJMHTHsjkueiBIcvkZPkCpTYEWLZnr+bgFZNUsyc78PWh1 I4zF7vLYj+7NhoXKO5+Noll3Y/KAqS2dlBsYeH9pbuQ616JgOPUXGv5ZU9ncAPYR VVU+AL49cznEMRcacj7SX39EJrLmqdaLVU3p1y0RYDy5UGSCUHHPRufW0C4S7TQn VPROIsC9W2i3fTnvigBXsq/XJWk/40/UY3neL6roI67aMjID9PuKAnsQEYir0/0k gIY/VUGsgs9C05eETJ87brDoRnSzOZpLnjcte1OvjQWVyd+mC+CYRweEVu2Q3Mln QKZPBL3bP90YfnLg1VPAc92ySyPbbODSuVYqv7jLMr0X3JlmvErCGHSMPOa9CNoO WYzp7l62Vm6kc1s0Po7w+IK2AcXw0ykvDSVD+VK54j4ZKPOYeeTax4DO6rESwdOx mHVC0YxQd5H8upElLJd9oyMfYMEt6hFVDNxKmrhbdO06SSgLKoYecv2xc2JEvH5j jQuY0mEfTIlxh09gr2TW =vOeS -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt Qualcomm ARM64 Updates for v4.21 * Add QCS404 base platform and nodes * Add QCS404 EVB boards * Add external SD and dependencies for MSM8998-mtp * Add default scm compatible for MSM8998 * Fix XO clk name on MSM8998 * Add prng-ee nodes for SDM845 and MSM8996 * Add ADC die temp node for pm8998 * Fix documentation on QCOM ADC sample * tag 'qcom-arm64-for-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: (34 commits) arm64: dts: qcom: msm8998: Fix compatible of scm node arm64: dts: qcom: msm8998: Add SDC2 control pins arm64: dts: qcom: msm8998-mtp: Add external SD arm64: dts: qcom: msm8998: Add SDCC2 arm64: dts: qcom: msm8998: correct xo clock name arm64: dts: qcom: pms405: Add pon and pwrkey nodes arm64: dts: qcom: qcs404: Use BAM DMA for serial uart2 arm64: dts: qcom: qcs404: Add BAM DMA node arm64: dts: qcom: qcs404: add prng-ee node arm64: dts: qcom: qcs404: Add remoteproc nodes arm64: dts: qcom: qcs404: Add scm firmware node arm64: dts: qcom: pms405: add gpios arm64: dts: qcom: pms405: add rtc node arm64: dts: qcom: qcs404: add spmi node arm64: dts: qcom: pms405: add spmi node arm64: dts: qcom: qcs404: Add sdcc1 node arm64: dts: qcom: qcs404: Add TLMM pinctrl node arm64: dts: qcom: qcs404: add smp2p nodes arm64: dts: qcom: qcs404: Add PMS405 RPM regulators arm64: dts: qcom: qcs404: Add RPM GLINK related nodes ... Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
acfbaa5d3b
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@ -140,6 +140,10 @@ VADC_GND_REF and VADC_VDD_VADC.
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Example:
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#include <dt-bindings/iio/qcom,spmi-vadc.h>
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#include <linux/irq.h>
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/* ... */
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/* VADC node */
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pmic_vadc: vadc@3100 {
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compatible = "qcom,spmi-vadc";
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@ -151,7 +155,7 @@ Example:
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io-channel-ranges;
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/* Channel node */
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usb_id_nopull {
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adc-chan@VADC_LR_MUX10_USB_ID {
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reg = <VADC_LR_MUX10_USB_ID>;
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qcom,decimation = <512>;
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qcom,ratiometric;
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@ -8,3 +8,5 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8994-angler-rev-101.dtb
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dtb-$(CONFIG_ARCH_QCOM) += msm8996-mtp.dtb
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dtb-$(CONFIG_ARCH_QCOM) += msm8998-mtp.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sdm845-mtp.dtb
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dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb
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dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb
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@ -234,6 +234,47 @@
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};
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};
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gpu-thermal {
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polling-delay-passive = <250>;
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polling-delay = <1000>;
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thermal-sensors = <&tsens 2>;
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trips {
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gpu_alert: trip0 {
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temperature = <75000>;
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hysteresis = <2000>;
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type = "passive";
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};
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gpu_crit: trip1 {
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temperature = <95000>;
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hysteresis = <2000>;
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type = "critical";
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};
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};
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};
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camera-thermal {
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polling-delay-passive = <250>;
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polling-delay = <1000>;
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thermal-sensors = <&tsens 1>;
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trips {
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cam_alert: trip0 {
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temperature = <75000>;
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hysteresis = <2000>;
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type = "passive";
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};
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cam_crit: trip1 {
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temperature = <95000>;
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hysteresis = <2000>;
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type = "critical";
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};
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};
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};
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};
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cpu_opp_table: cpu_opp_table {
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@ -758,11 +799,13 @@
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};
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};
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tsens: thermal-sensor@4a8000 {
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tsens: thermal-sensor@4a9000 {
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compatible = "qcom,msm8916-tsens";
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reg = <0x4a8000 0x2000>;
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reg = <0x4a9000 0x1000>, /* TM */
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<0x4a8000 0x1000>; /* SROT */
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nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
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nvmem-cell-names = "calib", "calib_sel";
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#qcom,sensors = <5>;
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#thermal-sensor-cells = <1>;
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};
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@ -370,6 +370,13 @@
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reg = <0x68000 0x6000>;
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};
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rng: rng@83000 {
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compatible = "qcom,prng-ee";
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reg = <0x00083000 0x1000>;
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clocks = <&gcc GCC_PRNG_AHB_CLK>;
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clock-names = "core";
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};
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tcsr_mutex_regs: syscon@740000 {
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compatible = "syscon";
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reg = <0x740000 0x20000>;
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@ -241,3 +241,19 @@
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};
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};
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};
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&tlmm {
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gpio-reserved-ranges = <0 4>, <81 4>;
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};
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&sdhc2 {
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status = "okay";
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cd-gpios = <&tlmm 95 GPIO_ACTIVE_LOW>;
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vmmc-supply = <&vreg_l21a_2p95>;
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vqmmc-supply = <&vreg_l13a_2p95>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
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pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
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};
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@ -0,0 +1,78 @@
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2018, The Linux Foundation. All rights reserved. */
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&tlmm {
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sdc2_clk_on: sdc2_clk_on {
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config {
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pins = "sdc2_clk";
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bias-disable; /* NO pull */
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drive-strength = <16>; /* 16 mA */
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};
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};
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sdc2_clk_off: sdc2_clk_off {
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config {
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pins = "sdc2_clk";
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bias-disable; /* NO pull */
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drive-strength = <2>; /* 2 mA */
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};
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};
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sdc2_cmd_on: sdc2_cmd_on {
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config {
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pins = "sdc2_cmd";
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bias-pull-up; /* pull up */
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drive-strength = <10>; /* 10 mA */
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};
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};
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sdc2_cmd_off: sdc2_cmd_off {
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config {
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pins = "sdc2_cmd";
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bias-pull-up; /* pull up */
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drive-strength = <2>; /* 2 mA */
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};
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};
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sdc2_data_on: sdc2_data_on {
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config {
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pins = "sdc2_data";
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bias-pull-up; /* pull up */
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drive-strength = <10>; /* 10 mA */
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};
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};
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sdc2_data_off: sdc2_data_off {
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config {
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pins = "sdc2_data";
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bias-pull-up; /* pull up */
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drive-strength = <2>; /* 2 mA */
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};
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};
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sdc2_cd_on: sdc2_cd_on {
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mux {
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pins = "gpio95";
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function = "gpio";
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};
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config {
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pins = "gpio95";
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bias-pull-up; /* pull up */
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drive-strength = <2>; /* 2 mA */
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};
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};
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sdc2_cd_off: sdc2_cd_off {
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mux {
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pins = "gpio95";
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function = "gpio";
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};
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config {
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pins = "gpio95";
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bias-pull-up; /* pull up */
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drive-strength = <2>; /* 2 mA */
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};
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};
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};
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@ -3,6 +3,7 @@
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/qcom,gcc-msm8998.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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interrupt-parent = <&intc>;
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@ -53,7 +54,7 @@
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};
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clocks {
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xo_board {
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xo: xo {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <19200000>;
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@ -239,7 +240,7 @@
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firmware {
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scm {
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compatible = "qcom,scm-msm8998";
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compatible = "qcom,scm-msm8998", "qcom,scm";
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};
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};
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@ -605,6 +606,23 @@
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#mbox-cells = <1>;
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};
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sdhc2: sdhci@c0a4900 {
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compatible = "qcom,sdhci-msm-v4";
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reg = <0xc0a4900 0x314>, <0xc0a4000 0x800>;
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reg-names = "hc_mem", "core_mem";
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interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "hc_irq", "pwr_irq";
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clock-names = "iface", "core", "xo";
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clocks = <&gcc GCC_SDCC2_AHB_CLK>,
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<&gcc GCC_SDCC2_APPS_CLK>,
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<&xo>;
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bus-width = <4>;
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status = "disabled";
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};
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blsp2_uart1: serial@c1b0000 {
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compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
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reg = <0xc1b0000 0x1000>;
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@ -688,3 +706,5 @@
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};
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};
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};
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#include "msm8998-pins.dtsi"
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@ -75,6 +75,11 @@
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#address-cells = <1>;
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#size-cells = <0>;
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#io-channel-cells = <1>;
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adc-chan@ADC5_DIE_TEMP {
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reg = <ADC5_DIE_TEMP>;
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label = "die_temp";
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};
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};
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rtc@6000 {
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@ -0,0 +1,55 @@
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (c) 2018, Linaro Limited
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#include <dt-bindings/spmi/spmi.h>
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#include <dt-bindings/input/linux-event-codes.h>
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&spmi_bus {
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pms405_0: pms405@0 {
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compatible = "qcom,spmi-pmic";
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reg = <0x0 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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pms405_gpios: gpio@c000 {
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compatible = "qcom,pms405-gpio";
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reg = <0xc000>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
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<0 0xc1 0 IRQ_TYPE_NONE>,
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<0 0xc2 0 IRQ_TYPE_NONE>,
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<0 0xc3 0 IRQ_TYPE_NONE>,
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<0 0xc4 0 IRQ_TYPE_NONE>,
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<0 0xc5 0 IRQ_TYPE_NONE>,
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<0 0xc6 0 IRQ_TYPE_NONE>,
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<0 0xc7 0 IRQ_TYPE_NONE>,
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<0 0xc8 0 IRQ_TYPE_NONE>,
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<0 0xc9 0 IRQ_TYPE_NONE>,
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<0 0xca 0 IRQ_TYPE_NONE>,
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<0 0xcb 0 IRQ_TYPE_NONE>;
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};
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pon@800 {
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compatible = "qcom,pms405-pon";
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reg = <0x0800>;
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mode-bootloader = <0x2>;
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mode-recovery = <0x1>;
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pwrkey {
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compatible = "qcom,pm8941-pwrkey";
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interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
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debounce = <15625>;
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bias-pull-up;
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linux,code = <KEY_POWER>;
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};
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};
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rtc@6000 {
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compatible = "qcom,pm8941-rtc";
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reg = <0x6000>;
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reg-names = "rtc", "alarm";
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interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
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};
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};
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};
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@ -0,0 +1,11 @@
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (c) 2018, Linaro Limited
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/dts-v1/;
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#include "qcs404-evb.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. QCS404 EVB 1000";
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compatible = "qcom,qcs404-evb";
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};
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@ -0,0 +1,11 @@
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// SPDX-License-Identifier: GPL-2.0
|
||||
// Copyright (c) 2018, Linaro Limited
|
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|
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/dts-v1/;
|
||||
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||||
#include "qcs404-evb.dtsi"
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|
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/ {
|
||||
model = "Qualcomm Technologies, Inc. QCS404 EVB 4000";
|
||||
compatible = "qcom,qcs404-evb";
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};
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|
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@ -0,0 +1,188 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
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// Copyright (c) 2018, Linaro Limited
|
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|
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#include "qcs404.dtsi"
|
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#include "pms405.dtsi"
|
||||
|
||||
/ {
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||||
aliases {
|
||||
serial0 = &blsp1_uart2;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0";
|
||||
};
|
||||
|
||||
vph_pwr: vph-pwr-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vph_pwr";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
|
||||
&remoteproc_adsp {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&remoteproc_cdsp {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&remoteproc_wcss {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&rpm_requests {
|
||||
pms405-regulators {
|
||||
compatible = "qcom,rpm-pms405-regulators";
|
||||
|
||||
vdd-s1-supply = <&vph_pwr>;
|
||||
vdd-s2-supply = <&vph_pwr>;
|
||||
vdd-s3-supply = <&vph_pwr>;
|
||||
vdd-s4-supply = <&vph_pwr>;
|
||||
vdd-s5-supply = <&vph_pwr>;
|
||||
vdd-l1-l2-supply = <&vreg_s5_1p35>;
|
||||
vdd-l3-l8-supply = <&vreg_s5_1p35>;
|
||||
vdd-l4-supply = <&vreg_s5_1p35>;
|
||||
vdd-l5-l6-supply = <&vreg_s4_1p8>;
|
||||
vdd-l7-supply = <&vph_pwr>;
|
||||
vdd-l9-supply = <&vreg_s5_1p35>;
|
||||
vdd-l10-l11-l12-l13-supply = <&vph_pwr>;
|
||||
|
||||
vreg_s4_1p8: s4 {
|
||||
regulator-min-microvolt = <1728000>;
|
||||
regulator-max-microvolt = <1920000>;
|
||||
};
|
||||
|
||||
vreg_s5_1p35: s5 {
|
||||
regulator-min-microvolt = <>;
|
||||
regulator-max-microvolt = <>;
|
||||
};
|
||||
|
||||
vreg_l1_1p3: l1 {
|
||||
regulator-min-microvolt = <1240000>;
|
||||
regulator-max-microvolt = <1352000>;
|
||||
};
|
||||
|
||||
vreg_l2_1p275: l2 {
|
||||
regulator-min-microvolt = <1048000>;
|
||||
regulator-max-microvolt = <1280000>;
|
||||
};
|
||||
|
||||
vreg_l3_1p05: l3 {
|
||||
regulator-min-microvolt = <976000>;
|
||||
regulator-max-microvolt = <1160000>;
|
||||
};
|
||||
|
||||
vreg_l4_1p2: l4 {
|
||||
regulator-min-microvolt = <1144000>;
|
||||
regulator-max-microvolt = <1256000>;
|
||||
};
|
||||
|
||||
vreg_l5_1p8: l5 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
vreg_l6_1p8: l6 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vreg_l7_1p8: l7 {
|
||||
regulator-min-microvolt = <1616000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
};
|
||||
|
||||
vreg_l8_1p2: l8 {
|
||||
regulator-min-microvolt = <1136000>;
|
||||
regulator-max-microvolt = <1352000>;
|
||||
};
|
||||
|
||||
vreg_l10_3p3: l10 {
|
||||
regulator-min-microvolt = <2936000>;
|
||||
regulator-max-microvolt = <3088000>;
|
||||
};
|
||||
|
||||
vreg_l11_sdc2: l11 {
|
||||
regulator-min-microvolt = <2696000>;
|
||||
regulator-max-microvolt = <3304000>;
|
||||
};
|
||||
|
||||
vreg_l12_3p3: l12 {
|
||||
regulator-min-microvolt = <2968000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
vreg_l13_3p3: l13 {
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&sdcc1 {
|
||||
status = "ok";
|
||||
|
||||
mmc-ddr-1_8v;
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&sdc1_on>;
|
||||
pinctrl-1 = <&sdc1_off>;
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
sdc1_on: sdc1-on {
|
||||
clk {
|
||||
pins = "sdc1_clk";
|
||||
bias-disable;
|
||||
drive-strength = <16>;
|
||||
};
|
||||
|
||||
cmd {
|
||||
pins = "sdc1_cmd";
|
||||
bias-pull-up;
|
||||
drive-strength = <10>;
|
||||
};
|
||||
|
||||
data {
|
||||
pins = "sdc1_data";
|
||||
bias-pull-up;
|
||||
dreive-strength = <10>;
|
||||
};
|
||||
|
||||
rclk {
|
||||
pins = "sdc1_rclk";
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
sdc1_off: sdc1-off {
|
||||
clk {
|
||||
pins = "sdc1_clk";
|
||||
bias-disable;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
|
||||
cmd {
|
||||
pins = "sdc1_cmd";
|
||||
bias-pull-up;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
|
||||
data {
|
||||
pins = "sdc1_data";
|
||||
bias-pull-up;
|
||||
dreive-strength = <2>;
|
||||
};
|
||||
|
||||
rclk {
|
||||
pins = "sdc1_rclk";
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,490 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
// Copyright (c) 2018, Linaro Limited
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-qcs404.h>
|
||||
|
||||
/ {
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
chosen { };
|
||||
|
||||
clocks {
|
||||
xo_board: xo-board {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <19200000>;
|
||||
};
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
CPU0: cpu@100 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <0x100>;
|
||||
enable-method = "psci";
|
||||
next-level-cache = <&L2_0>;
|
||||
};
|
||||
|
||||
CPU1: cpu@101 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <0x101>;
|
||||
enable-method = "psci";
|
||||
next-level-cache = <&L2_0>;
|
||||
};
|
||||
|
||||
CPU2: cpu@102 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <0x102>;
|
||||
enable-method = "psci";
|
||||
next-level-cache = <&L2_0>;
|
||||
};
|
||||
|
||||
CPU3: cpu@103 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <0x103>;
|
||||
enable-method = "psci";
|
||||
next-level-cache = <&L2_0>;
|
||||
};
|
||||
|
||||
L2_0: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
firmware {
|
||||
scm: scm {
|
||||
compatible = "qcom,scm-qcs404", "qcom,scm";
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
/* We expect the bootloader to fill in the size */
|
||||
reg = <0 0x80000000 0 0>;
|
||||
};
|
||||
|
||||
psci {
|
||||
compatible = "arm,psci-1.0";
|
||||
method = "smc";
|
||||
};
|
||||
|
||||
remoteproc_adsp: remoteproc-adsp {
|
||||
compatible = "qcom,qcs404-adsp-pas";
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 293 IRQ_TYPE_EDGE_RISING>,
|
||||
<&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "wdog", "fatal", "ready",
|
||||
"handover", "stop-ack";
|
||||
|
||||
clocks = <&xo_board>;
|
||||
clock-names = "xo";
|
||||
|
||||
memory-region = <&adsp_fw_mem>;
|
||||
|
||||
qcom,smem-states = <&adsp_smp2p_out 0>;
|
||||
qcom,smem-state-names = "stop";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
glink-edge {
|
||||
interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
qcom,remote-pid = <2>;
|
||||
mboxes = <&apcs_glb 8>;
|
||||
|
||||
label = "adsp";
|
||||
};
|
||||
};
|
||||
|
||||
remoteproc_cdsp: remoteproc-cdsp {
|
||||
compatible = "qcom,qcs404-cdsp-pas";
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 229 IRQ_TYPE_EDGE_RISING>,
|
||||
<&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "wdog", "fatal", "ready",
|
||||
"handover", "stop-ack";
|
||||
|
||||
clocks = <&xo_board>;
|
||||
clock-names = "xo";
|
||||
|
||||
memory-region = <&cdsp_fw_mem>;
|
||||
|
||||
qcom,smem-states = <&cdsp_smp2p_out 0>;
|
||||
qcom,smem-state-names = "stop";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
glink-edge {
|
||||
interrupts = <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
qcom,remote-pid = <5>;
|
||||
mboxes = <&apcs_glb 12>;
|
||||
|
||||
label = "cdsp";
|
||||
};
|
||||
};
|
||||
|
||||
remoteproc_wcss: remoteproc-wcss {
|
||||
compatible = "qcom,qcs404-wcss-pas";
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 153 IRQ_TYPE_EDGE_RISING>,
|
||||
<&wcss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&wcss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&wcss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&wcss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "wdog", "fatal", "ready",
|
||||
"handover", "stop-ack";
|
||||
|
||||
clocks = <&xo_board>;
|
||||
clock-names = "xo";
|
||||
|
||||
memory-region = <&wlan_fw_mem>;
|
||||
|
||||
qcom,smem-states = <&wcss_smp2p_out 0>;
|
||||
qcom,smem-state-names = "stop";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
glink-edge {
|
||||
interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
qcom,remote-pid = <1>;
|
||||
mboxes = <&apcs_glb 16>;
|
||||
|
||||
label = "wcss";
|
||||
};
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
memory@85600000 {
|
||||
reg = <0 0x85600000 0 0x90000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
smem_region: memory@85f00000 {
|
||||
reg = <0 0x85f00000 0 0x200000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
memory@86100000 {
|
||||
reg = <0 0x86100000 0 0x300000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wlan_fw_mem: memory@86400000 {
|
||||
reg = <0 0x86400000 0 0x1c00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
adsp_fw_mem: memory@88000000 {
|
||||
reg = <0 0x88000000 0 0x1a00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
cdsp_fw_mem: memory@89a00000 {
|
||||
reg = <0 0x89a00000 0 0x600000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wlan_msa_mem: memory@8a000000 {
|
||||
reg = <0 0x8a000000 0 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
rpm-glink {
|
||||
compatible = "qcom,glink-rpm";
|
||||
|
||||
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
|
||||
qcom,rpm-msg-ram = <&rpm_msg_ram>;
|
||||
mboxes = <&apcs_glb 0>;
|
||||
|
||||
rpm_requests: glink-channel {
|
||||
compatible = "qcom,rpm-qcs404";
|
||||
qcom,glink-channels = "rpm_requests";
|
||||
};
|
||||
};
|
||||
|
||||
smem {
|
||||
compatible = "qcom,smem";
|
||||
|
||||
memory-region = <&smem_region>;
|
||||
qcom,rpm-msg-ram = <&rpm_msg_ram>;
|
||||
|
||||
hwlocks = <&tcsr_mutex 3>;
|
||||
};
|
||||
|
||||
tcsr_mutex: hwlock {
|
||||
compatible = "qcom,tcsr-mutex";
|
||||
syscon = <&tcsr_mutex_regs 0 0x1000>;
|
||||
#hwlock-cells = <1>;
|
||||
};
|
||||
|
||||
soc: soc@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0 0xffffffff>;
|
||||
compatible = "simple-bus";
|
||||
|
||||
rpm_msg_ram: memory@60000 {
|
||||
compatible = "qcom,rpm-msg-ram";
|
||||
reg = <0x00060000 0x6000>;
|
||||
};
|
||||
|
||||
rng: rng@e3000 {
|
||||
compatible = "qcom,prng-ee";
|
||||
reg = <0x000e3000 0x1000>;
|
||||
clocks = <&gcc GCC_PRNG_AHB_CLK>;
|
||||
clock-names = "core";
|
||||
};
|
||||
|
||||
tlmm: pinctrl@1000000 {
|
||||
compatible = "qcom,qcs404-pinctrl";
|
||||
reg = <0x01000000 0x200000>,
|
||||
<0x01300000 0x200000>,
|
||||
<0x07b00000 0x200000>;
|
||||
reg-names = "south", "north", "east";
|
||||
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-ranges = <&tlmm 0 0 120>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gcc: clock-controller@1800000 {
|
||||
compatible = "qcom,gcc-qcs404";
|
||||
reg = <0x01800000 0x80000>;
|
||||
#clock-cells = <1>;
|
||||
|
||||
assigned-clocks = <&gcc GCC_APSS_AHB_CLK_SRC>;
|
||||
assigned-clock-rates = <19200000>;
|
||||
};
|
||||
|
||||
tcsr_mutex_regs: syscon@1905000 {
|
||||
compatible = "syscon";
|
||||
reg = <0x01905000 0x20000>;
|
||||
};
|
||||
|
||||
spmi_bus: spmi@200f000 {
|
||||
compatible = "qcom,spmi-pmic-arb";
|
||||
reg = <0x0200f000 0x001000>,
|
||||
<0x02400000 0x800000>,
|
||||
<0x02c00000 0x800000>,
|
||||
<0x03800000 0x200000>,
|
||||
<0x0200a000 0x002100>;
|
||||
reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
|
||||
interrupt-names = "periph_irq";
|
||||
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
|
||||
qcom,ee = <0>;
|
||||
qcom,channel = <0>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <4>;
|
||||
};
|
||||
|
||||
sdcc1: sdcc@7804000 {
|
||||
compatible = "qcom,sdhci-msm-v5";
|
||||
reg = <0x07804000 0x1000>, <0x7805000 0x1000>;
|
||||
reg-names = "hc_mem", "cmdq_mem";
|
||||
|
||||
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "hc_irq", "pwr_irq";
|
||||
|
||||
clocks = <&gcc GCC_SDCC1_APPS_CLK>,
|
||||
<&gcc GCC_SDCC1_AHB_CLK>,
|
||||
<&xo_board>;
|
||||
clock-names = "core", "iface", "xo";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
blsp1_dma: dma@7884000 {
|
||||
compatible = "qcom,bam-v1.7.0";
|
||||
reg = <0x07884000 0x25000>;
|
||||
interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_BLSP1_AHB_CLK>;
|
||||
clock-names = "bam_clk";
|
||||
#dma-cells = <1>;
|
||||
qcom,controlled-remotely = <1>;
|
||||
qcom,ee = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
blsp1_uart2: serial@78b1000 {
|
||||
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
|
||||
reg = <0x078b1000 0x200>;
|
||||
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
dmas = <&blsp1_dma 5>, <&blsp1_dma 4>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
intc: interrupt-controller@b000000 {
|
||||
compatible = "qcom,msm-qgic2";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
reg = <0x0b000000 0x1000>,
|
||||
<0x0b002000 0x1000>;
|
||||
};
|
||||
|
||||
apcs_glb: mailbox@b011000 {
|
||||
compatible = "qcom,qcs404-apcs-apps-global", "syscon";
|
||||
reg = <0x0b011000 0x1000>;
|
||||
#mbox-cells = <1>;
|
||||
};
|
||||
|
||||
timer@b120000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
compatible = "arm,armv7-timer-mem";
|
||||
reg = <0x0b120000 0x1000>;
|
||||
clock-frequency = <19200000>;
|
||||
|
||||
frame@b121000 {
|
||||
frame-number = <0>;
|
||||
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0b121000 0x1000>,
|
||||
<0x0b122000 0x1000>;
|
||||
};
|
||||
|
||||
frame@b123000 {
|
||||
frame-number = <1>;
|
||||
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0b123000 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
frame@b124000 {
|
||||
frame-number = <2>;
|
||||
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0b124000 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
frame@b125000 {
|
||||
frame-number = <3>;
|
||||
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0b125000 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
frame@b126000 {
|
||||
frame-number = <4>;
|
||||
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0b126000 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
frame@b127000 {
|
||||
frame-number = <5>;
|
||||
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0xb127000 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
frame@b128000 {
|
||||
frame-number = <6>;
|
||||
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0b128000 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupts = <GIC_PPI 2 0xff08>,
|
||||
<GIC_PPI 3 0xff08>,
|
||||
<GIC_PPI 4 0xff08>,
|
||||
<GIC_PPI 1 0xff08>;
|
||||
};
|
||||
|
||||
smp2p-adsp {
|
||||
compatible = "qcom,smp2p";
|
||||
qcom,smem = <443>, <429>;
|
||||
interrupts = <GIC_SPI 291 IRQ_TYPE_EDGE_RISING>;
|
||||
mboxes = <&apcs_glb 10>;
|
||||
qcom,local-pid = <0>;
|
||||
qcom,remote-pid = <2>;
|
||||
|
||||
adsp_smp2p_out: master-kernel {
|
||||
qcom,entry-name = "master-kernel";
|
||||
#qcom,smem-state-cells = <1>;
|
||||
};
|
||||
|
||||
adsp_smp2p_in: slave-kernel {
|
||||
qcom,entry-name = "slave-kernel";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
smp2p-cdsp {
|
||||
compatible = "qcom,smp2p";
|
||||
qcom,smem = <94>, <432>;
|
||||
interrupts = <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>;
|
||||
mboxes = <&apcs_glb 14>;
|
||||
qcom,local-pid = <0>;
|
||||
qcom,remote-pid = <5>;
|
||||
|
||||
cdsp_smp2p_out: master-kernel {
|
||||
qcom,entry-name = "master-kernel";
|
||||
#qcom,smem-state-cells = <1>;
|
||||
};
|
||||
|
||||
cdsp_smp2p_in: slave-kernel {
|
||||
qcom,entry-name = "slave-kernel";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
smp2p-wcss {
|
||||
compatible = "qcom,smp2p";
|
||||
qcom,smem = <435>, <428>;
|
||||
interrupts = <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
|
||||
mboxes = <&apcs_glb 18>;
|
||||
qcom,local-pid = <0>;
|
||||
qcom,remote-pid = <1>;
|
||||
|
||||
wcss_smp2p_out: master-kernel {
|
||||
qcom,entry-name = "master-kernel";
|
||||
#qcom,smem-state-cells = <1>;
|
||||
};
|
||||
|
||||
wcss_smp2p_in: slave-kernel {
|
||||
qcom,entry-name = "slave-kernel";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -352,6 +352,10 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
gpio-reserved-ranges = <0 4>, <81 4>;
|
||||
};
|
||||
|
||||
&uart9 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@
|
|||
#include <dt-bindings/phy/phy-qcom-qusb2.h>
|
||||
#include <dt-bindings/reset/qcom,sdm845-aoss.h>
|
||||
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
|
||||
|
||||
/ {
|
||||
interrupt-parent = <&intc>;
|
||||
|
|
@ -357,6 +358,13 @@
|
|||
};
|
||||
};
|
||||
|
||||
rng: rng@793000 {
|
||||
compatible = "qcom,prng-ee";
|
||||
reg = <0x00793000 0x1000>;
|
||||
clocks = <&gcc GCC_PRNG_AHB_CLK>;
|
||||
clock-names = "core";
|
||||
};
|
||||
|
||||
qupv3_id_0: geniqup@8c0000 {
|
||||
compatible = "qcom,geni-se-qup";
|
||||
reg = <0x8c0000 0x6000>;
|
||||
|
|
@ -1404,4 +1412,174 @@
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
cpu0-thermal {
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
|
||||
thermal-sensors = <&tsens0 1>;
|
||||
|
||||
trips {
|
||||
cpu_alert0: trip0 {
|
||||
temperature = <75000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu_crit0: trip1 {
|
||||
temperature = <110000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cpu1-thermal {
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
|
||||
thermal-sensors = <&tsens0 2>;
|
||||
|
||||
trips {
|
||||
cpu_alert1: trip0 {
|
||||
temperature = <75000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu_crit1: trip1 {
|
||||
temperature = <110000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cpu2-thermal {
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
|
||||
thermal-sensors = <&tsens0 3>;
|
||||
|
||||
trips {
|
||||
cpu_alert2: trip0 {
|
||||
temperature = <75000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu_crit2: trip1 {
|
||||
temperature = <110000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cpu3-thermal {
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
|
||||
thermal-sensors = <&tsens0 4>;
|
||||
|
||||
trips {
|
||||
cpu_alert3: trip0 {
|
||||
temperature = <75000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu_crit3: trip1 {
|
||||
temperature = <110000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cpu4-thermal {
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
|
||||
thermal-sensors = <&tsens0 7>;
|
||||
|
||||
trips {
|
||||
cpu_alert4: trip0 {
|
||||
temperature = <75000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu_crit4: trip1 {
|
||||
temperature = <110000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cpu5-thermal {
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
|
||||
thermal-sensors = <&tsens0 8>;
|
||||
|
||||
trips {
|
||||
cpu_alert5: trip0 {
|
||||
temperature = <75000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu_crit5: trip1 {
|
||||
temperature = <110000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cpu6-thermal {
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
|
||||
thermal-sensors = <&tsens0 9>;
|
||||
|
||||
trips {
|
||||
cpu_alert6: trip0 {
|
||||
temperature = <75000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu_crit6: trip1 {
|
||||
temperature = <110000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cpu7-thermal {
|
||||
polling-delay-passive = <250>;
|
||||
polling-delay = <1000>;
|
||||
|
||||
thermal-sensors = <&tsens0 10>;
|
||||
|
||||
trips {
|
||||
cpu_alert7: trip0 {
|
||||
temperature = <75000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu_crit7: trip1 {
|
||||
temperature = <110000>;
|
||||
hysteresis = <1000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in New Issue