clocksource: atmel-st: use syscon/regmap
The register range from the system timer is also used by the watchdog driver. Use a regmap to handle concurrent accesses. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This commit is contained in:
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b53cdd0322
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adf2edfd60
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@ -24,18 +24,19 @@
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#include <linux/irq.h>
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#include <linux/irq.h>
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#include <linux/clockchips.h>
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#include <linux/clockchips.h>
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#include <linux/export.h>
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#include <linux/export.h>
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#include <linux/of.h>
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#include <linux/mfd/syscon.h>
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#include <linux/of_address.h>
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#include <linux/mfd/syscon/atmel-st.h>
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#include <linux/of_irq.h>
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#include <linux/of_irq.h>
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#include <linux/regmap.h>
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#include <asm/mach/time.h>
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#include <asm/mach/time.h>
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#include <mach/at91_st.h>
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#include <mach/hardware.h>
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#include <mach/hardware.h>
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static unsigned long last_crtr;
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static unsigned long last_crtr;
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static u32 irqmask;
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static u32 irqmask;
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static struct clock_event_device clkevt;
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static struct clock_event_device clkevt;
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static struct regmap *regmap_st;
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#define RM9200_TIMER_LATCH ((AT91_SLOW_CLOCK + HZ/2) / HZ)
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#define RM9200_TIMER_LATCH ((AT91_SLOW_CLOCK + HZ/2) / HZ)
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@ -46,11 +47,11 @@ static struct clock_event_device clkevt;
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*/
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*/
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static inline unsigned long read_CRTR(void)
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static inline unsigned long read_CRTR(void)
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{
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{
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unsigned long x1, x2;
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unsigned int x1, x2;
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x1 = at91_st_read(AT91_ST_CRTR);
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regmap_read(regmap_st, AT91_ST_CRTR, &x1);
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do {
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do {
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x2 = at91_st_read(AT91_ST_CRTR);
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regmap_read(regmap_st, AT91_ST_CRTR, &x2);
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if (x1 == x2)
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if (x1 == x2)
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break;
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break;
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x1 = x2;
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x1 = x2;
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@ -63,7 +64,10 @@ static inline unsigned long read_CRTR(void)
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*/
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*/
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static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
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static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
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{
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{
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u32 sr = at91_st_read(AT91_ST_SR) & irqmask;
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u32 sr;
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regmap_read(regmap_st, AT91_ST_SR, &sr);
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sr &= irqmask;
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/*
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/*
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* irqs should be disabled here, but as the irq is shared they are only
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* irqs should be disabled here, but as the irq is shared they are only
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@ -115,23 +119,25 @@ static struct clocksource clk32k = {
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static void
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static void
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clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
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clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
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{
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{
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unsigned int val;
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/* Disable and flush pending timer interrupts */
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/* Disable and flush pending timer interrupts */
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at91_st_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_ALMS);
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regmap_write(regmap_st, AT91_ST_IDR, AT91_ST_PITS | AT91_ST_ALMS);
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at91_st_read(AT91_ST_SR);
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regmap_read(regmap_st, AT91_ST_SR, &val);
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last_crtr = read_CRTR();
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last_crtr = read_CRTR();
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switch (mode) {
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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case CLOCK_EVT_MODE_PERIODIC:
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/* PIT for periodic irqs; fixed rate of 1/HZ */
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/* PIT for periodic irqs; fixed rate of 1/HZ */
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irqmask = AT91_ST_PITS;
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irqmask = AT91_ST_PITS;
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at91_st_write(AT91_ST_PIMR, RM9200_TIMER_LATCH);
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regmap_write(regmap_st, AT91_ST_PIMR, RM9200_TIMER_LATCH);
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break;
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break;
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case CLOCK_EVT_MODE_ONESHOT:
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case CLOCK_EVT_MODE_ONESHOT:
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/* ALM for oneshot irqs, set by next_event()
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/* ALM for oneshot irqs, set by next_event()
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* before 32 seconds have passed
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* before 32 seconds have passed
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*/
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*/
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irqmask = AT91_ST_ALMS;
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irqmask = AT91_ST_ALMS;
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at91_st_write(AT91_ST_RTAR, last_crtr);
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regmap_write(regmap_st, AT91_ST_RTAR, last_crtr);
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break;
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break;
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case CLOCK_EVT_MODE_SHUTDOWN:
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case CLOCK_EVT_MODE_SHUTDOWN:
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_UNUSED:
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@ -139,7 +145,7 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
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irqmask = 0;
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irqmask = 0;
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break;
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break;
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}
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}
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at91_st_write(AT91_ST_IER, irqmask);
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regmap_write(regmap_st, AT91_ST_IER, irqmask);
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}
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}
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static int
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static int
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@ -147,6 +153,7 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
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{
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{
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u32 alm;
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u32 alm;
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int status = 0;
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int status = 0;
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unsigned int val;
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BUG_ON(delta < 2);
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BUG_ON(delta < 2);
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@ -162,12 +169,12 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
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alm = read_CRTR();
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alm = read_CRTR();
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/* Cancel any pending alarm; flush any pending IRQ */
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/* Cancel any pending alarm; flush any pending IRQ */
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at91_st_write(AT91_ST_RTAR, alm);
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regmap_write(regmap_st, AT91_ST_RTAR, alm);
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at91_st_read(AT91_ST_SR);
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regmap_read(regmap_st, AT91_ST_SR, &val);
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/* Schedule alarm by writing RTAR. */
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/* Schedule alarm by writing RTAR. */
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alm += delta;
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alm += delta;
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at91_st_write(AT91_ST_RTAR, alm);
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regmap_write(regmap_st, AT91_ST_RTAR, alm);
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return status;
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return status;
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}
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}
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@ -180,57 +187,26 @@ static struct clock_event_device clkevt = {
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.set_mode = clkevt32k_mode,
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.set_mode = clkevt32k_mode,
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};
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};
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void __iomem *at91_st_base;
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EXPORT_SYMBOL_GPL(at91_st_base);
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static const struct of_device_id at91rm9200_st_timer_ids[] = {
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{ .compatible = "atmel,at91rm9200-st" },
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{ /* sentinel */ }
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};
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static int __init of_at91rm9200_st_init(void)
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{
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struct device_node *np;
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int ret;
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np = of_find_matching_node(NULL, at91rm9200_st_timer_ids);
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if (!np)
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goto err;
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at91_st_base = of_iomap(np, 0);
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if (!at91_st_base)
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goto node_err;
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/* Get the interrupts property */
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ret = irq_of_parse_and_map(np, 0);
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if (!ret)
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goto ioremap_err;
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at91rm9200_timer_irq.irq = ret;
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of_node_put(np);
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return 0;
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ioremap_err:
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iounmap(at91_st_base);
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node_err:
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of_node_put(np);
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err:
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return -EINVAL;
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}
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/*
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/*
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* ST (system timer) module supports both clockevents and clocksource.
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* ST (system timer) module supports both clockevents and clocksource.
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*/
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*/
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static void __init atmel_st_timer_init(struct device_node *node)
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static void __init atmel_st_timer_init(struct device_node *node)
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{
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{
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/* For device tree enabled device: initialize here */
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unsigned int val;
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of_at91rm9200_st_init();
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regmap_st = syscon_node_to_regmap(node);
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if (IS_ERR(regmap_st))
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panic(pr_fmt("Unable to get regmap\n"));
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/* Disable all timer interrupts, and clear any pending ones */
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/* Disable all timer interrupts, and clear any pending ones */
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at91_st_write(AT91_ST_IDR,
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regmap_write(regmap_st, AT91_ST_IDR,
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AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS);
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AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS);
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at91_st_read(AT91_ST_SR);
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regmap_read(regmap_st, AT91_ST_SR, &val);
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/* Get the interrupts property */
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at91rm9200_timer_irq.irq = irq_of_parse_and_map(node, 0);
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if (!at91rm9200_timer_irq.irq)
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panic(pr_fmt("Unable to get IRQ from DT\n"));
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/* Make IRQs happen for the system timer */
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/* Make IRQs happen for the system timer */
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setup_irq(at91rm9200_timer_irq.irq, &at91rm9200_timer_irq);
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setup_irq(at91rm9200_timer_irq.irq, &at91rm9200_timer_irq);
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* directly for the clocksource and all clockevents, after adjusting
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* directly for the clocksource and all clockevents, after adjusting
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* its prescaler from the 1 Hz default.
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* its prescaler from the 1 Hz default.
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*/
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*/
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at91_st_write(AT91_ST_RTMR, 1);
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regmap_write(regmap_st, AT91_ST_RTMR, 1);
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/* Setup timer clockevent, with minimum of two ticks (important!!) */
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/* Setup timer clockevent, with minimum of two ticks (important!!) */
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clkevt.cpumask = cpumask_of(0);
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clkevt.cpumask = cpumask_of(0);
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