intel_sst: Save audio state across D3 on Medfield
During suspend and runtime_suspend audio dsp will be in D3 state and will loose its context. This patch adds support in driver to save the dsp context and restore this context during resume Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Ramesh Babu K V <ramesh.babu@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
parent
31dea73851
commit
afe9194d58
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@ -316,9 +316,25 @@ static int __devinit intel_sst_probe(struct pci_dev *pci,
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if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID) {
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ret = misc_register(&lpe_dev);
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if (ret) {
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pr_err("couldn't register misc driver\n");
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pr_err("couldn't register LPE device\n");
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goto do_free_misc;
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}
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} else if (sst_drv_ctx->pci_id == SST_MFLD_PCI_ID) {
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u32 csr;
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/*allocate mem for fw context save during suspend*/
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sst_drv_ctx->fw_cntx = kzalloc(FW_CONTEXT_MEM, GFP_KERNEL);
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if (!sst_drv_ctx->fw_cntx) {
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ret = -ENOMEM;
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goto do_free_misc;
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}
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/*setting zero as that is valid mem to restore*/
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sst_drv_ctx->fw_cntx_size = 0;
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/*set lpe start clock and ram size*/
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csr = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
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csr |= 0x30060; /*remove the clock ratio after fw fix*/
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sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr);
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}
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sst_drv_ctx->lpe_stalled = 0;
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pm_runtime_set_active(&pci->dev);
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@ -374,16 +390,17 @@ static void __devexit intel_sst_remove(struct pci_dev *pci)
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sst_drv_ctx->sst_state = SST_UN_INIT;
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mutex_unlock(&sst_drv_ctx->sst_lock);
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misc_deregister(&lpe_ctrl);
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if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID)
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misc_deregister(&lpe_dev);
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free_irq(pci->irq, sst_drv_ctx);
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iounmap(sst_drv_ctx->dram);
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iounmap(sst_drv_ctx->iram);
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iounmap(sst_drv_ctx->mailbox);
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iounmap(sst_drv_ctx->shim);
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sst_drv_ctx->pmic_state = SND_MAD_UN_INIT;
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if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID)
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if (sst_drv_ctx->pci_id == SST_MRST_PCI_ID) {
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misc_deregister(&lpe_dev);
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kfree(sst_drv_ctx->mmap_mem);
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} else
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kfree(sst_drv_ctx->fw_cntx);
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flush_scheduled_work();
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destroy_workqueue(sst_drv_ctx->process_reply_wq);
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destroy_workqueue(sst_drv_ctx->process_msg_wq);
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@ -398,6 +415,46 @@ static void __devexit intel_sst_remove(struct pci_dev *pci)
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pci_set_drvdata(pci, NULL);
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}
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void sst_save_dsp_context(void)
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{
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struct snd_sst_ctxt_params fw_context;
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unsigned int pvt_id, i;
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struct ipc_post *msg = NULL;
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/*check cpu type*/
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if (sst_drv_ctx->pci_id != SST_MFLD_PCI_ID)
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return;
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/*not supported for rest*/
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if (sst_drv_ctx->sst_state != SST_FW_RUNNING) {
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pr_debug("fw not running no context save ...\n");
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return;
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}
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/*send msg to fw*/
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if (sst_create_large_msg(&msg))
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return;
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pvt_id = sst_assign_pvt_id(sst_drv_ctx);
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i = sst_get_block_stream(sst_drv_ctx);
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sst_drv_ctx->alloc_block[i].sst_id = pvt_id;
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sst_fill_header(&msg->header, IPC_IA_GET_FW_CTXT, 1, pvt_id);
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msg->header.part.data = sizeof(fw_context) + sizeof(u32);
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fw_context.address = virt_to_phys((void *)sst_drv_ctx->fw_cntx);
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fw_context.size = FW_CONTEXT_MEM;
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memcpy(msg->mailbox_data, &msg->header, sizeof(u32));
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memcpy(msg->mailbox_data + sizeof(u32),
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&fw_context, sizeof(fw_context));
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spin_lock(&sst_drv_ctx->list_spin_lock);
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list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
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spin_unlock(&sst_drv_ctx->list_spin_lock);
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sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
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/*wait for reply*/
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if (sst_wait_timeout(sst_drv_ctx, &sst_drv_ctx->alloc_block[i]))
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pr_debug("err fw context save timeout ...\n");
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sst_drv_ctx->alloc_block[i].sst_id = BLOCK_UNINIT;
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pr_debug("fw context saved ...\n");
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return;
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}
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/* Power Management */
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/*
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* intel_sst_suspend - PCI suspend function
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@ -417,6 +474,8 @@ int intel_sst_suspend(struct pci_dev *pci, pm_message_t state)
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pr_err("active streams,not able to suspend\n");
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return -EBUSY;
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}
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/*save fw context*/
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sst_save_dsp_context();
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/*Assert RESET on LPE Processor*/
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csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
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csr.full = csr.full | 0x2;
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@ -28,8 +28,8 @@
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* Common private declarations for SST
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*/
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#define SST_DRIVER_VERSION "1.2.09"
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#define SST_VERSION_NUM 0x1209
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#define SST_DRIVER_VERSION "1.2.11"
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#define SST_VERSION_NUM 0x1211
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/* driver names */
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#define SST_DRV_NAME "intel_sst_driver"
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@ -37,6 +37,7 @@
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#define SST_MFLD_PCI_ID 0x082F
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#define PCI_ID_LENGTH 4
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#define SST_SUSPEND_DELAY 2000
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#define FW_CONTEXT_MEM (64*1024)
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enum sst_states {
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SST_FW_LOADED = 1,
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@ -94,7 +95,7 @@ enum sst_ram_type {
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/* SST shim registers to structure mapping */
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union config_status_reg {
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struct {
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u32 rsvd0:1;
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u32 mfld_strb:1;
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u32 sst_reset:1;
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u32 hw_rsvd:3;
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u32 sst_clk:2;
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@ -417,6 +418,8 @@ struct intel_sst_drv {
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unsigned int audio_start;
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dev_t devt_d, devt_c;
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unsigned int max_streams;
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unsigned int *fw_cntx;
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unsigned int fw_cntx_size;
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};
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extern struct intel_sst_drv *sst_drv_ctx;
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@ -508,6 +508,7 @@ int register_sst_card(struct intel_sst_card_ops *card)
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sst_drv_ctx->pmic_state = SND_MAD_INIT_DONE;
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sst_drv_ctx->rx_time_slot_status = 0; /*default AMIC*/
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card->pcm_control = sst_pmic_ops.pcm_control;
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sst_drv_ctx->scard_ops->card_status = SND_CARD_UN_INIT;
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return 0;
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} else {
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pr_err("strcmp fail %s\n", card->module_name);
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@ -519,6 +520,7 @@ int register_sst_card(struct intel_sst_card_ops *card)
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pr_err("Repeat for registration..denied\n");
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return -EBADRQC;
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}
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sst_drv_ctx->scard_ops->card_status = SND_CARD_UN_INIT;
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return 0;
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}
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EXPORT_SYMBOL_GPL(register_sst_card);
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@ -73,7 +73,8 @@ static int intel_sst_reset_dsp_medfield(void)
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union config_status_reg csr;
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pr_debug("Resetting the DSP in medfield\n");
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csr.full = 0x048303E2;
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csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
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csr.full |= 0x382;
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sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
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return 0;
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@ -109,11 +110,16 @@ static int sst_start_medfield(void)
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{
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union config_status_reg csr;
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csr.full = 0x04830062;
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csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
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csr.part.bypass = 0;
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sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
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csr.full = 0x04830063;
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csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
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csr.part.mfld_strb = 1;
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sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
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csr.full = 0x04830061;
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csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR);
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csr.part.run_stall = 0;
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csr.part.sst_reset = 0;
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pr_debug("Starting the DSP_medfld %x\n", csr.full);
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sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full);
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pr_debug("Starting the DSP_medfld\n");
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@ -56,6 +56,8 @@
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#define IPC_IA_GET_FW_VERSION 0x04
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#define IPC_IA_GET_FW_BUILD_INF 0x05
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#define IPC_IA_GET_FW_INFO 0x06
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#define IPC_IA_GET_FW_CTXT 0x07
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#define IPC_IA_SET_FW_CTXT 0x08
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/* I2L Codec Config/control msgs */
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#define IPC_IA_SET_CODEC_PARAMS 0x10
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@ -406,4 +408,8 @@ struct ipc_post {
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char *mailbox_data;
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};
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struct snd_sst_ctxt_params {
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u32 address; /* Physical Address in DDR where the context is stored */
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u32 size; /* size of the context */
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};
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#endif /* __INTEL_SST_FW_IPC_H__ */
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@ -154,6 +154,37 @@ void sst_clear_interrupt(void)
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sst_shim_write(sst_drv_ctx->shim, SST_IMRX, imr.full);
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}
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void sst_restore_fw_context(void)
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{
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struct snd_sst_ctxt_params fw_context;
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struct ipc_post *msg = NULL;
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pr_debug("restore_fw_context\n");
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/*check cpu type*/
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if (sst_drv_ctx->pci_id != SST_MFLD_PCI_ID)
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return;
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/*not supported for rest*/
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if (!sst_drv_ctx->fw_cntx_size)
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return;
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/*nothing to restore*/
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pr_debug("restoring context......\n");
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/*send msg to fw*/
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if (sst_create_large_msg(&msg))
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return;
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sst_fill_header(&msg->header, IPC_IA_SET_FW_CTXT, 1, 0);
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msg->header.part.data = sizeof(fw_context) + sizeof(u32);
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fw_context.address = virt_to_phys((void *)sst_drv_ctx->fw_cntx);
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fw_context.size = sst_drv_ctx->fw_cntx_size;
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memcpy(msg->mailbox_data, &msg->header, sizeof(u32));
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memcpy(msg->mailbox_data + sizeof(u32),
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&fw_context, sizeof(fw_context));
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spin_lock(&sst_drv_ctx->list_spin_lock);
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list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list);
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spin_unlock(&sst_drv_ctx->list_spin_lock);
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sst_post_message(&sst_drv_ctx->ipc_post_msg_wq);
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return;
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}
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/*
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* process_fw_init - process the FW init msg
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*
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@ -184,13 +215,13 @@ int process_fw_init(struct sst_ipc_msg_wq *msg)
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sst_drv_ctx->sst_state = SST_FW_RUNNING;
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sst_drv_ctx->lpe_stalled = 0;
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mutex_unlock(&sst_drv_ctx->sst_lock);
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pr_debug("FW Version %x.%x\n",
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init->fw_version.major, init->fw_version.minor);
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pr_debug("Build No %x Type %x\n",
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init->fw_version.build, init->fw_version.type);
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pr_debug("FW Version %02x.%02x.%02x\n", init->fw_version.major,
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init->fw_version.minor, init->fw_version.build);
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pr_debug("Build Type %x\n", init->fw_version.type);
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pr_debug(" Build date %s Time %s\n",
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init->build_info.date, init->build_info.time);
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sst_wake_up_alloc_block(sst_drv_ctx, FW_DWNL_ID, retval, NULL);
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sst_restore_fw_context();
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return retval;
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}
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/**
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@ -615,12 +646,18 @@ void sst_process_reply(struct work_struct *work)
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break;
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case IPC_IA_FREE_STREAM:
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str_info = &sst_drv_ctx->streams[str_id];
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if (!msg->header.part.data) {
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pr_debug("Stream %d freed\n", str_id);
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} else {
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pr_err("Free for %d ret error %x\n",
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str_id, msg->header.part.data);
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}
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if (str_info->ctrl_blk.on == true) {
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str_info->ctrl_blk.on = false;
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str_info->ctrl_blk.condition = true;
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wake_up(&sst_drv_ctx->wait_queue);
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}
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break;
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case IPC_IA_ALLOC_STREAM: {
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/* map to stream, call play */
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@ -699,6 +736,17 @@ void sst_process_reply(struct work_struct *work)
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case IPC_IA_START_STREAM:
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pr_debug("reply for START STREAM %x\n", msg->header.full);
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break;
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case IPC_IA_GET_FW_CTXT:
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pr_debug("reply for get fw ctxt %x\n", msg->header.full);
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if (msg->header.part.data)
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sst_drv_ctx->fw_cntx_size = 0;
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else
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sst_drv_ctx->fw_cntx_size = *sst_drv_ctx->fw_cntx;
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pr_debug("fw copied data %x\n", sst_drv_ctx->fw_cntx_size);
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sst_wake_up_alloc_block(
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sst_drv_ctx, str_id, msg->header.part.data, NULL);
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break;
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default:
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/* Illegal case */
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pr_err("process reply:default = %x\n", msg->header.full);
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@ -31,6 +31,7 @@
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#include <linux/pci.h>
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#include <linux/firmware.h>
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#include <linux/sched.h>
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#include <linux/delay.h>
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#include "intel_sst_ioctl.h"
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#include "intel_sst.h"
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#include "intel_sst_fw_ipc.h"
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@ -519,10 +520,6 @@ int sst_drain_stream(int str_id)
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str_info->data_blk.on = true;
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retval = sst_wait_interruptible(sst_drv_ctx, &str_info->data_blk);
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str_info->need_draining = false;
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if (retval == -SST_ERR_INVALID_STREAM_ID) {
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retval = -EINVAL;
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sst_clean_stream(str_info);
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}
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return retval;
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}
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@ -563,6 +560,12 @@ int sst_free_stream(int str_id)
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str_info->data_blk.ret_code = 0;
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wake_up(&sst_drv_ctx->wait_queue);
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}
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str_info->data_blk.on = true;
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str_info->data_blk.condition = false;
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retval = sst_wait_interruptible_timeout(sst_drv_ctx,
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&str_info->ctrl_blk, SST_BLOCK_TIMEOUT);
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pr_debug("wait for free returned %d\n", retval);
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msleep(100);
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mutex_lock(&sst_drv_ctx->stream_lock);
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sst_clean_stream(str_info);
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mutex_unlock(&sst_drv_ctx->stream_lock);
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@ -363,7 +363,6 @@ int sst_parse_target(struct snd_sst_slot_info *slot)
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pr_err("SST_Activate_target_fail\n");
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else
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pr_err("SST_Activate_target_pass\n");
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return retval;
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} else if (slot->action == SND_SST_PORT_PREPARE &&
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slot->device_type == SND_SST_DEVICE_PCM) {
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retval = sst_prepare_target(slot);
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@ -371,12 +370,11 @@ int sst_parse_target(struct snd_sst_slot_info *slot)
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pr_err("SST_prepare_target_fail\n");
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else
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pr_err("SST_prepare_target_pass\n");
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return retval;
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} else {
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pr_err("slot_action : %d, device_type: %d\n",
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slot->action, slot->device_type);
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return retval;
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}
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return retval;
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}
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int sst_send_target(struct snd_sst_target_device *target)
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@ -886,8 +884,7 @@ static int sst_prepare_input_buffers_rar(struct stream_info *str_info,
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int *input_index, int *in_copied,
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int *input_index_valid_size, int *new_entry_flag)
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{
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int retval = 0;
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int i;
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int retval = 0, i;
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if (str_info->ops == STREAM_OPS_PLAYBACK_DRM) {
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struct RAR_buffer rar_buffers;
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@ -924,7 +921,6 @@ static int sst_prepare_input_buffers_rar(struct stream_info *str_info,
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return retval;
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}
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#endif
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/*This function is used to prepare the kernel input buffers with contents
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before sending for decode*/
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static int sst_prepare_input_buffers(struct stream_info *str_info,
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@ -802,8 +802,6 @@ static int __devinit snd_intelmad_sst_register(
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pr_err("sst card registration failed\n");
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return ret_val;
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||||
}
|
||||
sst_drv_ctx->scard_ops->card_status = SND_CARD_UN_INIT;
|
||||
|
||||
sst_card_vendor_id = intelmaddata->sstdrv_ops->vendor_id;
|
||||
intelmaddata->pmic_status = PMIC_UNINIT;
|
||||
return ret_val;
|
||||
|
|
Loading…
Reference in New Issue