Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Ingo Molnar: "Two FPU rewrite related fixes. This addresses all known x86 regressions at this stage. Also some other misc fixes" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/fpu: Fix boot crash in the early FPU code x86/asm/entry/64: Update path names x86/fpu: Fix FPU related boot regression when CPUID masking BIOS feature is enabled x86/boot/setup: Clean up the e820_reserve_setup_data() code x86/kaslr: Fix typo in the KASLR_FLAG documentation
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b1be9ead13
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@ -406,7 +406,7 @@ Protocol: 2.00+
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- If 0, the protected-mode code is loaded at 0x10000.
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- If 0, the protected-mode code is loaded at 0x10000.
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- If 1, the protected-mode code is loaded at 0x100000.
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- If 1, the protected-mode code is loaded at 0x100000.
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Bit 1 (kernel internal): ALSR_FLAG
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Bit 1 (kernel internal): KASLR_FLAG
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- Used internally by the compressed kernel to communicate
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- Used internally by the compressed kernel to communicate
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KASLR status to kernel proper.
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KASLR status to kernel proper.
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If 1, KASLR enabled.
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If 1, KASLR enabled.
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@ -1,14 +1,14 @@
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This file documents some of the kernel entries in
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This file documents some of the kernel entries in
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arch/x86/kernel/entry_64.S. A lot of this explanation is adapted from
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arch/x86/entry/entry_64.S. A lot of this explanation is adapted from
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an email from Ingo Molnar:
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an email from Ingo Molnar:
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http://lkml.kernel.org/r/<20110529191055.GC9835%40elte.hu>
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http://lkml.kernel.org/r/<20110529191055.GC9835%40elte.hu>
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The x86 architecture has quite a few different ways to jump into
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The x86 architecture has quite a few different ways to jump into
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kernel code. Most of these entry points are registered in
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kernel code. Most of these entry points are registered in
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arch/x86/kernel/traps.c and implemented in arch/x86/kernel/entry_64.S
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arch/x86/kernel/traps.c and implemented in arch/x86/entry/entry_64.S
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for 64-bit, arch/x86/kernel/entry_32.S for 32-bit and finally
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for 64-bit, arch/x86/entry/entry_32.S for 32-bit and finally
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arch/x86/ia32/ia32entry.S which implements the 32-bit compatibility
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arch/x86/entry/entry_64_compat.S which implements the 32-bit compatibility
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syscall entry points and thus provides for 32-bit processes the
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syscall entry points and thus provides for 32-bit processes the
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ability to execute syscalls when running on 64-bit kernels.
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ability to execute syscalls when running on 64-bit kernels.
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@ -742,7 +742,6 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
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cpu_detect(c);
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cpu_detect(c);
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get_cpu_vendor(c);
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get_cpu_vendor(c);
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get_cpu_cap(c);
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get_cpu_cap(c);
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fpu__init_system(c);
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if (this_cpu->c_early_init)
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if (this_cpu->c_early_init)
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this_cpu->c_early_init(c);
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this_cpu->c_early_init(c);
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@ -754,6 +753,7 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
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this_cpu->c_bsp_init(c);
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this_cpu->c_bsp_init(c);
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setup_force_cpu_cap(X86_FEATURE_ALWAYS);
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setup_force_cpu_cap(X86_FEATURE_ALWAYS);
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fpu__init_system(c);
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}
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}
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void __init early_cpu_init(void)
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void __init early_cpu_init(void)
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@ -95,11 +95,12 @@ static void __init fpu__init_system_mxcsr(void)
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unsigned int mask = 0;
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unsigned int mask = 0;
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if (cpu_has_fxsr) {
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if (cpu_has_fxsr) {
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struct fxregs_state fx_tmp __aligned(32) = { };
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/* Static because GCC does not get 16-byte stack alignment right: */
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static struct fxregs_state fxregs __initdata;
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asm volatile("fxsave %0" : "+m" (fx_tmp));
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asm volatile("fxsave %0" : "+m" (fxregs));
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mask = fx_tmp.mxcsr_mask;
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mask = fxregs.mxcsr_mask;
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/*
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/*
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* If zero then use the default features mask,
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* If zero then use the default features mask,
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@ -461,19 +461,18 @@ static void __init e820_reserve_setup_data(void)
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{
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{
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struct setup_data *data;
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struct setup_data *data;
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u64 pa_data;
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u64 pa_data;
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int found = 0;
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pa_data = boot_params.hdr.setup_data;
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pa_data = boot_params.hdr.setup_data;
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if (!pa_data)
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return;
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while (pa_data) {
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while (pa_data) {
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data = early_memremap(pa_data, sizeof(*data));
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data = early_memremap(pa_data, sizeof(*data));
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e820_update_range(pa_data, sizeof(*data)+data->len,
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e820_update_range(pa_data, sizeof(*data)+data->len,
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E820_RAM, E820_RESERVED_KERN);
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E820_RAM, E820_RESERVED_KERN);
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found = 1;
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pa_data = data->next;
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pa_data = data->next;
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early_memunmap(data, sizeof(*data));
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early_memunmap(data, sizeof(*data));
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}
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}
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if (!found)
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return;
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sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map);
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sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map);
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memcpy(&e820_saved, &e820, sizeof(struct e820map));
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memcpy(&e820_saved, &e820, sizeof(struct e820map));
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