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davinci: use divide ratio limits from pll_data 

This patch modifies the sysclk rate setting code to use the divider mask
specified in pll_data.  Without this, devices with different divider ranges
(e.g. tnetv107x) fail.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Cyril Chemparathy 2010-10-20 17:49:56 -04:00 committed by Kevin Hilman
parent 6d1c57c84c
commit b1d05be61f
1 changed files with 2 additions and 2 deletions
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4
arch/arm/mach-davinci/clock.c
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@ -336,7 +336,7 @@ int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate)
ratio--;
}
if (ratio > PLLDIV_RATIO_MASK)
if (ratio > pll->div_ratio_mask)
return -EINVAL;
do {
@ -344,7 +344,7 @@ int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate)
} while (v & PLLSTAT_GOSTAT);
v = __raw_readl(pll->base + clk->div_reg);
v &= ~PLLDIV_RATIO_MASK;
v &= ~pll->div_ratio_mask;
v |= ratio | PLLDIV_EN;
__raw_writel(v, pll->base + clk->div_reg);