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intel_mid_dma: Allow IRQ sharing 

intel_mid_dma driver allows interrupt sharing. Thus it needs
to check whether IRQ source is the DMA controller and return
the appropriate IRQ return.

Signed-off-by: Yong Wang <yong.y.wang@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This commit is contained in:
Yong Wang 2010-10-04 10:37:02 +00:00 committed by Dan Williams
parent 53a61badf4
commit b306df5e92
1 changed files with 14 additions and 11 deletions
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25
drivers/dma/intel_mid_dma.c
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@ -817,9 +817,14 @@ static void dma_tasklet2(unsigned long data)
static irqreturn_t intel_mid_dma_interrupt(int irq, void *data)
{
struct middma_device *mid = data;
u32 status;
u32 tfr_status, err_status;
int call_tasklet = 0;
tfr_status = ioread32(mid->dma_base + RAW_TFR);
err_status = ioread32(mid->dma_base + RAW_ERR);
if (!tfr_status && !err_status)
return IRQ_NONE;
/*DMA Interrupt*/
pr_debug("MDMA:Got an interrupt on irq %d\n", irq);
if (!mid) {
@ -827,19 +832,17 @@ static irqreturn_t intel_mid_dma_interrupt(int irq, void *data)
return -EINVAL;
}
status = ioread32(mid->dma_base + RAW_TFR);
pr_debug("MDMA: Status %x, Mask %x\n", status, mid->intr_mask);
status &= mid->intr_mask;
if (status) {
pr_debug("MDMA: Status %x, Mask %x\n", tfr_status, mid->intr_mask);
tfr_status &= mid->intr_mask;
if (tfr_status) {
/*need to disable intr*/
iowrite32((status << 8), mid->dma_base + MASK_TFR);
pr_debug("MDMA: Calling tasklet %x\n", status);
iowrite32((tfr_status << 8), mid->dma_base + MASK_TFR);
pr_debug("MDMA: Calling tasklet %x\n", tfr_status);
call_tasklet = 1;
}
status = ioread32(mid->dma_base + RAW_ERR);
status &= mid->intr_mask;
if (status) {
iowrite32(MASK_INTR_REG(status), mid->dma_base + MASK_ERR);
err_status &= mid->intr_mask;
if (err_status) {
iowrite32(MASK_INTR_REG(err_status), mid->dma_base + MASK_ERR);
call_tasklet = 1;
}
if (call_tasklet)