ASoC: tlv320aic32x4: Add gpio configuration to the codec
Add the ability to configure the MFP1->MFP5 registers as GPIOs. In addition adding ALSA controls to get and set the GPIO state. Per the data sheet each MFP can be configured as a GPIO input only, output only or either an input or output. Signed-off-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Dan Murphy
Mark Brown
parent
fde0543f11
commit
b9045b9c6b
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@ -20,6 +20,8 @@ Optional properties:
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- reset-gpios: Reset-GPIO phandle with args as described in gpio/gpio.txt
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- clocks/clock-names: Clock named 'mclk' for the master clock of the codec.
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See clock/clock-bindings.txt for information about the detailed format.
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- aic32x4-gpio-func - <array of 5 int>
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- Types are defined in include/sound/tlv320aic32x4.h
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Example:
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@ -29,4 +31,11 @@ codec: tlv320aic32x4@18 {
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reg = <0x18>;
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clocks = <&clks 201>;
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clock-names = "mclk";
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aic32x4-gpio-func= <
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0xff /* AIC32X4_MFPX_DEFAULT_VALUE */
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0xff /* AIC32X4_MFPX_DEFAULT_VALUE */
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0x04 /* MFP3 AIC32X4_MFP3_GPIO_ENABLED */
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0xff /* AIC32X4_MFPX_DEFAULT_VALUE */
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0x08 /* MFP5 AIC32X4_MFP5_GPIO_INPUT */
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>;
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};
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@ -22,7 +22,30 @@
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#define AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K 0x00000001
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#define AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K 0x00000002
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/* GPIO API */
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#define AIC32X4_MFPX_DEFAULT_VALUE 0xff
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#define AIC32X4_MFP1_DIN_DISABLED 0
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#define AIC32X4_MFP1_DIN_ENABLED 0x2
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#define AIC32X4_MFP1_GPIO_IN 0x4
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#define AIC32X4_MFP2_GPIO_OUT_LOW 0x0
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#define AIC32X4_MFP2_GPIO_OUT_HIGH 0x1
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#define AIC32X4_MFP_GPIO_ENABLED 0x4
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#define AIC32X4_MFP5_GPIO_DISABLED 0x0
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#define AIC32X4_MFP5_GPIO_INPUT 0x8
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#define AIC32X4_MFP5_GPIO_OUTPUT 0xc
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#define AIC32X4_MFP5_GPIO_OUT_LOW 0x0
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#define AIC32X4_MFP5_GPIO_OUT_HIGH 0x1
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struct aic32x4_setup_data {
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unsigned int gpio_func[5];
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};
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struct aic32x4_pdata {
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struct aic32x4_setup_data *setup;
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u32 power_cfg;
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u32 micpga_routing;
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bool swapdacs;
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@ -74,6 +74,152 @@ struct aic32x4_priv {
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struct regulator *supply_iov;
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struct regulator *supply_dv;
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struct regulator *supply_av;
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struct aic32x4_setup_data *setup;
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struct device *dev;
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};
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static int aic32x4_get_mfp1_gpio(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
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u8 val;
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val = snd_soc_read(codec, AIC32X4_DINCTL);
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ucontrol->value.integer.value[0] = (val & 0x01);
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return 0;
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};
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static int aic32x4_set_mfp2_gpio(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
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u8 val;
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u8 gpio_check;
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val = snd_soc_read(codec, AIC32X4_DOUTCTL);
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gpio_check = (val & AIC32X4_MFP_GPIO_ENABLED);
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if (gpio_check != AIC32X4_MFP_GPIO_ENABLED) {
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printk(KERN_ERR "%s: MFP2 is not configure as a GPIO output\n",
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__func__);
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return -EINVAL;
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}
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if (ucontrol->value.integer.value[0] == (val & AIC32X4_MFP2_GPIO_OUT_HIGH))
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return 0;
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if (ucontrol->value.integer.value[0])
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val |= ucontrol->value.integer.value[0];
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else
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val &= ~AIC32X4_MFP2_GPIO_OUT_HIGH;
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snd_soc_write(codec, AIC32X4_DOUTCTL, val);
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return 0;
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};
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static int aic32x4_get_mfp3_gpio(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
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u8 val;
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val = snd_soc_read(codec, AIC32X4_SCLKCTL);
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ucontrol->value.integer.value[0] = (val & 0x01);
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return 0;
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};
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static int aic32x4_set_mfp4_gpio(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
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u8 val;
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u8 gpio_check;
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val = snd_soc_read(codec, AIC32X4_MISOCTL);
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gpio_check = (val & AIC32X4_MFP_GPIO_ENABLED);
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if (gpio_check != AIC32X4_MFP_GPIO_ENABLED) {
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printk(KERN_ERR "%s: MFP4 is not configure as a GPIO output\n",
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__func__);
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return -EINVAL;
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}
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if (ucontrol->value.integer.value[0] == (val & AIC32X4_MFP5_GPIO_OUT_HIGH))
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return 0;
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if (ucontrol->value.integer.value[0])
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val |= ucontrol->value.integer.value[0];
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else
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val &= ~AIC32X4_MFP5_GPIO_OUT_HIGH;
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snd_soc_write(codec, AIC32X4_MISOCTL, val);
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return 0;
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};
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static int aic32x4_get_mfp5_gpio(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
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u8 val;
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val = snd_soc_read(codec, AIC32X4_GPIOCTL);
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ucontrol->value.integer.value[0] = ((val & 0x2) >> 1);
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return 0;
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};
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static int aic32x4_set_mfp5_gpio(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
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u8 val;
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u8 gpio_check;
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val = snd_soc_read(codec, AIC32X4_GPIOCTL);
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gpio_check = (val & AIC32X4_MFP5_GPIO_OUTPUT);
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if (gpio_check != AIC32X4_MFP5_GPIO_OUTPUT) {
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printk(KERN_ERR "%s: MFP5 is not configure as a GPIO output\n",
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__func__);
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return -EINVAL;
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}
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if (ucontrol->value.integer.value[0] == (val & 0x1))
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return 0;
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if (ucontrol->value.integer.value[0])
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val |= ucontrol->value.integer.value[0];
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else
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val &= 0xfe;
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snd_soc_write(codec, AIC32X4_GPIOCTL, val);
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return 0;
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};
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static const struct snd_kcontrol_new aic32x4_mfp1[] = {
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SOC_SINGLE_BOOL_EXT("MFP1 GPIO", 0, aic32x4_get_mfp1_gpio, NULL),
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};
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static const struct snd_kcontrol_new aic32x4_mfp2[] = {
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SOC_SINGLE_BOOL_EXT("MFP2 GPIO", 0, NULL, aic32x4_set_mfp2_gpio),
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};
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static const struct snd_kcontrol_new aic32x4_mfp3[] = {
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SOC_SINGLE_BOOL_EXT("MFP3 GPIO", 0, aic32x4_get_mfp3_gpio, NULL),
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};
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static const struct snd_kcontrol_new aic32x4_mfp4[] = {
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SOC_SINGLE_BOOL_EXT("MFP4 GPIO", 0, NULL, aic32x4_set_mfp4_gpio),
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};
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static const struct snd_kcontrol_new aic32x4_mfp5[] = {
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SOC_SINGLE_BOOL_EXT("MFP5 GPIO", 0, aic32x4_get_mfp5_gpio,
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aic32x4_set_mfp5_gpio),
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};
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/* 0dB min, 0.5dB steps */
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@ -734,6 +880,52 @@ static struct snd_soc_dai_driver aic32x4_dai = {
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.symmetric_rates = 1,
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};
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static void aic32x4_setup_gpios(struct snd_soc_codec *codec)
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{
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struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec);
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/* setup GPIO functions */
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/* MFP1 */
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if (aic32x4->setup->gpio_func[0] != AIC32X4_MFPX_DEFAULT_VALUE) {
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snd_soc_write(codec, AIC32X4_DINCTL,
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aic32x4->setup->gpio_func[0]);
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snd_soc_add_codec_controls(codec, aic32x4_mfp1,
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ARRAY_SIZE(aic32x4_mfp1));
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}
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/* MFP2 */
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if (aic32x4->setup->gpio_func[1] != AIC32X4_MFPX_DEFAULT_VALUE) {
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snd_soc_write(codec, AIC32X4_DOUTCTL,
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aic32x4->setup->gpio_func[1]);
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snd_soc_add_codec_controls(codec, aic32x4_mfp2,
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ARRAY_SIZE(aic32x4_mfp2));
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}
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/* MFP3 */
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if (aic32x4->setup->gpio_func[2] != AIC32X4_MFPX_DEFAULT_VALUE) {
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snd_soc_write(codec, AIC32X4_SCLKCTL,
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aic32x4->setup->gpio_func[2]);
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snd_soc_add_codec_controls(codec, aic32x4_mfp3,
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ARRAY_SIZE(aic32x4_mfp3));
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}
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/* MFP4 */
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if (aic32x4->setup->gpio_func[3] != AIC32X4_MFPX_DEFAULT_VALUE) {
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snd_soc_write(codec, AIC32X4_MISOCTL,
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aic32x4->setup->gpio_func[3]);
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snd_soc_add_codec_controls(codec, aic32x4_mfp4,
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ARRAY_SIZE(aic32x4_mfp4));
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}
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/* MFP5 */
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if (aic32x4->setup->gpio_func[4] != AIC32X4_MFPX_DEFAULT_VALUE) {
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snd_soc_write(codec, AIC32X4_GPIOCTL,
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aic32x4->setup->gpio_func[4]);
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snd_soc_add_codec_controls(codec, aic32x4_mfp5,
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ARRAY_SIZE(aic32x4_mfp5));
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}
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}
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static int aic32x4_codec_probe(struct snd_soc_codec *codec)
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{
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struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec);
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@ -746,6 +938,9 @@ static int aic32x4_codec_probe(struct snd_soc_codec *codec)
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snd_soc_write(codec, AIC32X4_RESET, 0x01);
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if (aic32x4->setup)
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aic32x4_setup_gpios(codec);
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/* Power platform configuration */
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if (aic32x4->power_cfg & AIC32X4_PWR_MICBIAS_2075_LDOIN) {
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snd_soc_write(codec, AIC32X4_MICBIAS, AIC32X4_MICBIAS_LDOIN |
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@ -810,10 +1005,20 @@ static struct snd_soc_codec_driver soc_codec_dev_aic32x4 = {
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static int aic32x4_parse_dt(struct aic32x4_priv *aic32x4,
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struct device_node *np)
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{
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struct aic32x4_setup_data *aic32x4_setup;
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aic32x4_setup = devm_kzalloc(aic32x4->dev, sizeof(*aic32x4_setup),
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GFP_KERNEL);
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if (!aic32x4_setup)
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return -ENOMEM;
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aic32x4->swapdacs = false;
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aic32x4->micpga_routing = 0;
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aic32x4->rstn_gpio = of_get_named_gpio(np, "reset-gpios", 0);
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if (of_property_read_u32_array(np, "aic32x4-gpio-func",
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aic32x4_setup->gpio_func, 5) >= 0)
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aic32x4->setup = aic32x4_setup;
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return 0;
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}
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@ -932,6 +1137,7 @@ int aic32x4_probe(struct device *dev, struct regmap *regmap)
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if (aic32x4 == NULL)
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return -ENOMEM;
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aic32x4->dev = dev;
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dev_set_drvdata(dev, aic32x4);
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if (pdata) {
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@ -44,8 +44,11 @@ int aic32x4_remove(struct device *dev);
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#define AIC32X4_IFACE4 31
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#define AIC32X4_IFACE5 32
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#define AIC32X4_IFACE6 33
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#define AIC32X4_GPIOCTL 52
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#define AIC32X4_DOUTCTL 53
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#define AIC32X4_DINCTL 54
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#define AIC32X4_MISOCTL 55
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#define AIC32X4_SCLKCTL 56
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#define AIC32X4_DACSPB 60
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#define AIC32X4_ADCSPB 61
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#define AIC32X4_DACSETUP 63
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