thermal: exynos: remove needless therm_trip_[mode,mask]_shift abstractions
reg->therm_trip_mode_shift and reg->therm_trip_mode_mask are used only in exynos_tmu_control() and accessed only if pdata->noise_cancel_mode is non-zero. pdata->noise_cancel field is not defined on Exynos4210 (also therm_trip_mode_shift and therm_trip_mode_mask entries are not even assigned in exynos4210_tmu_registers but they are assigned to identical values for all other SoC types) so the abstractions are not needed and can be removed. There should be no functional changes caused by this patch. Cc: Amit Daniel Kachhap <amit.daniel@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Eduardo Valentin <edubezval@gmail.com> Cc: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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@ -304,9 +304,8 @@ static void exynos_tmu_control(struct platform_device *pdev, bool on)
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con |= (pdata->gain << EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT);
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con |= (pdata->gain << EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT);
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if (pdata->noise_cancel_mode) {
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if (pdata->noise_cancel_mode) {
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con &= ~(reg->therm_trip_mode_mask <<
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con &= ~(EXYNOS_TMU_TRIP_MODE_MASK << EXYNOS_TMU_TRIP_MODE_SHIFT);
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reg->therm_trip_mode_shift);
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con |= (pdata->noise_cancel_mode << EXYNOS_TMU_TRIP_MODE_SHIFT);
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con |= (pdata->noise_cancel_mode << reg->therm_trip_mode_shift);
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}
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}
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if (on) {
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if (on) {
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@ -77,8 +77,6 @@ enum soc_type {
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* bitfields. The register validity, offsets and bitfield values may vary
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* bitfields. The register validity, offsets and bitfield values may vary
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* slightly across different exynos SOC's.
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* slightly across different exynos SOC's.
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* @tmu_ctrl: TMU main controller register.
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* @tmu_ctrl: TMU main controller register.
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* @therm_trip_mode_shift: shift bits of tripping mode in tmu_ctrl register.
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* @therm_trip_mode_mask: mask bits of tripping mode in tmu_ctrl register.
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* @therm_trip_en_shift: shift bits of tripping enable in tmu_ctrl register.
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* @therm_trip_en_shift: shift bits of tripping enable in tmu_ctrl register.
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* @tmu_cur_temp: register containing the current temperature of the TMU.
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* @tmu_cur_temp: register containing the current temperature of the TMU.
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* @threshold_th0: Register containing first set of rising levels.
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* @threshold_th0: Register containing first set of rising levels.
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@ -102,8 +100,6 @@ enum soc_type {
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*/
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*/
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struct exynos_tmu_registers {
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struct exynos_tmu_registers {
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u32 tmu_ctrl;
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u32 tmu_ctrl;
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u32 therm_trip_mode_shift;
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u32 therm_trip_mode_mask;
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u32 therm_trip_en_shift;
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u32 therm_trip_en_shift;
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u32 tmu_cur_temp;
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u32 tmu_cur_temp;
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@ -83,8 +83,6 @@ struct exynos_tmu_init_data const exynos4210_default_tmu_data = {
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#if defined(CONFIG_SOC_EXYNOS3250)
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#if defined(CONFIG_SOC_EXYNOS3250)
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static const struct exynos_tmu_registers exynos3250_tmu_registers = {
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static const struct exynos_tmu_registers exynos3250_tmu_registers = {
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.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
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.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
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.therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
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.therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
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.therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
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.therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
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.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
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.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
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.threshold_th0 = EXYNOS_THD_TEMP_RISE,
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.threshold_th0 = EXYNOS_THD_TEMP_RISE,
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@ -158,8 +156,6 @@ struct exynos_tmu_init_data const exynos3250_default_tmu_data = {
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#if defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250)
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#if defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250)
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static const struct exynos_tmu_registers exynos4412_tmu_registers = {
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static const struct exynos_tmu_registers exynos4412_tmu_registers = {
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.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
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.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
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.therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
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.therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
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.therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
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.therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
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.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
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.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
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.threshold_th0 = EXYNOS_THD_TEMP_RISE,
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.threshold_th0 = EXYNOS_THD_TEMP_RISE,
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@ -246,8 +242,6 @@ struct exynos_tmu_init_data const exynos5250_default_tmu_data = {
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#if defined(CONFIG_SOC_EXYNOS5260)
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#if defined(CONFIG_SOC_EXYNOS5260)
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static const struct exynos_tmu_registers exynos5260_tmu_registers = {
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static const struct exynos_tmu_registers exynos5260_tmu_registers = {
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.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
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.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
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.therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
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.therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
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.therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
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.therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
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.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
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.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
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.threshold_th0 = EXYNOS_THD_TEMP_RISE,
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.threshold_th0 = EXYNOS_THD_TEMP_RISE,
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@ -323,8 +317,6 @@ struct exynos_tmu_init_data const exynos5260_default_tmu_data = {
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#if defined(CONFIG_SOC_EXYNOS5420)
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#if defined(CONFIG_SOC_EXYNOS5420)
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static const struct exynos_tmu_registers exynos5420_tmu_registers = {
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static const struct exynos_tmu_registers exynos5420_tmu_registers = {
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.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
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.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
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.therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
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.therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
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.therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
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.therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
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.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
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.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
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.threshold_th0 = EXYNOS_THD_TEMP_RISE,
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.threshold_th0 = EXYNOS_THD_TEMP_RISE,
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@ -408,8 +400,6 @@ struct exynos_tmu_init_data const exynos5420_default_tmu_data = {
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#if defined(CONFIG_SOC_EXYNOS5440)
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#if defined(CONFIG_SOC_EXYNOS5440)
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static const struct exynos_tmu_registers exynos5440_tmu_registers = {
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static const struct exynos_tmu_registers exynos5440_tmu_registers = {
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.tmu_ctrl = EXYNOS5440_TMU_S0_7_CTRL,
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.tmu_ctrl = EXYNOS5440_TMU_S0_7_CTRL,
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.therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
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.therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
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.therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
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.therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
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.tmu_cur_temp = EXYNOS5440_TMU_S0_7_TEMP,
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.tmu_cur_temp = EXYNOS5440_TMU_S0_7_TEMP,
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.threshold_th0 = EXYNOS5440_TMU_S0_7_TH0,
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.threshold_th0 = EXYNOS5440_TMU_S0_7_TH0,
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